KR200159003Y1 - Semiconductor package of thermal discharge type - Google Patents

Semiconductor package of thermal discharge type Download PDF

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Publication number
KR200159003Y1
KR200159003Y1 KR2019940031686U KR19940031686U KR200159003Y1 KR 200159003 Y1 KR200159003 Y1 KR 200159003Y1 KR 2019940031686 U KR2019940031686 U KR 2019940031686U KR 19940031686 U KR19940031686 U KR 19940031686U KR 200159003 Y1 KR200159003 Y1 KR 200159003Y1
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South Korea
Prior art keywords
heat
package
chip
semiconductor package
attached
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KR2019940031686U
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Korean (ko)
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KR960019165U (en
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박용준
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김영환
현대전자산업주식회사
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Priority to KR2019940031686U priority Critical patent/KR200159003Y1/en
Publication of KR960019165U publication Critical patent/KR960019165U/en
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Publication of KR200159003Y1 publication Critical patent/KR200159003Y1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

본 고안은 열 방출용 반도체 패키지에서 특히 패드의 밑면에 부착되어 있는 히트 스트레드 외에 칩의 상부면에도 히트 스프레드를 부착하여 패키지에서 발생하는 열을 더욱 효과적으로 외부로 방출케 하는 열 방출용 반도체 패키지에 관한 것으로, 기존의 반도체 패키지는 히트 스트레드가 패드의 밑면에만 부착되어 있어서 패키지에서 발생하는 열의 방출에 한계가 있었던 바, 본 고안은 종래의 이런 문제점을 해결하기 위해 칩의 윗면에도 히트 스프레드를 부착하여 열 방출을 원할하게 할 수 있도록 하는 반도체 패키지를 제공하므로써, 패키지 동작시 발생하는 열을 효과적으로 방출시킬 수 있어 패키지의 특성을 향상시키는 효과가 있다.The present invention is directed to a heat dissipation semiconductor package, in which a heat spread is also attached to the top surface of the chip in addition to the heat thread attached to the bottom of the pad, in order to more effectively release heat generated from the package to the outside. In the related art, the conventional semiconductor package has limited heat dissipation generated from the package because the heat strip is attached only to the bottom of the pad, and the present invention attaches a heat spread to the top of the chip to solve this problem. By providing a semiconductor package capable of smoothly dissipating heat, it is possible to effectively dissipate heat generated during package operation, thereby improving the characteristics of the package.

Description

열 방출용 반도체 패키지Semiconductor Package for Heat Dissipation

제1도는 종래 패키지의 단면도,1 is a cross-sectional view of a conventional package,

제2도는 본 고안에 따른 몰딩을 하지 않은 상태의 패키지 평면도,2 is a plan view of a package without a molding according to the present invention,

제3도는 본 고안에 따른 패키지 단면도이다.3 is a cross-sectional view of the package according to the present invention.

도면의 주요부분에 대한 부호의 설명Explanation of symbols for main parts of the drawings

1 : 칩 2 : 패드1: chip 2: pad

3 : 리드 4 : 와이어3: lead 4: wire

5 : 몰딩 수지 6', 6 : 접착제5: molding resin 6 ', 6: adhesive

7' : 히트 스프레드 8 : 타이 바7 ': Hit Spread 8: Tie Bar

본 고안은 열 방출용 반도체 패키지에 관한 것으로 패드의 밑면에 부착되어 있는 히트 스프레드 외에 칩의 상부면에도 히트 스프레드를 부착하여 패키지에서 발생하는 열을 더욱 효과적으로 외부로 방출케 하는 열 방출용 반도체 패키지에 관한 것이다.The present invention relates to a heat dissipation semiconductor package, and in addition to the heat spread attached to the bottom of the pad, the present invention attaches a heat spread to the top surface of the chip to more effectively release heat generated from the package to the outside. It is about.

일반적으로 반도체 패키지는 패키지 동작시 칩 패드부위에서 열이 발생한다. 따라서 기존에는 패드의 밑면에 별도로 히트 스프레드를 부착하여 패키지 외부로 열을 분산시켰는 바, 이는 제 1 도에 도시한 바와 같이 칩(1)을 어태치 하기전에 리드 프레임의 패드(2) 윗면에 접착제(6)를 접착한 뒤 그 위에 칩(1)을 어태치 하고, 패드(2)의 밑면에는 열을 분산시키는 히트 스프레드(7)를 부착한다. 이어 칩(1)과 리드 프레임의 리드(3)를 와이어(4)로 와이어 본딩한 후 몰딩 수지(5)로 몰딩하여 패키지를 제조한다.In general, semiconductor packages generate heat at chip pads during package operation. Therefore, in the past, heat spread was attached to the bottom of the pad separately to dissipate heat to the outside of the package. As shown in FIG. After attaching (6), the chip 1 is attached thereto, and a heat spread 7 for dissipating heat is attached to the bottom of the pad 2. Then, the chip 1 and the lead 3 of the lead frame are wire bonded with the wire 4 and then molded with the molding resin 5 to manufacture a package.

그러나 상기와 같이 제조된 반도체 패키지는 히트 스트레드(7)가 패드(2)의 밑면에만 부착되어 있어서 칩(1)에서 발생하는 열의 방출이 원할하지 않아 패키지 동작에 문제가 생기는 점이 있었다.However, the semiconductor package manufactured as described above has a problem in that the package operation is not performed because heat heat 7 is attached only to the bottom surface of the pad 2, so that heat generated from the chip 1 is not desired.

본 고안은 종래의 이런 문제점을 해결하기 위해 칩의 윗면에도 히트 스프레드를 부착하여 열 방출을 원활하게 할 수 있도록 하는 반도체 패키지를 제공함을 특징으로 한다.The present invention is characterized in that it provides a semiconductor package to facilitate the heat dissipation by attaching a heat spread to the upper surface of the chip to solve this problem of the prior art.

즉, 패드의 밑면에 히트 스프레드를 부착하고, 칩을 어태치 하여 와이어 본딩한 후 몰딩수지로 몰딩하는 반도체 패키지에 있어서, 상기 칩의 상부면에 부전도체의 접착제를 접착하고 그 위에 히트 스프레드를 부착하며, 히트 스프레드의 끝 부분을 와이어에 닿지 않게 하면서 타이 바에 연결시켜 패키지에서 발생하는 열을 방출시키는 것이다.That is, in a semiconductor package in which a heat spread is attached to a bottom surface of a pad, a chip is attached to wire bonding, and then molded with a molding resin, a non-conductive adhesive is attached to an upper surface of the chip and a heat spread is attached thereto. The end of the heat spread is connected to a tie bar without touching the wire to dissipate the heat generated by the package.

이하 본 고안의 일실시예를 첨부도면을 참조하여 상세히 설명하며, 종래와 같은 구성은 동일부호를 부가하여 설명한다.Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings, and a conventional configuration will be described with the same reference numerals.

제 2 도와 제 3 도는 본 고안의 열 방출용 반도체 패키지를 도시한 것으로, 제 2 도는 평면도이고, 제 3 도는 단면도이며, 이는 칩(1)을 어태치 하기전에 리드 프레임의 패드(2) 윗면에 접착제(6)를 접착한 뒤 그 위에 칩(1)을 어태치 하고, 패드(2)의 밑면에는 열을 분산시키는 히트 스프레드(7)를 부착하며, 칩(1)의 상부면에도 히트 스프레드(7)를 부착한다. 이어 칩(1)과 리드 프레임의 리드(3)를 와이어(4)로 와이어 본딩한 후 몰딩 수지(5)로 몰딩하여 패키지를 제조한다.2 and 3 show the semiconductor package for heat dissipation according to the present invention, and FIG. 2 is a plan view and FIG. 3 is a cross sectional view, which is formed on the upper surface of the pad 2 of the lead frame before attaching the chip 1. After adhering the adhesive 6, the chip 1 is attached thereon, and a heat spread 7 for dissipating heat is attached to the bottom of the pad 2, and a heat spread is also applied to the top surface of the chip 1. 7) Attach. Then, the chip 1 and the lead 3 of the lead frame are wire bonded with the wire 4 and then molded with the molding resin 5 to manufacture a package.

이때 상기에서 칩(1)의 상부면에 히트 스프레드(7')를 부착할때는 먼저 칩(1) 상부면에 접착제(6)를 접착한 후 그 위에 히트 스프레드(7')를 부착한다. 이어 히트 스프레드(7')의 끝 부분을 와이어(4)에 닿지 않도록 하여 타이 바(8)에 부착하는데, 이도 역시 타이 바(8)의 상부에 접착제(6')를 접착하고 그 위에 부착시키며, 상기 칩(1)의 상부면에나 타이 바(8)의 상부에 접착되는 접착제(6', 6)는 부전도체의 접착제를 접착한다.At this time, when attaching the heat spread (7 ') to the upper surface of the chip (1), the adhesive 6 is first attached to the upper surface of the chip (1), and then the heat spread (7') is attached thereon. The end of the heat spread 7 'is then attached to the tie bar 8 without touching the wire 4, which also adheres and adheres the adhesive 6' on top of the tie bar 8 In addition, the adhesives 6 'and 6 adhered to the upper surface of the chip 1 or the upper portion of the tie bar 8 adhere the adhesive of the non-conductor.

여기서 타이 바(8)는 패드(2)와 연결되어 리드(3)를 고정시켜 주는 역할을 한다.Here, the tie bar 8 is connected to the pad 2 and serves to fix the lead 3.

이와 같이 패드(2)의 밑면과 칩(1)의 상부면에 히트 스프레드(7, 7)를 부착하고 나서 패키지를 작동시키면, 칩(1)과 패드(2) 부위에서 발생하는 열을 효과적으로 방출할 수 있으므로 패키지 동작시 열로 인해 발생하는 오동작을 미연에 방지할 수 있다.If the package is operated after attaching the heat spreads 7 and 7 to the bottom surface of the pad 2 and the top surface of the chip 1 as described above, the heat generated from the chip 1 and the pad 2 is effectively released. As a result, malfunctions caused by heat during package operation can be prevented.

이상에서 상세히 설명한 바와 같이 본 고안은 패드의 밑면과 칩의 상부면에 히트 스프레드를 부착함으로써 패키지 동작시 발생하는 열을 효과적으로 방출시킬 수 있어 패키지 특성을 향상 시키는 효과가 있다.As described in detail above, the present invention can effectively release heat generated during the package operation by attaching a heat spread to the bottom surface of the pad and the top surface of the chip, thereby improving package characteristics.

Claims (1)

패드의 밑면에 히트 스프레드를 부착하고, 칩을 어태치 하여 와이어 본딩한 후 몰딩수지로 몰딩하는 반도체 패키지에 있어서, 상기 칩의 상부면에 부전도체의 접착제를 접착하고 그 위에 히트 스프레드를 부착하며, 히트 스프레드의 끝 부분을 와이어에 닿지 않게 하면서 타이 바에 연결시켜 패키지에서 발생하는 열을 방출시키는 것을 특징으로 하는 열 방출용 반도체 패키지.A semiconductor package for attaching a heat spread to a bottom surface of a pad, attaching a chip to wire bonding, and then molding the mold with a molding resin, the adhesive of a non-conductor adhered to an upper surface of the chip, and a heat spread attached thereto. A heat dissipation semiconductor package characterized in that the heat spread from the package is released by connecting the end of the heat spread to the tie bar without touching the wire.
KR2019940031686U 1994-11-28 1994-11-28 Semiconductor package of thermal discharge type KR200159003Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019940031686U KR200159003Y1 (en) 1994-11-28 1994-11-28 Semiconductor package of thermal discharge type

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Application Number Priority Date Filing Date Title
KR2019940031686U KR200159003Y1 (en) 1994-11-28 1994-11-28 Semiconductor package of thermal discharge type

Publications (2)

Publication Number Publication Date
KR960019165U KR960019165U (en) 1996-06-19
KR200159003Y1 true KR200159003Y1 (en) 1999-10-15

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