KR0159965B1 - Semiconductor package having heat sink - Google Patents
Semiconductor package having heat sink Download PDFInfo
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- KR0159965B1 KR0159965B1 KR1019940028904A KR19940028904A KR0159965B1 KR 0159965 B1 KR0159965 B1 KR 0159965B1 KR 1019940028904 A KR1019940028904 A KR 1019940028904A KR 19940028904 A KR19940028904 A KR 19940028904A KR 0159965 B1 KR0159965 B1 KR 0159965B1
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- heat sink
- adhesive tape
- double
- attached
- sided adhesive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
본 발명은 히트싱크가 내장된 반도체 패키지에 관한 것으로서, 히트싱크가 내장된 반도체 패키지(1)에 있어서, 상기 히트싱크(2)의 상부면 양측에 양면접착테이프(8)를 부착하고, 이 양면접착테이프(8)의 상부에는 리드프레임(5)의 지지판(7)을 부착시켜 양면접착테이프(8)의 소모량을 최소화시키는 동시에 히트싱크와 리드프레임의 부착을 용이하게 함에 따라 반도체패키지의 제조경비를 감소키고 아울러 제품의 단가를 낮출수 있는 매우 유용한 효과가 있는 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package having a built-in heat sink, wherein a double-sided adhesive tape (8) is attached to both sides of an upper surface of the heat sink (2) in a semiconductor package (1) with a built-in heat sink. The support plate 7 of the lead frame 5 is attached to the upper portion of the adhesive tape 8 to minimize the consumption of the double-sided adhesive tape 8 and to facilitate the attachment of the heat sink and the lead frame. In addition to reducing the cost of the product is a very useful effect.
Description
제1도는 일반적인 히트싱크가 내장된 반도체패키지의 단면도.1 is a cross-sectional view of a semiconductor package incorporating a general heat sink.
제2도는 본 발명에 따른 히트싱크와 리드프레임의 부착상태를 나타낸 단면도.2 is a cross-sectional view showing the attachment state of the heat sink and the lead frame according to the present invention.
제3도는 본 발명의 실시예에 따른 리드프레임과 히트싱크의 부착상태를 나타낸 단면도.3 is a cross-sectional view showing the attachment state of the lead frame and the heat sink according to the embodiment of the present invention.
제4도는 제3도의 평면도.4 is a plan view of FIG.
제5도는 본 발명에 따른 히트싱크에 양면접착테이프가 부착된 상태의 평면도.5 is a plan view of the double-sided adhesive tape attached to the heat sink according to the present invention.
제6도는 종래의 히트싱크에 양면접착테이프가 부착된 상태의 평면도.6 is a plan view of a conventional double-sided adhesive tape attached to the heat sink.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
1 : 반도체패키지 2 : 히트싱크1: semiconductor package 2: heat sink
3 : 요홈부 4 : 연장부3: groove groove 4: extension portion
5 : 리드프레임 6 : 리드5: leadframe 6: lead
7 : 지지판 8 : 양면접착테이프7: support plate 8: double sided adhesive tape
c : 반도체칩c: semiconductor chip
본 발명은 히트싱크가 내장된 반도체 패키지에 관한 것으로서, 더욱 상세하게는 히트싱크와 리드프레임을 접착시키는 양면접착테이프의 소모량을 줄여 반도체 패키지의 제조경비를 감소시킬수 있도록 된 것이다.The present invention relates to a semiconductor package with a built-in heat sink, and more particularly, to reduce the manufacturing cost of the semiconductor package by reducing the consumption of the double-sided adhesive tape for bonding the heat sink and the lead frame.
일반적인 반도체 패키지는, 반도체칩에서 전기적 회로 작동에 의해 발생하는 열의 방출을 극대화 시키기 위하여 히트싱크를 내장하게 되는데, 이러한 히트싱크에는 반도체칩의 다이패드가 없는 리드프레임의 자재에 히트싱크를 부착하여 반도체칩을 보호하기 위하여 패키지몰딩하여 이루어 진다.A general semiconductor package includes a heat sink for maximizing heat dissipation generated by electrical circuit operation in a semiconductor chip. The heat sink is attached to a material of a lead frame without a die pad of the semiconductor chip. Package molding is done to protect the chip.
이와같이 이루어지는 반도체패키지의 종래에 있어서는, 제6도에 도시된 바와같이 히트싱크(2)의 상부에 리드프레임이 부착되도록 히트싱크(2)의 상부표면에 사각윈도우 형태의 양면접착테이프(8)를 부착하여 리드프레임(5)을 부착하는 것이다.In the conventional semiconductor package formed as described above, as shown in FIG. 6, a double-sided adhesive tape 8 in the form of a rectangular window is formed on the upper surface of the heat sink 2 so that the lead frame is attached to the top of the heat sink 2. By attaching the lead frame (5).
그러나, 이와같은 종래의 히트싱크(2)와 리드프레임(5)의 부착방법은 사각윈도우형태의 양면접착테이프(8)를 이용함에 따라 양면접착테이프(8)의 많은 소모(사각윈도우 내부의 양면접착테이프(8)는 모두 폐기 처분함)를 발생시킴에 따라 반도체패키지(1)의 제조경비를 상승시켜 제품의 단가가 높아지는 등의 문제점이 있었다.However, the conventional method of attaching the heat sink 2 and the lead frame 5 consumes much of the double-sided adhesive tape 8 by using the double-sided adhesive tape 8 in the form of a square window (both sides of the inside of the square window). As the adhesive tapes 8 are all disposed of), the manufacturing cost of the semiconductor package 1 is increased to increase the unit cost of the product.
또한, 종래의 히트싱크(2)와 리드프레임(5)의 부착방법은 리드프레임(5)의 인너리드 끝단만이 히트싱크(2)에 부착되어 있으므로서, 상호 떨어지는 단점이 내포되어 있는 것이다.In addition, the conventional method of attaching the heat sink 2 and the lead frame 5 is because only the inner lead end of the lead frame 5 is attached to the heat sink 2, so that the disadvantages of falling apart from each other are included.
따라서, 본 발명은 상기와 같은 종래의 문제점을 해결하기 위하여 안출한 것으로서, 전자회로가 집적되어 있는 반도체칩과, 상기한 반도체칩의 신호를 외부로 전달하는 리드와, 상기한 리드와 반도체칩의 신호를 전기적으로 연결해주는 와이어와, 상기 반도체칩의 회로동작시 발생되는 열을 외부로 방출하도록 반도체칩의 저면에 에폭시로 부착된 히트싱크와, 상기한 반도체칩과 그 외의 구성 부품들의 회로적 성질 및 기능적 특성을 보호하기 위하여 컴파운드재로 패키지 몰딩된 반도체 패키지에 있어서, 상기한 히트싱크의 상부면 양측에는 양면접착테이프를 부착하고, 상기 양면접착테이프에는 리드프레임의 리드 선단으로 연장 형성된 지지판을 부착하여 양면접착테이프의 소모량을 최소화시킬수 있도록 한 것을 목적으로 한다.Accordingly, the present invention has been made to solve the above-mentioned conventional problems, and includes a semiconductor chip in which an electronic circuit is integrated, a lead that transmits the signal of the semiconductor chip to the outside, and the lead and the semiconductor chip. Wires electrically connecting signals, heat sinks attached to the bottom of the semiconductor chip with epoxy to dissipate heat generated during circuit operation of the semiconductor chip, and circuit characteristics of the semiconductor chip and other components And a semiconductor package packaged with a compound material to protect functional characteristics, wherein a double-sided adhesive tape is attached to both sides of the upper surface of the heat sink, and a support plate extending to the lead end of the lead frame is attached to the double-sided adhesive tape. The purpose is to minimize the consumption of double-sided adhesive tape.
이하, 첨부된 도면에 의하여 본 발명의 구성을 보다 상세하게 설명하면 다음과 같다.Hereinafter, the configuration of the present invention in more detail with reference to the accompanying drawings as follows.
제2도는 본 발명에 따른 히트싱크와 리드프레임의 부착상태를 나타낸 단면도로로서, 히트싱크(2)의 상부 양측에 연장부(4)를 돌출 형성하고, 이 연장부(4)의 하부면에 양면접착테이프(8)를 부착하며, 상기 양면접착테이프(8)의 하부면에 리드프레임(5)의 리드(6) 선단으로 연장 형성된 지지판(7)을 부착시킨 것이다.2 is a cross-sectional view showing the attachment state of the heat sink and the lead frame according to the present invention, wherein the extension portions 4 are protruded from both sides of the upper portion of the heat sink 2, and the lower surface of the extension portion 4 is formed. The double-sided adhesive tape 8 is attached, and the support plate 7 extending to the tip of the lead 6 of the lead frame 5 is attached to the lower surface of the double-sided adhesive tape 8.
이렇게 히트싱크(2)와 리드프레임(5)의 지지판(7)이 양면접착테이프(8)로 부착된 히트싱크(2)의 상부 중앙에는 반도체칩(C)이 에폭시(E)로 접착되어 있고, 반도체칩(C)과 리드프레임(5)의 각 리드(6)사이에는 각 회로를 연결시키는 와이어(W)가 본딩되며 이후, 각 구성품들의 회로적 성질 및 기능적 특성을 보호하기 위하여 컴파운드재로 패키지(P)몰딩하여 완성품의 반도체패키지(1)를 구할수 있게 한 것이다.In this way, the semiconductor chip C is bonded with epoxy E at the center of the upper part of the heat sink 2 to which the heat sink 2 and the support plate 7 of the lead frame 5 are attached by the double-sided adhesive tape 8. A wire W is connected between the semiconductor chip C and each lead 6 of the lead frame 5 to bond the circuits. Then, as a compound material, to protect the circuit and functional characteristics of each component. By molding the package (P) it is possible to obtain a semiconductor package (1) of the finished product.
제3도 및 제4도는 본 발명의 실시예에 따른 리드프레임과 히트싱크의 부착상태를 나타낸 상태의 단면도 및 평면도로서, 다수개의 리드(6)가 구비된 리드프레임(5)의 리드(6)중에서 임의의 리드(6)를 연장 형성하여 지지판(7)을 형성하고, 이 지지판(7)이 히트싱크(2)의 상부면 양측에 형성된 요홈부(3)에 부착된 양면접착테이프(8)의 상부에 부착되어 있다.3 and 4 are cross-sectional views and a plan view of a state in which a lead frame and a heat sink are attached according to an exemplary embodiment of the present invention, and the lead 6 of the lead frame 5 having a plurality of leads 6 is provided. An arbitrary lead 6 is extended to form a support plate 7, and the support plate 7 is attached to the groove 3 formed on both sides of the upper surface of the heat sink 2. It is attached to the top of the.
제5도는 본 발명에 따른 히트싱크에 양면접착테이프가 부착된 상태의 평면도로서, 히트싱크(2)의 상부면 양측에 양면접착테이프(8)를 부착하여 히트싱크(2)의 상부면 상하측에 양면접착테이프(8)가 없도록 한 것이다.5 is a plan view of the heat sink in which the double-sided adhesive tape is attached to the heat sink, and the double-sided adhesive tape 8 is attached to both sides of the upper surface of the heat sink 2 so that the upper surface of the heat sink 2 is upper and lower sides. There is no double-sided adhesive tape (8).
이와같이 구성된 본 고안의 작용 및 효과를 상세하게 설명하면 다음과 같다.Referring to the operation and effects of the present invention configured in this way as follows.
반도체패키지(1)의 반도체칩(C)이 안치되는 히트싱크(2)의 상부면 양측에 양면접착테이프(8)를 부착하고, 이 양면접착테이프(8)의 상부면에 리드프레임(5)의 리드(6) 선단으로 연장 형성된 지지판(7)을 부착시킴으로써, 양면접착테이프(8)의 소모량을 줄일수 있는 것이다.The double-sided adhesive tape 8 is attached to both sides of the upper surface of the heat sink 2 on which the semiconductor chip C of the semiconductor package 1 is placed, and the lead frame 5 is attached to the upper surface of the double-sided adhesive tape 8. By attaching the support plate 7 extending to the tip of the lid 6, the consumption of the double-sided adhesive tape 8 can be reduced.
또한, 상기 히트싱크(2)의 상부양측에 외부로 돌출 형성되는 연장부(4)를 형성하고, 이 연장부(4)의 하부면에 양면접착테이프(8)를 부착하며, 상기 양면접착테이프(8)의 하부면에 리드프레임(5)의 지지판(7)을 부착함에 따라 양면접착테이프(8)를 히트싱크(2)의 연장부(4) 하부면 일측방에만 부착시켜 양면접착테이프(8)의 소모량을 줄이면서 용이하게 부착할 수 있도록 하고, 또한 히트싱크(2)가 리드프레임(5)에 견고하게 부착된 것이다.In addition, an extension part 4 protruding to the outside is formed on both upper sides of the heat sink 2, and a double-sided adhesive tape 8 is attached to a lower surface of the extension part 4, and the double-sided adhesive tape is formed. As the supporting plate 7 of the lead frame 5 is attached to the lower surface of the 8, the double-sided adhesive tape 8 is attached only to one side of the lower surface of the extension 4 of the heat sink 2. It is possible to easily attach while reducing the consumption of 8), and also the heat sink 2 is firmly attached to the lead frame (5).
상기와 같이 종래에는 히트싱크(2)의 상부면에 사각윈도우 형태의 양면접착 테이프(8)가 부착되었던 것을 본 발명에서 히트싱크(2)의 상부면 양측에만 양면접착 테이프(8)를 부착시킴으로써, 양면접착테이프의 소모량을 절감시킬 수 있는 것이다.As described above, by attaching the double-sided adhesive tape 8 only to both sides of the upper surface of the heat sink 2 in the present invention, the double-sided adhesive tape 8 having a rectangular window shape is attached to the top surface of the heat sink 2. The consumption of double-sided adhesive tape can be reduced.
이상에서와 같이 본 발명은 히트싱크의 상부면 양측에 양면접착테이프를 부착하고, 이 양면접착테이프에 리드프레임의 지지판을 부착시켜 양면접착테이프의 소모량을 최소화시키는 동시에, 히트싱크와 리드프레임의 부착을 용이하게 함에 따라 반도체패키지의 제조경비를 감소시키고, 아울러 제품의 단가를 낮출수 있는 매우 유용한 효과가 있는 것이다.As described above, the present invention attaches the double-sided adhesive tape to both sides of the upper surface of the heat sink, and attaches the support plate of the lead frame to the double-sided adhesive tape to minimize the consumption of the double-sided adhesive tape, and at the same time to attach the heat sink and the lead frame. By facilitating the reduction of the manufacturing cost of the semiconductor package, and also has a very useful effect that can lower the cost of the product.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940028904A KR0159965B1 (en) | 1994-11-04 | 1994-11-04 | Semiconductor package having heat sink |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940028904A KR0159965B1 (en) | 1994-11-04 | 1994-11-04 | Semiconductor package having heat sink |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960019678A KR960019678A (en) | 1996-06-17 |
| KR0159965B1 true KR0159965B1 (en) | 1998-12-01 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940028904A KR0159965B1 (en) | 1994-11-04 | 1994-11-04 | Semiconductor package having heat sink |
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| Country | Link |
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| KR (1) | KR0159965B1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100343462B1 (en) * | 1999-12-08 | 2002-07-11 | 박종섭 | Chip size package |
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1994
- 1994-11-04 KR KR1019940028904A patent/KR0159965B1/en not_active IP Right Cessation
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| Publication number | Publication date |
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| KR960019678A (en) | 1996-06-17 |
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