KR20010072504A - 바이어스를 유도하지 않고서 고정 소수점 포맷으로 신호를압축하는 방법 및 장치 - Google Patents

바이어스를 유도하지 않고서 고정 소수점 포맷으로 신호를압축하는 방법 및 장치 Download PDF

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Publication number
KR20010072504A
KR20010072504A KR1020017001935A KR20017001935A KR20010072504A KR 20010072504 A KR20010072504 A KR 20010072504A KR 1020017001935 A KR1020017001935 A KR 1020017001935A KR 20017001935 A KR20017001935 A KR 20017001935A KR 20010072504 A KR20010072504 A KR 20010072504A
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KR
South Korea
Prior art keywords
signal
bit
bits
output
rounding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020017001935A
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English (en)
Korean (ko)
Inventor
크리스토퍼 씨. 리들
제프리 에이. 레빈
Original Assignee
러셀 비. 밀러
콸콤 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 러셀 비. 밀러, 콸콤 인코포레이티드 filed Critical 러셀 비. 밀러
Publication of KR20010072504A publication Critical patent/KR20010072504A/ko
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G06F7/49952—Sticky bit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G06F7/49963—Rounding to nearest

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
KR1020017001935A 1998-08-14 1999-08-13 바이어스를 유도하지 않고서 고정 소수점 포맷으로 신호를압축하는 방법 및 장치 Withdrawn KR20010072504A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/134,248 US6148317A (en) 1998-08-14 1998-08-14 Method and apparatus for compressing signals in a fixed point format without introducing a bias
US09/134,248 1998-08-14
PCT/US1999/018546 WO2000010253A2 (en) 1998-08-14 1999-08-13 A method and apparatus for compressing signals in a fixed point format without introducing a bias

Publications (1)

Publication Number Publication Date
KR20010072504A true KR20010072504A (ko) 2001-07-31

Family

ID=22462453

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020017001935A Withdrawn KR20010072504A (ko) 1998-08-14 1999-08-13 바이어스를 유도하지 않고서 고정 소수점 포맷으로 신호를압축하는 방법 및 장치

Country Status (11)

Country Link
US (1) US6148317A (enExample)
EP (1) EP1110325B1 (enExample)
JP (1) JP4354648B2 (enExample)
KR (1) KR20010072504A (enExample)
CN (1) CN1321269A (enExample)
AT (1) ATE270009T1 (enExample)
AU (1) AU767325B2 (enExample)
CA (1) CA2340421A1 (enExample)
DE (1) DE69918313T2 (enExample)
RU (1) RU2233024C2 (enExample)
WO (1) WO2000010253A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6243728B1 (en) * 1999-07-12 2001-06-05 Sony Corporation Of Japan Partitioned shift right logic circuit having rounding support
GB0031771D0 (en) * 2000-12-29 2001-02-07 Lsi Logic Corp Bit reduction using dither,rounding and error feedback
JP3755602B2 (ja) * 2003-03-04 2006-03-15 ソニー株式会社 信号処理装置、信用処理装置用プログラム、信号処理装置用プログラムを記録した記録媒体、及び信号処理方法
US8301803B2 (en) 2009-10-23 2012-10-30 Samplify Systems, Inc. Block floating point compression of signal data

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3199371B2 (ja) * 1990-07-30 2001-08-20 松下電器産業株式会社 丸め装置
EP0511971A4 (en) * 1990-11-09 1993-08-11 Adaptive Solutions, Inc. Unbiased bit disposal apparatus and method
US5214598A (en) * 1990-11-09 1993-05-25 Adaptive Solutions, Inc. Unbiased bit disposal apparatus and method
EP0670096A4 (en) * 1992-11-16 1996-03-27 Multimedia Systems Corp METHOD FOR PRODUCING AND TRANSMITTING IMPROVED INTERACTIVE MULTIMEDIA INFORMATION.
US5491516A (en) * 1993-01-14 1996-02-13 Rca Thomson Licensing Corporation Field elimination apparatus for a video compression/decompression system
TW224553B (en) * 1993-03-01 1994-06-01 Sony Co Ltd Method and apparatus for inverse discrete consine transform and coding/decoding of moving picture
US5424967A (en) * 1993-11-29 1995-06-13 Hewlett-Packard Company Shift and rounding circuit and method
US5594660A (en) * 1994-09-30 1997-01-14 Cirrus Logic, Inc. Programmable audio-video synchronization method and apparatus for multimedia systems
US5696710A (en) * 1995-12-29 1997-12-09 Thomson Consumer Electronics, Inc. Apparatus for symmetrically reducing N least significant bits of an M-bit digital signal

Also Published As

Publication number Publication date
JP2002523913A (ja) 2002-07-30
US6148317A (en) 2000-11-14
WO2000010253A3 (en) 2000-05-18
JP4354648B2 (ja) 2009-10-28
AU5486699A (en) 2000-03-06
DE69918313T2 (de) 2005-09-29
CN1321269A (zh) 2001-11-07
ATE270009T1 (de) 2004-07-15
AU767325B2 (en) 2003-11-06
RU2233024C2 (ru) 2004-07-20
EP1110325A2 (en) 2001-06-27
DE69918313D1 (de) 2004-07-29
WO2000010253A2 (en) 2000-02-24
EP1110325B1 (en) 2004-06-23
CA2340421A1 (en) 2000-02-24

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KR20010072504A (ko) 바이어스를 유도하지 않고서 고정 소수점 포맷으로 신호를압축하는 방법 및 장치
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Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20010214

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1202 Submission of document of withdrawal before decision of registration

Comment text: [Withdrawal of Procedure relating to Patent, etc.] Withdrawal (Abandonment)

Patent event code: PC12021R01D

Patent event date: 20040729

WITB Written withdrawal of application