KR20010056976A - Method for forming diffusion barrier layer in semiconductor device - Google Patents
Method for forming diffusion barrier layer in semiconductor device Download PDFInfo
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- KR20010056976A KR20010056976A KR1019990058687A KR19990058687A KR20010056976A KR 20010056976 A KR20010056976 A KR 20010056976A KR 1019990058687 A KR1019990058687 A KR 1019990058687A KR 19990058687 A KR19990058687 A KR 19990058687A KR 20010056976 A KR20010056976 A KR 20010056976A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
Abstract
Description
본 발명은 반도체 소자의 제조 방법에 관한 것으로, 특히 열안정성 및 확산방지특성이 우수한 확산방지막의 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a diffusion barrier film having excellent thermal stability and diffusion prevention characteristics.
일반적으로 반도체 소자 제조 공정중 메탈콘택(Metal contact) 또는 강유전체 캐패시터 제조에서 확산방지막(Diffusion stop layer)을 형성한다.In general, a diffusion stop layer is formed in the manufacture of a metal contact or a ferroelectric capacitor during a semiconductor device manufacturing process.
첨부도면 도 1a 내지 도 1b를 참조하여 종래기술에 따른 확산방지막의 형성 방법에 대해 설명하기로 한다.1A to 1B, a method of forming a diffusion barrier according to the prior art will be described.
도 1a에 도시된 바와 같이, 반도체 기판(11) 상부에 티타늄(12), 티타늄나이트라이드(13)를 적층하고, 이어 오믹접촉저항(Ohmic contact resistance)을 낮추기 위하여 후속 열처리를 진행한다.As shown in FIG. 1A, titanium 12 and titanium nitride 13 are stacked on the semiconductor substrate 11, followed by subsequent heat treatment to lower ohmic contact resistance.
도 1b에 도시된 바와 같이, 상기 열처리 공정에 의해 반도체 기판(11)과 티타늄(12)이 실리사이드반응을 하여 상기 반도체기판(11) 상에 티타늄실리사이드 (14)를 형성한다.As shown in FIG. 1B, a titanium silicide 14 is formed on the semiconductor substrate 11 by silicide reaction between the semiconductor substrate 11 and the titanium 12 by the heat treatment process.
여기서 상기 티타늄나이트라이드(13) 증착시 티타늄(Ti)과 나이트라이드(N)의 조성비가 1:1 인 물리적기상증착(PVD)막인 티타늄나이트라이드(13)을 주로 사용하였다.Here, titanium nitride (13), which is a physical vapor deposition (PVD) film having a composition ratio of titanium (Ti) and nitride (N) of 1: 1, was mainly used.
상기와 같이 제조된 티타늄나이트라이드는 입계를 갖는 주상정 조직으로서 메탈콘택에 적용할 경우, 금속과 실리콘간의 상호확산을 방지할 수 있는 확산방지막특성이 취약하다. 또한 강유전체 캐패시터전극의 확산방지막으로 사용할 때에는 캐패시터 제조후 고온 열공정시 티타늄나이트라이드의 취약한 확산방지력 및 나쁜 내산화특성으로 인하여 소자 특성을 현저히 저하시키는 문제점이 있다.Titanium nitride prepared as described above is weak in diffusion barrier properties that can prevent mutual diffusion between metal and silicon when applied to a metal contact as a columnar structure having grain boundaries. In addition, when used as a diffusion barrier of the ferroelectric capacitor electrode, there is a problem in that the device characteristics are significantly degraded due to the weak diffusion prevention ability of titanium nitride and poor oxidation resistance during the high temperature thermal process after the capacitor is manufactured.
본 발명은 상기의 문제점을 해결하기 위해 안출한 것으로서, 티타늄실리사이드(TiSi)와 티타늄실리콘나이트라이드(TiSiN)의 적층이중막 구조를 갖는 확산방지막을 형성하는데 적합한 확산방지막의 형성 방법을 제공하는데 그 목적이 있다.The present invention has been made to solve the above problems, to provide a method of forming a diffusion barrier film suitable for forming a diffusion barrier film having a laminated double layer structure of titanium silicide (TiSi) and titanium silicon nitride (TiSiN). There is this.
도 1a 내지 도 1b 는 종래기술에 따른 확산방지막의 제조 방법을 나타낸 도면,1a to 1b is a view showing a manufacturing method of the diffusion barrier according to the prior art,
도 2a 내지 도 2b 는 본 발명의 실시예에 따른 확산방지막의 제조 방법을 나타낸 도면,2a to 2b is a view showing a method of manufacturing a diffusion barrier according to an embodiment of the present invention,
*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
21 : 실리콘 기판 22 : 티타늄나이트라이드21 silicon substrate 22 titanium nitride
23 : 티타늄실리사이드 24 : 티타늄실리콘나이트라이드23: titanium silicide 24: titanium silicon nitride
상기의 목적을 달성하기 위한 본 발명의 확산방지막의 형성 방법은 실리콘기판 상부에 티타늄이 다량 함유된 티타늄나이트라이드를 형성하는 제 1 단계, 상기 결과물 전면에 실리콘기를 함유한 가스 분위기에서 열처리하여 상기 티타늄나이트라이드에 함유된 티타늄과 실리콘 기판의 고상반응에 의해 티타늄실리사이드를 형성하는 제 2 단계, 상기 열처리시 상기 티타늄실리사이드 형성과 동시에 실리콘기를 함유한 티타늄실리콘나이트라이드를 형성하는 제 3 단계를 포함하여 이루어짐을 특징으로 한다.The method of forming a diffusion barrier film of the present invention for achieving the above object is a first step of forming a titanium nitride containing a large amount of titanium on the silicon substrate, heat treatment in a gas atmosphere containing a silicon group on the entire surface of the resultant titanium A second step of forming titanium silicide by a solid phase reaction of titanium contained in a nitride and a silicon substrate, and a third step of forming titanium silicon nitride containing silicon groups simultaneously with the formation of the titanium silicide during the heat treatment. It is characterized by.
이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부 도면을 참조하여 설명하기로 한다.Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .
도 2a 내지 도 2c 는 본 발명의 실시예에 따른 반도체 소자의 확산방지막의 형성 방법을 나타낸 도면이다.2A to 2C illustrate a method of forming a diffusion barrier of a semiconductor device in accordance with an embodiment of the present invention.
도 2a에 도시된 바와 같이, 실리콘 기판(21) 상부에 티타늄이 다량 함유된 티타늄나이트라이드(TiNx)(22)을 증착한다. 여기서 x는 1보다 작은 범위 즉, 티타늄과 나이트라이드의 조성비에 있어서 나이트라이드의 조성비가 낮다.As shown in FIG. 2A, a titanium nitride (TiN x ) 22 containing a large amount of titanium is deposited on the silicon substrate 21. Here, x has a low composition ratio of nitride in a range smaller than 1, that is, a composition ratio of titanium and nitride.
도 2b 에 도시된 바와 같이, 상기 티타늄나이트라이드(22) 상부에 SiH4또는 Si기를 함유한 가스 분위기하에서 플라즈마 처리 또는 고온 열처리 공정을 수행한다. 상기 플라즈마처리 또는 고온 열처리 공정은 최소 400∼900℃온도에서 수행한다.As shown in FIG. 2B, a plasma treatment or a high temperature heat treatment may be performed under a gas atmosphere containing SiH 4 or Si groups on the titanium nitride 22. The plasma treatment or high temperature heat treatment process is performed at a temperature of at least 400 ~ 900 ℃.
이 때 실리콘기판(21) 상부에는 SiH4또는 Si기를 함유한 분위기하의 고온 열공정시 높은 온도로 인하여 티타늄나이트라이드(22)내에 초과 함유되어 있는 티타늄(Ti)과 실리콘기판(21)의 고상반응에 의하여 티타늄실리사이드(23)가 형성된다.At this time, due to the high temperature during the high temperature heat process in the atmosphere containing SiH 4 or Si group, the silicon substrate 21 is subjected to the solid phase reaction of titanium (Ti) and silicon substrate 21 which are excessively contained in the titanium nitride 22. As a result, titanium silicide 23 is formed.
또한 동시에 티타늄나이트라이드(22) 상부 표면은 SiH4또는 Si기를 함유한 분위기에서의 플라즈마처리 또는 고온 열처리에 의하여 티타늄나이트라이드(22) 상부층은 실리콘(Si)기를 일정량 함유한 티타늄실리콘나이트라이드(24)가 형성된다.At the same time, the upper surface of the titanium nitride 22 is formed by SiH 4 or Si group by plasma treatment or high temperature heat treatment. The upper layer of the titanium nitride 22 contains titanium (Si) group in a predetermined amount. ) Is formed.
즉 티타늄나이트라이드(22)는 각각 반응에 의해 티타늄실리사이드(23)와 티타늄실리콘나이트라이드(24)로 형성되어 실리콘기판(21) 상부에 티타늄실리사이드와 티타늄실리콘나이트라이드의 이중막 구조의 확산방지막(25)이 형성된다.That is, the titanium nitride 22 is formed of titanium silicide 23 and titanium silicon nitride 24 by reaction, respectively, so that the diffusion barrier layer of the double layer structure of titanium silicide and titanium silicon nitride is formed on the silicon substrate 21. 25) is formed.
여기서 상기 티타늄실리콘나이트라이드(24)내에 함유된 실리콘은 플라즈마 처리시 RF 전원, 처리시간, 온도, 압력을 조절하여 그 함유량이 조절된다.Here, the silicon contained in the titanium silicon nitride 24 is adjusted by adjusting the RF power, processing time, temperature, and pressure during plasma processing.
특히 상부에 형성된 티타늄실리콘나이트라이드(24)은 삼원계 즉, 티타늄, 실리콘, 나이트라이드로 이루어진 비정질층으로서 확산방지특성 및 내산화 특성이 우수하다. 또한 종래의 물리적기상증착법으로 형성된 티타늄나이트라이드의 주상정조직과는 달리 입계가 없는 비정질 구조이다.In particular, the titanium silicon nitride 24 formed thereon is an amorphous layer made of ternary, that is, titanium, silicon, and nitride, and has excellent diffusion preventing and oxidation resistance. In addition, unlike the columnar crystal structure of titanium nitride formed by the conventional physical vapor deposition method, it is an amorphous structure without grain boundaries.
도면에 도시되지 않았지만, 본 발명의 실시예에 따른 이중막 구조의 확산방지막은 금속배선의 콘택 또는 강유전체 캐패시터의 확산방지막으로 적용할 수 있다.Although not shown in the drawings, the diffusion barrier of the double layer structure according to the embodiment of the present invention may be applied as a diffusion barrier of a contact of a metal wiring or a ferroelectric capacitor.
본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위 내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
상술한 바와 같은 본 발명의 확산방지막의 형성 방법은 제조 공정이 단순하고 삼원계의 비정질 확산방지막을 형성하므로써 반도체 소자의 전기적 특성 및 신뢰성을 향상시킬 수 있는 효과가 있다.The method of forming the diffusion barrier film of the present invention as described above has the effect of improving the electrical properties and reliability of the semiconductor device by the simple manufacturing process and forming a three-dimensional amorphous diffusion barrier film.
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