KR20010008610A - Formation method for isolation layer of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming an isolation layer by using a shallow trench isolation is provided to realize a rounded bottom in a trench with a wet process of relatively lower temperature. CONSTITUTION: After a pad oxide layer(102) is formed on a silicon substrate(101), a nitride layer and an anti-reflective coating layer are deposited thereon. The nitride layer and the substrate(101) are then etched to form a slope-shaped trench therein. Thereafter, a sidewall sacrificial oxide layer is formed in the trench to compensate for etching damage and then removed. After that, another sidewall oxide layer(301) is formed in the trench with a wet process of low temperature preferably below 900 deg.C to relieve sharp bottom corners of the trench. In addition, a liner oxide layer(401) is deposited in the trench, and a field oxide layer(402) is then deposited to fill the trench. After the layers(401,402) are planarized by a chemical-mechanical polishing process, the nitride layer is removed.

Description

TECHNICAL FIELD METHOD FOR ISOLATION LAYER OF SEMICONDUCTOR DEVICE

The present invention relates to a method of forming a device isolation film of a semiconductor device, and in particular, in the process using the shallow trench isolation (STI) method, the oxide film is formed by a low-temperature wet method after the deposition of the sidewall dilution film after trench etching. A method of implementing trench bottom rounding is disclosed.

In general, in order to form transistors and capacitors on a semiconductor substrate, an isolation region is formed in the semiconductor substrate to prevent electrical conduction from an electrically conducting active region and to separate the devices from each other. Will form.

As described above, in the process of forming a device isolation film by growing a pad oxide film to separate the devices, the nitride film is etched using a masking process of a pad oxide film and a nitride film on a semiconductor substrate, and a portion of the etched device isolation region is formed. There is a LOCOS (LOCal Oxidation of Silicon) process for forming device isolation, and PBLOCOS (PBLOCOS) for growing a device isolation layer by buffering a polysilicon film that serves as a buffer between the pad oxide film and the nitride film of the LOCOS process. Poly Buffured LOCal Oxidation of Silicon) process is used.

In addition, by forming a trench having a constant depth in the semiconductor substrate and depositing an oxide film on the trench and etching unnecessary portions of the oxide film by a CMP (Chemical Mechanical Polishing) process, a shallow trench isolation that forms a device isolation region on the semiconductor substrate. ), And the STI (Shallow Trench Isolation) process has many advantages, such as the reduction of Bird's Beak, compared to the conventional LOCOS process. As such, the present invention proposes a new process for forming an isolation layer using an STI process.

Formation of side wall sacrificial oxide to remove the etch damage caused by the trench etching process during STI process is carried out at a high temperature of over 1000 ℃ for the purpose of rounding the trench top. An oxide film is formed. When the oxide film is formed at a high temperature and dryness, the top portion of the trench is rounded, but the bottom portion of the trench is heavily angled. This part is a mechanical stress concentration part, which causes defect formation by subsequent thermal process and oxidation process, which causes the increase of cell leakage current and device defect.

In order to solve the problems described above, the present invention reduces the stress concentrated in the trench bottom portion by using an oxide film formation process of a low temperature wet method after the formation of the high temperature sidewall dilution film. The goal is to mitigate trench bottom rounding.

1 to 5 illustrate a process of forming an isolation layer using an STI process according to the present invention.

Explanation of symbols on the main parts of the drawings

101: semiconductor substrate (Si-substrate)

102: Pad Oxide

103: nitride film (ISO Nitride)

104: Trench

201: Side Wall Sacrificial Oxide

301: Side Wall Oxide by Low Temperature Wet Method

401: Liner Oxide

402: Field Oxide

In order to achieve the above object, the present invention provides a method for forming a device isolation film in a semiconductor device manufacturing process, the method comprising: depositing a pad oxide film and a nitride film on a semiconductor substrate; Depositing an antireflection film (ARC) and forming a device isolation pattern after the step; Etching the pad oxide film, the nitride film, and the semiconductor substrate after the step to form a trench; Forming and removing a sidewall dilution film after the step; Forming a sidewall oxide film and a liner oxide film and a field oxide film by a low temperature wet method after the step; Planarizing using CMP after the step; And removing the nitride film after the above process.

In the above process, the formation of the sidewall dilution film is preferably carried out by a dry oxidation method at a high temperature of 1000 ° C. or higher, and preferably, a thickness of 100 to 200 kPa. In addition, it is preferable to remove the said side wall dilution film using the solution containing HF.

In the above process, the sidewall oxide film is preferably formed by a wet oxidation method at a low temperature of 900 ° C. or lower, and preferably formed in a thickness of about 50 to 300 kPa. In addition, in the low temperature wet oxidation method, the ratio of O ₂ and H ₂ gas is preferably in the range of 1: 1 to 1.5: 1, and the amount of oxygen gas is preferably in the range of 1 to 30 slpm.

Hereinafter, the configuration of the present invention will be described in more detail with reference to the accompanying drawings.

First, a pad oxide 102 is formed on the silicon substrate 101 to relieve stress of nitride, and then a chemical vapor deposition (CVD) nitride 103 for ISO patterning is deposited. After the above process, an oxynitride anti-reflective coating layer (ARC) is deposited in order to improve the patterning ability, and then a photosensitive film is applied. After the above process, the photoresist layer is removed after the lithography process and the ISO nitride 103 are etched and the silicon substrate 101 is etched to form a trench structure having a slope shape. The process is completed is shown in Figure 1 below.

The sidewall dilution film 201 is formed in FIG. 2 to compensate for the etch damage caused by the ISO nitride and the trench etching process.

After the sidewall dilution film 201 is removed using a dilute hydrofluoric acid solution, the sidewall oxide film 301 is formed by a low temperature wet oxide film formation process proposed in the present invention to mitigate the facet of the trench bottom portion. The process is completed is shown in Figure 3 below.

A liner oxide 401 is deposited to fill the void portion generated due to the lost portion of the sidewall oxide sacrificial film, and the trench portion is deposited into the field oxide film 402. 4 shows a state where the process is completed.

After the planarization is performed by the CMP process, the formation of the STI insulating film is completed by removing the ISO nitride film with a phosphoric acid (H ₃ PO ₄ ) solution. The process is completed is shown in Figure 5 below.

As described above, according to the present invention, by forming trench bottom rounding in the STI process when forming an insulating film of a semiconductor device, transistor characteristics are improved by preventing leakage current increase, preventing defect formation, and preventing defects in the device. You can see the effect. In addition, by using a low temperature wet process instead of a high temperature dry process, it is possible to reduce the cost of the unit process to reduce the production cost.

Claims (7)

Depositing a pad oxide film and a nitride film on a semiconductor substrate; Depositing an antireflection film and forming a device isolation pattern after the step; Etching the pad oxide film, the nitride film, and the semiconductor substrate after the step to form a trench; Forming and removing a sidewall dilution film after the step; Forming a sidewall oxide film and a liner oxide film and a field oxide film by a low temperature wet method after the step; Planarizing using CMP after the step; And removing the nitride film after the process. The method of claim 1, wherein the sidewall sacrificial oxide film is formed by a dry oxidation method at a high temperature of 1000 ° C. or higher. The method of claim 1 or 2, wherein the sidewall sacrificial oxide film has a thickness of 100 to 200 GPa. The method of claim 1, wherein the sidewall sacrificial oxide film is removed using a solution containing HF. The method of claim 1, wherein the sidewall oxide film is formed by a wet oxidation method at a temperature of 900 ° C. or lower. The method of claim 5, wherein the low-temperature wet oxidation of the O ₂ and H ₂ gas is used in a ratio of 1: 1 to 1.5: 1 and the amount of oxygen gas is 1 to 30 slpm of the semiconductor device, characterized in that Method of forming a device isolation film during the manufacturing process. The method of claim 1 or 5, wherein the sidewall oxide film has a thickness of about 50 to about 300 GPa.