KR20010003830A - Solid state image pickup device and method of fabricating the same - Google Patents

Abstract

PURPOSE: A method for manufacturing a solid-state image device is provided to increase charge transfer efficiency of a horizontal charge coupled device, by applying a clock to three poly gates adjacent to each other, and by selectively forming a barrier layer under the poly gates, so that a potential difference in a horizontal charge transfer region is generated during the same clock to move electrons. CONSTITUTION: A horizontal charge transfer region(22) is formed on a semiconductor substrate(21). A gate insulating layer(23) is formed on the semiconductor substrate. A plurality of the first poly gates(24) having a constant interval are formed on the gate insulating layer. The first barrier ions are injected into the entire surface to form the first barrier layer(25) in the horizontal charge transfer region by using the first poly gates as a mask. A plurality of the second poly gates(26) having a constant interval and connected to a side of the first poly gates are formed on the gate insulating layer. The second barrier ions are injected into the entire surface to form the second barrier layer(27) in the horizontal charge transfer region by using the first and second poly gates as a mask. A plurality of the third poly gates(28) having a constant interval and connected to a side of the second poly gates are formed on the gate insulating layer.

Description

Solid-state image sensor and its manufacturing method {SOLID STATE IMAGE PICKUP DEVICE AND METHOD OF FABRICATING THE SAME}

TECHNICAL FIELD The present invention relates to a solid state image pickup device, and more particularly, to a suitable solid state image pickup device for increasing charge transfer efficiency and a method of manufacturing the same.

In general, a solid-state imaging device refers to a device that photographs a subject using an photoelectric conversion device and a charge coupling device to output an electrical signal.

Charge-coupled devices are used to transfer signal charges generated in photoelectric conversion devices in a specific direction by using a change in potential within a substrate.

The solid-state imaging device includes a plurality of photoelectric conversion regions PD, a vertical charge transfer region VCCD configured between the photoelectric conversion regions to transfer charges generated in the photoelectric conversion regions in a vertical direction, and the vertical charges. A horizontal charge transfer region (HCCD) for transferring the charges transferred in the vertical direction by the transfer region in the horizontal direction again, and a sensing amplifier for sensing and amplifying the horizontal transferred charges and output them to the peripheral circuit.

Hereinafter, a conventional solid-state imaging device will be described with reference to the accompanying drawings.

1 is a structural cross-sectional view showing a conventional horizontal charge transfer device.

As shown in FIG. 1, the horizontal charge transfer region 12 formed on the surface of the semiconductor substrate 11 and the horizontal charge transfer region 12 are formed at regular intervals in the horizontal charge transfer region 12 so that the horizontal charge transfer is carried out at the time of image charge transfer. Barrier layer 13 having a potential level of region 12 having a step, gate insulating layer 14 formed on horizontal charge transfer region 12 on which barrier layer 13 is formed, and barrier layer 13 ) Are formed on a plurality of first poly gates 15 that are formed at regular intervals on the gate insulating layer 14 on which they are not formed, and on the barrier layer 13 on which the first poly gates 15 are not formed. And a plurality of second poly gates 16 insulated from the first poly gate 15 and formed at regular intervals.

The image charge is moved in one direction by applying a clock of two phases to the first and second poly gates 15 and 16 of the horizontal charge coupling device configured as described above.

That is, the image charge is moved in one direction by the potential change by the barrier layer 13 formed by the clock and ion implantation processes of 0V and 5V repeatedly applied to the first and second poly gates 15 and 16. Let's go.

2 is a potential profile of a conventional horizontal charge transfer device.

As shown in FIG. 2, a stepped potential well is formed by the barrier layer 13 formed by the ion implantation process and the clocks H1 and H2 applied to the first and second poly gates 15 and 16. Can be formed.

The electrons gather here because the bottom of the potential well is at a low energy level.

When t = 1, the bottom of the potential well is at the bottom of the potential well, and when t = 2, the gates 1 and 2 are high, so the level goes down and gates 3 and 4 are low, so the level goes up.

However, the electrons gathered at Gate 4 cannot move to the left because there is a potential barrier by doping on the left.

On the other hand, when the level of gates 5 and 6 is gradually lowered so that the potential barrier on the right side of gate 4 is removed, electrons under gate 4 are quickly moved under the gates 5 and 6 with low energy levels.

When the bias of gates 5 and 6 is high enough, a stepped potential well is formed again, and the position where electrons are gathered is changed from gate 4 to gate 6.

When t = 3, the gates 1, 2, 5, 6 are low and the gates 3, 4, 7, 8 are high, which is the same as the case of t = 0.

From t = 1 to t = 3, there is a period of clock pulses, during which electrons are moved from gate 3 to gate 8 below.

As described above, since the two-phase charge transfer device can quickly transfer charges using two clock pulses, it is often applied to HCCD for horizontal scanning of an image sensor.

However, in the conventional solid-state imaging device as described above, there are the following problems.

That is, it is difficult to increase the charge transfer efficiency when the amount of the image signal electrons is low in low light.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a solid-state imaging device and a method of manufacturing the same, which increase the charge transfer efficiency of a horizontal charge transfer device.

1 is a structural cross-sectional view showing a conventional horizontal charge transfer device

2 is a potential profile of a conventional horizontal charge transfer device.

3 is a structural cross-sectional view showing a horizontal charge transfer device according to the present invention.

4A to 4D are structural cross-sectional views showing a horizontal charge transfer device according to the present invention.

5 is a potential profile of a horizontal charge transfer device according to the present invention.

Explanation of symbols for the main parts of the drawings

21 semiconductor substrate 22 horizontal charge transfer region

23 gate insulating film 24 first poly gate

25: first barrier layer 26: second poly gate

27: second barrier layer 28: third poly gate

The solid-state imaging device according to the present invention for achieving the above object is formed with a horizontal charge transfer region formed on the surface of the semiconductor substrate, and at a predetermined interval in the horizontal charge transfer region, the horizontal charge transfer at the time of image charge transfer The first and second barrier layers having the stepped potential level have a step, the gate insulating film formed on the entire surface of the semiconductor substrate, and the gate insulating film on which the first and second barrier layers are not formed. A plurality of first poly gates, a plurality of second poly gates contacting one side of the first poly gate at regular intervals on the gate insulating film on which the first barrier layer is formed, and a gate insulating film on which the second barrier layer is formed. And comprising a plurality of third poly gates which are in contact with one side of the second poly gate at regular intervals. do.

In addition, the method of manufacturing a solid-state imaging device according to the present invention for achieving the above object comprises the steps of forming a horizontal charge transfer region on the surface of the semiconductor substrate, forming a gate insulating film on the front surface of the semiconductor substrate, Forming a plurality of first poly gates having a predetermined distance on the gate insulating layer, and injecting primary barrier ions into the front surface using the first poly gate as a mask to form a first barrier layer in a horizontal charge transfer region. Forming a plurality of second poly gates on the gate insulating layer, the plurality of second poly gates contacting one side of the first poly gate at regular intervals, and using the first and second poly gates as masks; Implanting ions to form a second barrier layer in the horizontal charge transfer region; And forming a plurality of third poly gates in contact with one side of the second poly gate.

Hereinafter, a solid-state imaging device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a structural cross-sectional view showing a horizontal charge transfer device according to the present invention.

As shown in FIG. 3, the horizontal charge transfer region 22 formed on the surface of the semiconductor substrate 21 and the horizontal charge transfer region 22 are formed at regular intervals so that the horizontal charge is transferred when the image charge is transferred. The first and second barrier layers 25 and 27 having the potential level of the transfer region 22 having a step, the gate insulating film 23 formed on the entire surface of the semiconductor substrate 21, and the first and second A plurality of first poly gates 24 formed at regular intervals on the gate insulating layer 23 on which the second barrier layers 25 and 27 are not formed, and the gate insulating layer 23 on which the first barrier layer 25 is formed. On the gate insulating layer 23 on which the plurality of second poly gates 26 and the second barrier layer 27 are formed to be in contact with one side of the first poly gate 24 at regular intervals. A plurality of formed to be in contact with one side of the second poly gate 26 with a predetermined interval 3 is configured to include the gate poly 28.

Here, the neighboring first, second, and third poly gates 24, 26, and 28 are connected to each other and bundled into one electrode, and each electrode is insulated by an insulating film (not shown).

In addition, the lengths of the first, second, and third poly gates 24, 26, and 28 are equally or non-uniformly, and the ions implanted into the first and second barrier layers 25 and 27 are Have different concentrations.

That is, ions implanted into the second barrier layer 27 are higher in concentration than ions implanted into the first barrier layer 25.

4A to 4D are structural cross-sectional views showing a horizontal charge transfer device according to the present invention.

As shown in FIG. 4A, the semiconductor substrate 21 is formed by implanting n-type impurities into the entire surface of the semiconductor substrate 21 to form a horizontal charge transfer region 22, and the horizontal charge transfer region 22 is formed. The gate insulating film 23 is formed on it.

Subsequently, a first polysilicon layer is formed on the gate insulating layer 23 and then patterned to form a plurality of first poly gates 24 having a predetermined interval.

As shown in FIG. 4B, barrier ions are implanted into the entire surface of the semiconductor substrate 21 by using the first poly gate 24 as a mask so that both sides of the first poly gate 24 are horizontal. The first barrier layer 25 is formed in the charge transfer region 22.

As shown in FIG. 4C, a second polysilicon layer is formed on the entire surface of the semiconductor substrate 21 and then patterned on the first barrier layer 25 where the first poly gate 24 is not formed. One side forms a plurality of second poly gates 26 in contact with the first poly gate 24.

Subsequently, barrier ions are implanted into the entire surface of the semiconductor substrate 21 by using the first and second poly gates 24 and 26 as masks so that both sides of the first and second poly gates 24 and 26 are horizontal. The second barrier layer 27 is formed in the charge transfer region 22.

As shown in FIG. 4D, a third polysilicon layer is formed on the entire surface of the semiconductor substrate 21 and then patterned to form a second barrier layer in which the first and second poly gates 24 and 26 are not formed. On the 27, a plurality of third poly gates 28 are formed such that one side contacts the second poly gate 26.

Here, the neighboring first, second, and third poly gates 24, 26, and 28 are formed to be bundled with one electrode, and the first, second, and third poly gates 24, 26, and 28 which are bundled together. ), The first, second, and third poly gates 24, 26, 28, which are bundled with different electrodes, are insulated from each other by an insulating film (not shown).

The horizontal charge transfer device according to the present invention formed as described above transfers the image charge in one direction by the clock signals of H1 and H2 having two-phase, as shown in FIG. 5.

5 is a potential profile of a horizontal charge transfer device according to the present invention.

As shown in FIG. 5, the two-phase clocks H1 and H2 are applied to the first, second, and third poly gates 24, 26, and 28, respectively, to move the image charge in one direction.

That is, the potential of the first and second barrier layers 25 and 27 formed by a clock and an ion implantation process are repeatedly applied to the neighboring first, second and third poly gates 24, 26 and 28. The charge is moved in one direction by the change of.

For example, the neighboring first, second, and third poly gates 24, 26, and 28 are bundled together so that H1 is applied to the high, and the first, second, and third poly gates 24, The second poly gate 26 and the third poly gate when the adjacent first, second, and third poly gates 24, 26, 28 are tied to each other at a constant distance from the 26, 28, and H2 is applied to Low, respectively. The potential difference is generated at the same clock by the first and second barrier layers 25 and 27 formed below (28).

That is, the first and second barrier layers 25 and 27 formed under the first, second and third poly gates 24, 26 and 28 to which the same clock is applied are applied to the horizontal charge transfer region. In the potential, a step occurs and electrons move.

As described above, the solid-state imaging device and its manufacturing method according to the present invention have the following effects.

That is, since one clock is applied to three poly gates adjacent to each other and a barrier layer is selectively formed at the lower portion thereof, even when the electrons are moved by generating a potential difference in the horizontal charge transfer region even at the same clock, the charge transfer efficiency of the horizontal charge coupling device is increased. Can increase.

Claims (7)

A horizontal charge transfer region formed on the surface of the semiconductor substrate, First and second barrier layers formed at regular intervals in the horizontal charge transfer region so that the potential level of the horizontal charge transfer region has a step when transferring image charges; A gate insulating film formed on the entire surface of the semiconductor substrate; A plurality of first poly gates having a predetermined interval on the gate insulating layer on which the first and second barrier layers are not formed; A plurality of second poly gates contacting one side of the first poly gate at regular intervals on the gate insulating film on which the first barrier layer is formed; And a plurality of third poly gates contacting one side of the second poly gate at regular intervals on the gate insulating film on which the second barrier layer is formed. 2. The solid-state imaging device as claimed in claim 1, wherein the neighboring first, second, and third poly gates are connected to each other and bound together by one electrode, and each electrode is insulated by an insulating film. The solid-state imaging device as claimed in claim 1, wherein the lengths of the first, second, and third poly gates are formed equally or non-uniformly. The solid-state imaging device as claimed in claim 1, wherein the first and second barrier layers have different concentrations. The solid-state imaging device as claimed in claim 4, wherein the second barrier layer has a higher concentration than the first barrier layer. Forming a horizontal charge transfer region on a surface of the semiconductor substrate; Forming a gate insulating film on the entire surface of the semiconductor substrate; Forming a plurality of first poly gates having a predetermined distance on the gate insulating film; Forming a first barrier layer in a horizontal charge transfer region by implanting primary barrier ions onto a front surface using the first poly gate as a mask; Forming a plurality of second poly gates on one side of the first poly gate at regular intervals on the gate insulating layer; Implanting secondary barrier ions using the first and second poly gates as a mask to form a second barrier layer in a horizontal charge transfer region; And forming a plurality of third poly gates contacting one side of the second poly gate at regular intervals on the gate insulating film. 7. The method of claim 6, wherein the second barrier layer is formed by primary barrier ion implantation and secondary barrier ion implantation.