KR20010002981A - A method of manufacturing an amorphous silicon hydride thin film transistor at a low temperature - Google Patents

Abstract

PURPOSE: A method for manufacturing a hydrogenated amorphous silicon TFT(Thin Film Transistor) at low temperature is provided to reduce weight and producing cost, and to improve a special quality of an isolation layer by reinforcing an etching characteristic. CONSTITUTION: A metal layer is doped by a sputtering method on a plastic substrate(110). After photo etching the metal layer using a mask, a gate electrode(113) is formed. A silicon nitride or a silicon oxide, a non-crystal silicon, and an impurity non-crystal silicon are piled up sequentially on the substrate(110). A gate insulation layer(115), a semiconductor layer(119), and ohmic contact layer(123) are formed by etching the piled layers. On the ohmic contact layer(123), a metal such as Co, Mo, and Ti, is doped. Using a photo etching method, a source and a drain electrodes (125a, 125b) are made. The ohmic contact layer(123) is etched using the source and the drain electrodes(125a, 125b) as a mask. A shield membrane(127) covers the whole substrate(110) by PECVD(Plasma Enhanced Chemical Vapor Deposition) method. By patterning the shield membrane(127), a source/drain contact hole is built. A pixel electrode is produced after piling and etching an ITO(Indium Tin Oxide) metal layer. The pixel electrode is connected with the TFT(Thin Film Transistor) source/drain electrodes(125a, 126b) through the contact hole.

Description

A low temperature manufacturing method of hydrogenated amorphous silicon thin film transistor {A METHOD OF MANUFACTURING AN AMORPHOUS SILICON HYDRIDE THIN FILM TRANSISTOR AT A LOW TEMPERATURE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor (hereinafter referred to as TFT), and more particularly to a method of manufacturing a hydrogenated amorphous silicon (a-Si: H) TFT at low temperature.

TFTs are widely used as switching elements for displaying information in many fields of large area electronics. Such TFTs are very effectively used for an active matrix liquid crystal display (AMLCD), and are formed on a plurality of matrices defined by scan lines and signal lines that cross each other to switch each matrix separately. . When voltage is applied, the TFT changes the arrangement of liquid crystal molecules under the control of the scan line and the signal line to determine whether light is transmitted.

However, the TFT is processed on a glass substrate by a Plasma Enhanced Chemical Vapor Depositon (PECVD) method at a temperature of about 250 to 400 ° C., and requires a deposition temperature of 250 ° C. or higher, so that warpage of the substrate occurs due to high temperature. As a result, it was an obstacle to using a plastic substrate that is weaker in heat than a glass substrate.

In order to solve this problem, US Pat. No. 5,796,121, 'Thin Film Transistor Fabricated on Plastic Substrate', discloses a method of manufacturing a TFT on a plastic substrate having a low transition temperature and a TFT manufactured by the method.

1 is a cross-sectional view of a conventionally manufactured low-temperature a-Si: H TFT, and as shown in the drawing, a transparent protective film 10 having electrical insulation properties is coated on a plastic substrate (not shown) by spin coating or the like. On the substrate, a gate electrode 13 made of Cr, Ta, Mo, W, Cu, a compound thereof, or the like is formed. On the gate electrode 13, a gate insulating film 15 made of SiNx or the like is formed at about 125 DEG C by PECVD. A semiconductor layer 19 made of amorphous silicon (a-Si: H) or the like is formed on the gate insulating film 15 by PECVD at about 125 ° C, and an etching stopper 21 made of SiNx or the like is formed on the PECVD method. Is formed by. On the etching stopper 21, an ohmic contact layer 23 made of a low work function metal such as Mg or Y is formed by PECVD, and a source / drain electrode made of Al or Ta is formed thereon. 25a and 25b are formed. On the source / drain electrodes 25a and 25b, a protective film (not shown) is formed over the entire area of the substrate.

However, the above-mentioned TFTs do not use an impurity amorphous silicon layer as an ohmic contact layer on the semiconductor layer, and thus have poor device characteristics such as requiring a high threshold voltage (about 10 Volt), and SiH4 / He / N during deposition of SiNx. _{By using 2} / NH ₃ , it is difficult to expect the etching effect of H ₂ , and it is difficult to obtain the required level of insulating film characteristics.

The present invention has been made in view of the above-described prior art, and an object of the present invention is to provide an inexpensive and lightweight liquid crystal display device by manufacturing a-Si: H TFT at low temperature and using a plastic substrate.

Another object of the present invention is to continuously form a Nin ⁺ layer during the above-described TFT manufacturing process, and to improve the etching characteristics by H plasma by adding H ₂ to the insulating film and the a-Si: H film. It is to improve.

In order to achieve the above object, a-Si: H TFT manufacturing method according to the present invention comprises the steps of forming a gate electrode by laminating a metal on a transparent plastic substrate by a sputtering method, and then photoetched using a mask, SiNx or SiOx, amorphous silicon (a-Si), and impurity amorphous silicon (n + a-Si) are sequentially deposited (Nin ⁺ continuous deposition) on the gate electrode by PECVD, and then etched to form a gate insulating film, a semiconductor layer, and an ohmic. Forming a contact layer, and forming a source / drain electrode by photo-etching a metal such as Cr, Mo, or Ti on the ohmic contact layer by sputtering, and then using the source / drain electrode as a mask. Etching the ohmic contact layer in the channel region, laminating a protective film over the entire substrate by PECVD, and then patterning the protective film by plasma etching. Forming a source / drain electrode contact hole.

The above PECVD method is carried out at an isothermal temperature between 120 ° C. and 150 ° C., which temperature is kept constant during the process.

In addition, H ₂ is added / increased during deposition of SiNx or SiOx, amorphous silicon (a-Si), and impurity amorphous silicon (n + a-Si) to increase the etching effect by hydrogen plasma, thereby improving film properties.

1 is a cross-sectional view of a hydrogenated amorphous silicon thin film transistor prepared at a low temperature in the prior art.

2 (a), (b), (c) and (d) show a method for producing a hydrogenated amorphous silicon thin film transistor at low temperature according to the present invention;

Hereinafter, a low-temperature manufacturing method of a-Si: H TFT according to the present invention will be described in detail with reference to the accompanying drawings.

First, as shown in FIG. 2A, metal is deposited on a transparent plastic substrate 110 by sputtering, and then photoetched using a mask to form a gate electrode 113. . At this time, a protective film (not shown) is formed on the plastic substrate 110 to protect the substrate from adverse environmental conditions. In addition, the gate electrode 113 is made of a metal that does not generate hillocks such as Cr, Mo, Mo / Al, Ti, and the like, and does not cause anodization, and may form an anodization film to improve insulation. .

Subsequently, as shown in FIG. 2 (b), SiNx or SiOx, amorphous silicon (a-Si), and impurity amorphous silicon (n + a-Si) are successively stacked on the plastic substrate 110 by PECVD (Nin ^+). Continuous deposition), and then etched to form the gate insulating film 115, the semiconductor layer 119, and the ohmic contact layer 123.

At this time, the above-described PECVD method is performed at an isothermal temperature between 120 ° C. and 150 ° C., and this temperature is kept constant during the process. In addition, H ₂ is added / increased during deposition of SiNx or SiOx, amorphous silicon (a-Si), and impurity amorphous silicon (n + a-Si) to increase the etching effect by hydrogen plasma, thereby improving film properties.

Subsequently, as shown in FIG. 2 (c), a metal such as Cr, Mo, or Ti is laminated on the ohmic contact layer 123 by sputtering and photoetched to form source / drain electrodes 125a and 125b. After that, the ohmic contact layer 123 of the channel region is etched using the source / drain electrodes 125a and 125b as a mask.

Thereafter, as shown in FIG. 2 (d), the protective film 127 is laminated over the TFT and the entire substrate 110 by PECVD, and then the protective film 127 is patterned by a plasma etching method. Source / drain electrodes 125a and 125b contact holes are formed in the TFT portion. At this time, the above-described PECVD method is performed at an isothermal temperature between 120 ° C. and 150 ° C., and this temperature is kept constant during the process as in the above-described Nin ⁺ continuous deposition. At this time, since the source / drain electrodes 1125a and 125b are made of Cr, Mo, Ti, or the like, etching is prevented by the source / drain electrodes 1125a and 125b in the TFT section.

Thereafter, although not shown in the drawings, a transparent metal such as indium tin oxide (ITO) is laminated and etched on the passivation layer 127 by sputtering to form a pixel electrode (not shown). The pixel electrode is connected to the source / drain electrodes 125a and 125b of the TFT through the contact hole of the passivation layer 127.

According to the TFT manufacturing method of the present invention, by forming TFT elements by low-temperature PECVD, it is possible to prevent the substrate from bending or shrinking at high temperatures during the manufacturing process, and by providing a low-cost, lightweight plastic substrate that is relatively heat resistant. It allows a large area liquid crystal display device.

In the present invention, the etching effect can be enhanced by adding / increasing H ₂ during Nin ⁺ continuous deposition.

Claims (6)

Providing a transparent substrate, Forming a gate electrode on the transparent plastic substrate; Forming a gate insulating film, a semiconductor layer, and an ohmic contact layer by low temperature PECVD (Plasma Enhanced Chemical Vapor Depositon) while providing H ₂ on the gate electrode; Forming a source / drain electrode on the ohmic contact layer; Etching the ohmic contact layer of the channel region using the source / drain electrode as a mask; Forming a protective film having contact holes over the entire substrate by low temperature PECVD; And forming a pixel electrode connected to the source / drain electrode through the contact hole of the passivation layer. The method of claim 1, wherein the gate electrode is selected from the group consisting of Cr, Mo, Mo / Al, or Ti. 2. The amorphous silicon hydride of claim 1, wherein the forming of the gate insulating film, the semiconductor layer, and the ohmic contact layer is performed by successively stacking SiNx or SiOx, amorphous silicon, and impurity amorphous silicon, and then etching. Low temperature transistor manufacturing method. The method of claim 1, wherein the source / drain electrodes are selected from the group consisting of Cr, Mo, Mo / Al, or Ti. The method of claim 1, wherein the protective film is made of indium tin oxide (ITO). The method of claim 1, wherein the low temperature PECVD is performed at an isothermal temperature between 120 ° C. and 150 ° C. 6.