KR20000018878A - Apparatus and method for digital signal 1 european physical layer atm user interface in atm switch system - Google Patents

Abstract

PURPOSE: An apparatus and methode for a Digital Signal 1 European(DS1E) physical layer ATM user interface in ATM switch system is provided to manage efficiently ATM cells by using demultiplexer and FIFO. CONSTITUTION: The apparatus and methode for a Digital Signal 1 European(DS1E) physical layer ATM user interface in ATM switch system comprises: a physical layer process unit(10) for transmitting information to ATM users through a DS1E frame after carrying information applied through eight ATM user lines of DS1E level to a DS1E frame, extracting an ATM cell, and performing a line-coating of the applying or the applied ATM cell; and an interface unit(20) for multiplexing the ATM cell to apply it to ATM process unit, demultiplexing the ATM cell from the ATM process unit, and applying a state of the user information to the physical process unit(10).

Description

Device and method of DS1 physical layer ATM subscriber interface in ATM switch

The present invention relates to an ATM (Asynchronous Transfer Mode) switch, and more particularly, to a DS1E physical layer ATM subscriber interface device and a method in an ATM switch configured to multiplex and demultiplex DS1E-class 8-link physical layer ATM subscribers.

As shown in FIG. 1, the DS1E physical layer ATM subscriber interface device in the conventional ATM switch includes a physical layer processing unit 10, an interface unit 20, and a clock receiving and distributing unit 30. It is made with.

The physical layer processing unit 10 loads information applied through four ATM subscriber lines into a DS1E frame, extracts an ATM cell, and applies the extracted ATM cell to the interface unit 20, and lines the ATM cell received from the interface unit 20. After coding, information is transmitted to ATM subscriber through DS1E frame.

The interface unit 20 multiplexes an ATM cell received from the physical layer processing unit 10 to the ATM processing apparatus, demultiplexes an ATM cell received from the ATM processing apparatus, and applies the ATM cell to the physical layer processing unit 10. .

The clock receiving and distributing unit 30 supplies a clock to the physical layer processing unit 10 and the interface unit 20 using a clock applied from the ATM processing apparatus.

As described above, in the conventional ATM switch, the DS1E physical layer ATM subscriber interface device was able to accommodate only four subscriber lines, thus using a large number of boards, which was bulky, increased manufacturing costs, and inefficient for the operator. When the information is congested, it is not known to the operator, so there is a serious problem with all the information and there is a serious problem in network operation.

The present invention has been made in view of the above-described problems, and the present invention enables the ATM service for multiple subscribers in an ATM system by accommodating 8 links of the DS1E physical layer in an ATM exchanger, and one subscriber in the corresponding ATM system. When information is congested over the line, the demultiplexer and FIFO (First Input First Output) efficiently manages the ATM cell so that at least cell loss and congestion information of the ATM cell is applied to the operator. The purpose is to provide operations.

1 is a block diagram showing a DS1E physical layer ATM subscriber interface device in a typical ATM switch.

2 is a block diagram illustrating a flow of an ATM cell between a physical layer processing unit and an interface unit according to an embodiment of the present invention.

3 is a block diagram showing the eight-member multiplexing in FIG.

4 is a flowchart showing an ATM cell interface method between a demultiplexer and a FIFO in FIG. 2;

Explanation of symbols on the main parts of the drawings

10: physical layer processing unit 20: interface unit

30: Clock Receive and Distribution Units 11-1 to 11-8: LIU and E1 Framers

12-1 to 12-8: Physical layer protocol processing unit 21-1 to 21-8: Buffer unit

22: multiplexer 23: demultiplexer

24-1 ~ 24-8: FIFO

In order to achieve the above object, the present invention, in the interface between the DS1E-class ATM subscriber side and the ATM processing device in the ATM switch, extracts an ATM cell by loading information applied through eight DS1E-class ATM subscriber lines into a DS1E frame. A physical layer processor (10) for transmitting information or transmitting information to the ATM subscriber through a DS1E frame through line coding of an applied ATM cell; Multiplex the ATM cells received from the physical layer processing unit 10 and apply them to the ATM processing apparatus, demultiplex the ATM cells received from the ATM processing apparatus after converting subscriber line recognition, broadcast cell recognition, and cell header; When the subscriber information is congested, characterized in that it comprises an interface unit 20 for applying the congestion state of the subscriber information to the physical layer processing unit 10.

On the other hand, the interface unit 20 de-multiplexes the ATM cell, and de-multiplexer 23 for inspecting the ATM cell and applying congestion information when congested beyond the specified capacity of the ATM cell; When the ATM cell applied from the demultiplexing 23 is greater than or equal to a prescribed capacity, the demultiplexer 23 informs the demultiplexing unit 23 of the congestion state, and the congestion information of the corresponding ATM cell applied from the demultiplexing 23. It characterized in that it comprises a FIFO (24-1 ~ 24-8) for transmitting to the physical layer processing unit 10.

The demultiplexer may include a first process of applying an ATM cell and a WCLK after performing demultiplexing of the ATM cell; A second step of inspecting the ATM cell when the ATM cell is authorized according to the WCLK and a congestion signal is received above a predetermined capacity; If the CLP of the ATM cell is examined and the CLP = 1, the corresponding ARM cell is discarded. If the CLP = 0, the corresponding ARM cell is authorized. Transmitting a third process; And a fourth process of transmitting to the ATM subscriber side by EFCI = 1 of the ATM cell to inform that the subscriber information is congested.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 1, the ATM subscriber interface device according to the present invention includes a physical layer processing unit 10, an interface unit 20, and a clock receiving and distributing unit 30.

The physical layer processing unit 10 loads information applied through eight ATM subscriber lines into a DS1E frame, extracts an ATM cell, applies it to the interface unit 20, and lines the ATM cell received from the interface unit 20. After coding, information is transmitted to ATM subscriber through DS1E frame.

The interface unit 20 multiplexes the ATM cells received from the physical layer processing unit 10 and applies them to an ATM processing device, and converts subscriber line recognition, broadcast cell recognition, and cell headers from the ATM cells received from the ATM processing device. After demultiplexing, when the subscriber information is congested, the congestion state of the corresponding subscriber information is applied to the physical layer processing unit 10.

Since the clock receiving and distributing unit 30 is the same as the conventional configuration description, the description thereof will be omitted.

On the other hand, the flow of ATM cells between the physical layer processing unit 10 and the interface unit 20 is shown in Figure 2, the physical layer processing unit 10 has a plurality of LIU (Line Interface Unit) and E1 framer (11-) 1 to 11-8 and a plurality of physical layer protocol processing units 12-1 to 12-8.

The plurality of LIU and E1 framers 11-1 to 11-8 line-code the line data received from the ATM subscriber line and load the data into a DS1E frame to generate frame data, or the physical layer protocol processor 12-1 to 11. 12-8) line-code the E1 frame applied from.

The plurality of physical layer protocol processing units 12-1 to 12-8 store frame data applied by the plurality of LIUs and E1 frames 11-1 to 11-8 to a header error code (HEC). A 53-byte ATM cell is extracted or the ATM cell applied from the interface unit 20 is converted into an E1 frame.

The interface unit 20 includes a plurality of buffer units 21-1 to 21-8, a multiplexer 22, a FIFO 24-1 to 24-8, and a demultiplexer 23. It is made.

The buffer units 21-1 to 21-8 transmit data according to the enable signal of the multiplexer 22.

The multiplexer 22 adds subscriber line information by multiplexing an ATM cell authorized through the buffer units 21-1 to 21-8 from the physical layer processor 10.

The demultiplexer 23 extracts and demultiplexes subscriber line information of an authorized ATM cell from the ATM processing apparatus, and checks the corresponding ATM cell and applies congestion information when it is congested beyond a specified capacity of the corresponding ATM cell. do.

The FIFOs 24-1 to 24-8 inform the demultiplexer 23 of the congestion state of the corresponding ATM cell when the ATM cell applied from the demultiplexer 23 is greater than or equal to a prescribed capacity. The congestion information of the corresponding ATM cell applied from 23 is transmitted to the physical layer processing unit 10.

The operation of the present invention configured as described above will be described in detail with reference to FIG. 2 as follows.

First, an operation of transmitting information authorized from an ATM subscriber to an ATM processing device will be described.

The LIU and E1 framers 11-1 to 11-8 in the physical layer processing unit 10 line-code line data applied from eight subscriber lines, and load the coded line data into a DS1E frame at 2.048 MHz to generate frame data. This is applied to the physical layer protocol processing units 12-1 to 12-8 in the physical layer processing unit 10.

Accordingly, the physical layer protocol processing units 12-1 to 12-8 in the physical layer processing unit 10 use the header error code (HEC) as the frame data applied from the corresponding LIU and the E1 framers 11-1 to 11-8. 53 bytes of ATM cells are extracted.

Thus, when the corresponding physical layer protocol processing units 12-1 to 12-8 shown in Fig. 3 extract ATM cells of 53 bytes, the buffer units 21-1 to 21-8 in the interface unit 20 are extracted. ) To implement multiplexing of 8 subscribers.

First, when the corresponding physical layer protocol processing unit 12-1 to 12-8 extracts the corresponding 53-byte ATM cell, the CELLE (Cell Indication) signal is applied to the multiplexing unit 22 in the corresponding interface unit 20. Will be done.

Then, the multiplexer 22 transmits the CELLE signal according to the CELLE signal preferentially applied from the physical layer protocol processor 12-1 to 12-8. In addition to applying the cell RCLK (Read Clock), the enable signal is applied to the buffer units 21-1 to 21-8.

Accordingly, the physical layer protocol processing units 11-1 to 11-8 match the 53-byte ATM cell with the clock through the buffer units 21-1 to 21-8 in the interface unit 20, and the corresponding multiplexer 22 ) Is applied.

Accordingly, the multiplexer 22 multiplexes the 53-byte ATM cell received from the corresponding physical layer protocol processing units 11-1 to 11-8 through the corresponding buffer units 21-1 to 21-8, and applies the corresponding 53 bytes. After adding 3 bytes of subscriber line information to the byte ATM cell format of the byte and converting it to the 56 byte ATM cell format, the 56 byte ATM cell format is converted from 8 bit units to 16 bit units.

Thereafter, the 56-byte ATM cell converted into the corresponding 16-bit unit is applied to the ATM processing apparatus.

Meanwhile, an operation of receiving an ATM cell from an ATM processing device at an ATM subscriber is as follows.

First, the demultiplexer 23 in the interface unit 20 converts a 56-byte ATM cell in 16-bit units received from an ATM processing device into a 53-byte ATM cell in 8-bit units, and then converts three bytes on the corresponding ATM cell header. The subscriber line information is extracted from the subscriber line and demultiplexed to the corresponding subscriber among the 8 subscriber lines to apply the 53-byte ATM cell and the WCLK to the FIFOs 24-1 to 24-8 (step S1).

Accordingly, the FIFOs 24-1 to 24-8 receive 53-byte ATM cells from the demultiplexer 23 according to WCLK (Write Clock). When a predetermined amount of ATM cells are stored, the ATM A Probable Almost Full Flag (PAFA) signal that a cell is satisfied is applied to the demultiplexer 23 at a 'low' level to prevent further cells from being written.

At this time, among the ATM subscriber cells, when the network becomes congested in the header, there is a cell priority (CLP; Cell Loss Parity) to indicate cell discard. The cell having CLP = 0 should be protected.

Therefore, the demultiplexer 23 writes to the FIFOs 24-1 to 24-8 immediately after the FIFOs 24-1 to 24-8 apply the PAFA signal to the low level. The CLP of the ATM cell to be written is checked (step S2).

Accordingly, the cell is discarded by removing only the WCLK (Write Clock) of the cell whose CLP is 1, and the CLP = 0 is continuously applied to the corresponding FIFOs 24-1 to 24-8. Explicit Forward Congestion of the corresponding ATM cell to indicate that the information is congested

1) is applied to the corresponding FIFOs (24-1 to 24-8).

After that, the FIFOs 24-1 to 24-8 discard the cells having the CLP = 1 in the demultiplexer 23, so that there is enough memory to guarantee a certain amount for the cells having the CLP = 0. Then, EFCI = 1 of the ATM cell indicates that the subscriber information is congested (step S3, step S4).

Accordingly, the physical layer protocol processing units 12-1 to 12-8 in the physical layer processing unit 10 convert the 8-bit unit of the ATM cell applied through the FIFOs 24-1 to 24-8 into an E1 frame to LIU. And E1 framers 11-1 to 11-8.

Accordingly, the LIU and the E1 framers 11-1 to 11-8 in the physical layer processing unit 10 receive the received DS1E frames applied from the physical layer protocol processing units 12-1 to 12-8 in the physical layer processing unit 10. Line-coded to transmit data to the ATM subscriber.

In the case of a point-to-multipoint signal form, i.e., a broadcasting cell, a virtual path identifier (VPI) and a virtual channel identifier (VCI) are established by common memory communication with an ATM processing apparatus. By copying the cell to the corresponding subscriber line, multiple subscribers can enable video conferencing at the same time.

As such, the DS1E physical layer ATM subscriber interface device in the ATM switch can accommodate 8 links of the DS1E physical layer, thereby enabling ATM service for multiple subscribers in the ATM system, and information is defined as one subscriber line in the corresponding ATM system. If the congestion exceeds the capacity, the demultiplexing unit checks the ATM cell, and at least the loss of the cell and the congestion information of the ATM cell to the operator can operate the network more efficiently.

As described above, the present invention enables the ATM service for multiple subscribers in an ATM system by accommodating 8 links of the DS1E physical layer in an ATM switch, and congestion over the prescribed capacity of information to one subscriber line in the corresponding ATM system. In this case, the demultiplexer and the FIFO can efficiently manage the network by providing at least cell loss and congestion information of the ATM cell to the operator.

Claims (3)

In the interface between the DS1E class ATM subscriber side and the ATM processing unit in the ATM switch, Physical layer processing unit (10) that loads information applied through eight DS1E-class ATM subscriber lines in a DS1E frame to extract and apply an ATM cell, or transmits information to the ATM subscriber through a DS1E frame through line coding an authorized ATM cell (10) )Wow; Multiplex the ATM cells received from the physical layer processing unit 10 and apply them to the ATM processing apparatus, demultiplex the ATM cells received from the ATM processing apparatus after converting subscriber line recognition, broadcast cell recognition, and cell header; DS1E physical layer ATM subscriber interface device in the ATM switch characterized in that it comprises an interface unit (20) for applying the congestion state of the subscriber information to the physical layer processing unit (10) when the subscriber information is congested. The method of claim 1, The interface unit 20 demultiplexes the ATM cell, and in case of congestion beyond the prescribed capacity of the ATM cell, the demultiplexer 23 which checks the corresponding ATM cell and applies congestion information; When the ATM cell applied from the demultiplexing 23 is greater than or equal to a prescribed capacity, the demultiplexing unit 23 notifies the demultiplexing unit 23 of the de-multiplexing unit 23, and informs the congestion information of the corresponding ATM cell applied from the demultiplexing 23. DS1E physical layer ATM subscriber interface device in the ATM switch characterized in that it comprises a FIFO (24-1 ~ 24-8) for transmitting to the physical layer processing unit (10). A DS1E physical layer ATM subscriber interface method in an ATM switch, comprising: Applying a WCLK to an ATM cell after performing demultiplexing of the ATM cell; Inspecting the ATM cell when the ATM cell is authorized according to the WCLK to receive a congestion signal over a predetermined capacity; If the CLP of the ATM cell is examined and the CLP = 1, the corresponding ATM cell is discarded. If the CLP = 0, the ATM cell is authorized. Transmitting; DS1E physical layer ATM subscriber interface method in the ATM switch characterized in that the EFCI = 1 of the ATM cell to transmit to the ATM subscriber side to inform that the subscriber information is congested.