KR100256675B1 - Atm - Google Patents

Abstract

PURPOSE: A low-speed subscriber matching apparatus of an ATM exchange is provided to connect a plurality of physical layer PBAs to one switch link and select and multiplex-transmit a cell to a plurality of output subscribers when the plurality of subscribers are accommodated to each PBA. CONSTITUTION: An ATM layer processing unit(110) multiplexes and demultiplexes a received cell. A plurality of physical layer processing units(120-1-120-N) performs a line matching for a low-speed subscriber, extracts an ATM cell to be transmitted from the ATM layer processing unit(110) to the subscriber to multiplex and demultiplex it, transmits the cell to the corresponding subscriber according to a connection state of the extracted cell or multiplex-outputs the cell to an arbitrary subscriber line. A connection and mounting unit(130) connects the ATM layer processing unit(110) and the plurality of physical layer processing units(120-1-120-N) and mounts it to a system. The plurality of physical layer processing units(120-1-120-N) terminate a signal of a subscriber line, process a maintenance and repair signal contained in a DS1E or a DS1 frame, and extract an ATM cell to perform a first-multiplexing to transmit the cell to the ATM layer processing unit(110) through a receiving cell bus(140). When the plurality of physical layer processing units(120-1-120-N) receive a cell to be transmitted to a subscriber through a transmission cell bus(150) from the ATM layer processing unit(110), they check a PBA bit map added in the front end of the cell, and extract the cell from the transmission cell bus(150). If it is a point-to-point connection cell, the plurality of physical layer processing units(120-1-120-N) transmit it to a corresponding subscriber according to an output line number, while if it is a point-to-multi-point connection, the plurality of physical layer processing units(120-1-120-N) perform a header conversion by lines and multiplex-output the cell to an arbitrary subscriber line.

Description

Low Speed Subscriber Matching Device in Asynchronous Transfer Mode Switch

The present invention relates to a low speed subscriber matching device of an Asynchronous Transfer Mode (ATM) exchange. In particular, when the received cell is a cell of a point-to-multipoint connection, the asynchronous transfer mode switch performs multiple header outputs to multiple low speed subscribers. Relates to a low speed subscriber matching device.

In general, the DS1 subscriber matching device having a line speed of 1.544Mhz and the DS1E subscriber matching device having a line transmission rate of 2.048Mhz among the subscriber matching devices of the ATM switch are called low speed subscriber matching devices. The actual cell rate for low-speed subscribers is less than 1.92 Mbps. However, the switch port of the ATM switcher can basically connect an STM-1 subscriber matching device having a transmission speed of 155Mbps. Therefore, the DS1E subscriber matching device can connect to one switch port by multiplexing more than 80 subscribers. If the cell received from the switch is a cell of point-to-point connection, the output line must be found and demultiplexed. In the case of a cell of point-to-multipoint connection, multiple cells must be output from the output link being demultiplexed. In this case, the virtual path identifier (VPI) and the virtual channel identifier (VCI) of the cell transmitted to each subscriber should have different values.

The switch port of an ATM switcher can basically connect an STM-1 subscriber matching device having a transmission rate of 155Mbps. Therefore, a cell is input at a speed of about 155 Mbps from the switch to the subscriber matching device. On the other hand, the low-speed subscriber matching device is a speed that can accommodate about 80 subscribers, but configured to accommodate 64 subscribers in consideration of the utilization rate of the switch port and the size of the printed board assembly (PBA), the physical layer processing unit of 64 subscribers 1 Because it cannot accommodate all four PBAs, configuring to accommodate four subscribers in one PBA can accommodate up to 16 physical layer-processing PBAs. ATM layer processing if the cell received from the switch is a cell for point-to-point connectivity. In PBA, the PBA and VCI of the received cell should be referred to to determine which PBA and to which physical layer processor to transmit the cell. In case of a point-to-multipoint cell The same cell must be delivered to each physical layer processor.In the physical layer processing PBA, cells with the same content with different headers are transmitted to each subscriber line. One must be able to output.

However, in the case of the conventional ATM switch, it is not equipped with a multiple output device, there is a problem that can only output the corresponding cell to any one line, but can not output multiple cells to the output subscriber.

Accordingly, the present invention has been made to solve the above problems, and converts the multi-point connection identifier of the input cell into a multi-point connection reference number and uses the connection identifier in the same manner as the point-to-point connection. Unified management of connection management identifiers, unified connection management information, and providing a multi-point connection reference number to the demultiplexed function unit by converting the header using the function unit and multiplexing the cell with each subscriber line. It is an object of the present invention to provide a low-speed subscriber matching device of an asynchronous delivery mode switch that outputs.

1 is a block diagram of an embodiment of a low speed subscriber matching device of an asynchronous delivery mode switch in accordance with the present invention.

FIG. 2 is a block diagram of an embodiment of an ATM layer processor of FIG. 1; FIG.

3 is a block diagram of an embodiment of the physical layer processing unit of FIG. 1;

4 is an exemplary configuration diagram of a multi-point connection management apparatus to which the present invention is applied.

5 is a structural diagram of a switch cell output input to the multi-point connection manager of FIG.

FIG. 6 is an exemplary block diagram of a transmission cell processor of FIG. 2; FIG.

FIG. 7 is a block diagram of an embodiment of a transmission connection identifier manager of FIG. 6; FIG.

8 is a block diagram of a transmitting cell manager of FIG. 6;

9 is a structural diagram of transmission connection management information.

10 is a structural diagram of a cell transmitted from an ATM layer processor to a physical layer processor via a transmit cell bus;

11 is a structural diagram of multipoint connection management information;

Explanation of symbols on the main parts of the drawings

110: asynchronous delivery mode layer processing unit 120-1 to 120-N: physical layer processing unit

130: connection and mounting unit 210: receiving cell processing unit

220: switch link matching unit 230: transmission cell processing unit

240: control unit

The low speed subscriber matching device of the asynchronous delivery mode switch of the present invention for achieving the above object comprises: asynchronous delivery mode layer processing means for multiplexing and demultiplexing a received cell; Perform line matching of the low-speed subscriber, extract and multiplex and demultiplex the asynchronous delivery mode cells to be transmitted to the subscriber from the asynchronous delivery mode layer processing means, and transfer the cell to the subscriber according to the connection state of the extracted cell At least one physical layer processing means for transmitting or multiple outputting cells to any of the subscriber lines; And connecting and mounting means for interconnecting the asynchronous delivery mode layer processing means and the at least one physical layer processing means to be mounted.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a block diagram of an embodiment of a low speed subscriber matching device of an asynchronous delivery mode switch in accordance with the present invention.

As shown in FIG. 1, the low-speed subscriber matching apparatus of the asynchronous delivery mode switch of the present invention performs an ATM layer processing unit 110 for multiplexing and demultiplexing a received cell, and performs line matching of the low-speed subscriber. Multiplexing and demultiplexing by extracting an ATM cell to be transmitted to the subscriber from the processing unit 110, and transmitting a cell to a corresponding subscriber according to the connection state of the extracted cell, or multiple physical outputs of a cell by an arbitrary subscriber line A connection and mounting unit 130 which interconnects the hierarchical processing units 120-1 to 120 -N, the ATM hierarchical processing unit 110, and the plurality of physical layer processing units 120-1 to 120 -N to be mounted in a system. ). Here, N is an integer of 16 or less.

The connection and mounting unit 130 includes a back plane printed board assembly.

The ATM layer processor 110 is formed of a printed board assembly (PBA).

The plurality of physical layer processing units 120-1 to 120 -N each include a printed board assembly (PBA).

The operation of the low speed subscriber matching device of the asynchronous delivery mode switch of the present invention having the structure as described above will be described in detail as follows.

The ATM layer processing unit 110 performs an ATM layer processing function, a switch matching function, and a cell multiplexing and demultiplexing function. The plurality of physical layer processing units 120-1 through 120 -N perform line matching of low-speed subscribers, extract ATM cells, and perform multiplexing and demultiplexing. The connection and mounting unit 130 provides interconnections between the plurality of physical layer processing units 120-1 through 120 -N and the ATM layer processing unit 130 and allows the system to be mounted.

The plurality of physical layer processing units 120-1 to 120-N terminate the signal of the subscriber line, process the maintenance signal included in the DS1E or DS1 frame, extract the ATM cell, and perform the first multiplexing. After transmitting the cell to the ATM layer processing unit 110 through the receiving cell bus 140 and receiving the cell to be transmitted to the subscriber through the transmitting cell bus 150 from the ATM layer processing unit 110, it is added to the front end of the cell. Examines the PBA bit map and extracts the cell from the transmit cell bus 150 to transmit the cell to the corresponding subscriber according to the output line number in case of the cell of the point-to-point connection, and the point-to-multipoint connection. The header conversion is performed for each line and multiple cells are outputted to an arbitrary subscriber line.

FIG. 2 is a block diagram of an embodiment of an ATM layer processor of FIG. 1.

As shown in FIG. 2, when the ATM layer processing unit of FIG. 1 receives notification that the ATM cell has been received from the reception cell bus 140 in the connection and mounting unit 130, the ATM layer processing unit sends a selection signal to transmit a plurality of physical layers. A reception cell processing unit 210 for reading and multiplexing cells from the physical layer processing unit among the processing units 120-1 to 120 -N, converting and transmitting headers of the receiving cell using the reception connection information, and a receiving cell processing unit ( Receiving a cell from the cell 210 converts the cell into a form used in the switch link, transmits the cell to the switch link, and receiving a cell from the switch link indicates that the point-to-point connection is at the front end of the cell according to the connection type of the cell. The switch link matching unit 220 attaches and transmits information to be displayed or attaches and transmits a multi-point connection reference number to the front end of the cell. When the user cell is received from the switch link matching unit 220, the transmission link information is transmitted. A transmit cell processor 230 for adding an output PBA bit map and a line number to the front of the cell or attaching a multi-point connection reference number received from the switch link matching unit 220 to convert the data into 16 bits; Manages the states of the plurality of physical layer processing units 120-1 through 120 -N through the control bus 160, manages the reception connection information in the receiving cell processing unit 210, and transmits the transmission connection of the transmitting cell processing unit 230. The controller 240 manages information.

The operation of the ATM layer processing unit of FIG. 1 having the structure as described above will be described in detail as follows.

When the receiving cell processor 210 receives a notification that the ATM cell has been received from the receiving cell bus 140 in the connection and mounting unit 130, the receiving cell processor 210 sends a selection signal to the corresponding physical layer processor through the receiving cell bus 140. Among the plurality of physical layer processing units 120-1 to 120 -N, cells are read and multiplexed from the corresponding physical layer processing unit, the header of the receiving cell is converted using the reception connection information, and transferred to the switch link matching unit 220. . The switch link matching unit 220 receives the cell from the receiving cell processing unit 210, converts the cell into a form used in the switch link, and transmits the cell to the switch link. On the other hand, when the cell is received from the switch link, in the case of a point-to-point connection cell, information indicating the point-to-point connection is attached to the front end of the cell, and the cell is transmitted to the transmitting cell processor 230, and the point- In case of the multi-point connection, the multi-point connection reference number found by using the bit indicating the multi-point connection and the multi-point connection identifier are attached to the front end of the cell and transmitted to the transmitting cell processor 230. When the transmission cell processing unit 230 receives the user cell from the switch link matching unit 220, the output PBA bit map and the line number are added to the front of the cell using the transmission connection information or received from the switch link matching unit 220. A multipoint connection reference number is attached and converted to 16 bits to transfer the cell to the transmit cell bus 150.

The control unit 240 manages the states of the physical layer processing units in the plurality of physical layer processing units 120-1 through 120 -N through the control bus 160, and manages the reception connection information in the receiving cell processing unit 210. It performs a function of managing transmission connection information of the transmission cell processing unit 230.

FIG. 3 is a block diagram of an embodiment of the physical layer processor of FIG. 1.

As shown in FIG. 3, the physical layer processing unit of FIG. 1 receives a cell, extracts a cell, transfers a cell with reference to a line number, or performs a cell header conversion according to the connection type of the extracted cell. The cell multiplexing and demultiplexing unit 310 for notifying the cell reception from the ATM layer processing unit 110 and reading the cell by the ATM layer processing unit 110 and the outputted from the cell multiplexing and demultiplexing unit 310. Reads the cell inputted to the transmitting user cell buffer unit 320 and the transmitting user cell buffer unit 320 to buffer the transmitting user cell, loads the cell in the DS1E or DS1 frame, and delivers the cell to the subscriber, and receives the DS1E or The physical layer processing block 330 processing DS1 frames, extracting and storing ATM cells, and periodically inspecting the internal registers of the physical layer processing block 330 monitors the state of the line and, if a failure occurs, The physical layer control unit 340 and the ATM layer processing unit 110, which record and allow the ATM layer processing unit 110 to monitor the state of the plurality of physical layer processing units 120-1 to 120-N through this buffer. The control bus buffer 350 is configured to control communication between the controller 240 and the physical layer controller 340.

The transmitting user cell buffer unit 320 includes a plurality of buffers 321 to 324.

The physical layer processing block 330 includes a plurality of physical layer processors 331 to 334.

The operation of the physical layer processor of FIG. 1 having the structure as described above will now be described.

The cell multiplexing and demultiplexing unit 310 receives a cell from the transmitting cell bus 150, examines the output PBA bitmap, extracts a cell destined for itself, and refers to a line number in the case of a point-to-point connection cell. The cell is transmitted to the transmitting user cell buffer unit 320, and in case of a point-to-multipoint connection, cell header conversion is performed and outputted to each transmitting user cell buffer unit 320, and the physical layer processing block 330 When a cell is received, the cell is read from the corresponding physical layer processor, the first multiplexing is performed, the cell is stored in the receiving cell buffer, and then the ATM layer processor 110 is received through the receiving cell bus 140. The cell reception is notified to read the cell by the ATM layer processor 110.

The physical layer processing block 330 checks whether a cell has been input to the transmitting user cell buffer unit 320 and if there is a cell to be transmitted, reads it and loads the cell in the DS1E or DS1 frame to the subscriber, and sends the DS1E or the input from the subscriber. It processes the DS1 frame, extracts the ATM cell, stores it in an internal buffer, and informs the cell multiplexing and demultiplexing unit 310 to read the cell.

The physical layer controller 340 periodically checks the internal registers of each physical layer processor, monitors the state of the line, and records a failure in the control bus buffer 350 in the ATM layer processor 110 through the buffer. Allows you to monitor the state of each physical layer processor.

The transmitting user cell buffer unit 320 has a cell processing speed of about 1.9 Mbps or 1.5 Mbps in the physical layer processing block 330, and a cell output speed of the cell multiplexing and demultiplexing unit 310 has a speed of about 155 Mbps. Required for matching, the control bus buffer 350 controls communication between the control unit 240 and the physical layer control unit 340 of the ATM layer processing unit 110.

Meanwhile, the physical layer processor illustrated in FIG. 3 monitors the first and second bytes of the cell in the transmit cell bus 150 and finds a cell destined for the cell. The cell is extracted from the cell multiplexer and demultiplexer 310. Checks whether this is a cell of point-to-point connection or a cell of point-to-multipoint connection, and if it is a cell of point-to-point connection, the corresponding sending user cell buffer according to the line number recorded in the third byte of the cell. Outputs the cell to the unit 320, and in the case of a point-to-multipoint connection, reads the multipoint connection management data from the multipoint connection management table shown in FIG. Accordingly, header conversion is performed to output the cell to the transmitting user cell buffer of the active line. The format of the multipoint connection management data is shown in FIG. Each line consists of A (ctive) bit indicating whether it is activated, a connection type bit (T bit) indicating whether to convert only VPI or VPI / VCI during header conversion, and an output VPI and an output VCI.

4 is an exemplary configuration diagram of a multi-point connection management apparatus to which the present invention is applied.

As shown in FIG. 4, the multi-point connection management apparatus to which the present invention is applied includes a multi-point connection management unit 410 and a multi-point connection management table storage unit 140.

Referring to the operation of the multi-point connection management device to which the present invention having the structure as described above is applied as follows.

The multipoint connection management unit 410 receives a cell of the format shown in FIG. 5 from the switch link as part of the switch link matching unit 220 and is a point-to-multipoint connection cell, that is, the M bit 26 is 0 and If the B bit 25 is 0, octet 0 of the cell input by reading the multipoint connection reference number 23 from the multipoint connection management table storage unit 420 using the multipoint connection identifier 29. Instead of 1 and 2, a multipoint linkage indication and a multipoint linkage reference number are added to the front end of the ATM cell and output to the user cell buffer of FIG.

5 is a structural diagram of a switch cell output input to the multi-point connection manager of FIG. 4.

As shown in FIG. 5, the configuration of the receiving cell from the switch is a busy bit 25 indicating whether the cell is a valid cell, a point-to-point connection cell or a point-to-multipoint M bit 26, and a point-to-multipoint connection cell. The multipoint connection identifier 29 is configured in the form of adding the front end of the ATM cell.

6 is a block diagram illustrating an example of the transmission cell processor of FIG. 2.

As illustrated in FIG. 6, the transmit cell processor of FIG. 2 includes a user cell buffer 610, a management cell buffer 620, a transmit connection identifier manager 630, and a transmit cell manager 640. .

The operation of the transmission cell processor of FIG. 2 having the structure as described above will now be described.

The transmission connection identifier management unit 630 reads the user cell 24 and the management cell 35 and multiplexes it by checking whether the user cell buffer 610 and the management cell buffer 620 contain a cell to be transmitted to the subscriber. In the case of a cell of a point-to-point connection, the virtual path identifier and the virtual channel identifier of the cell are extracted to find a connection identifier, and the connection identifier 36 is transmitted to the transmitting cell manager 640, whether the connection is a virtual path connection, or a virtual channel connection. The cell data 38 is transmitted to the transmitting cell manager 640 together with the connection type 37 indicating recognition, and in the case of a point-to-multipoint connection, the connection identifier is extracted by using the multipoint connection reference number. Transfer to cell manager 640. The transmitting cell manager 640 reads the connection management information using the connection identifier 36 received from the transmission connection identifier manager 630, and in the case of the output PBA bitmap and the point-to-point connection in front of the cell, the connection management information. Multi-point connection reference number received from the multi-point connection management unit 410 of FIG. 4 in the case of a point-to-multipoint connection, outputting a transmission cell converted to 16 bits by adding the line number in FIG. Add to output to the transmit cell bus.

FIG. 7 is a block diagram of an embodiment of a transmission connection identifier management unit of FIG. 6.

As illustrated in FIG. 7, the transmission connection identifier management unit of FIG. 6 includes a transmission path identifier management circuit 710 configured as a field programmable gate array (FPGA) and a virtual path including dual port RAM (DPRAM). A connection identifier table storage unit 720 and a connection identifier table storage unit 730 including a content address memory (CAM) are provided.

The transmit connection identifier management circuit 710 includes a cell multiplexer 711, a virtual path connection identifier controller 712, and a connection identifier table manager 713.

The operation of the transmission connection identifier management unit of FIG. 6 having the structure as described above will now be described.

The cell multiplexer 711 checks whether there is a cell to be transmitted to the subscriber in the user cell buffer 610 and the management cell buffer 620, and if there is a cell to be transmitted, the cell multiplexer 711 outputs a read signal to each buffer to read the cell. The user cell 24 and the management cell 35 are multiplexed, and in the case of point-to-point connection, the virtual path connection identifier controller 712 and the connection identifier table manager 713 are extracted by extracting VPI and VCI from the cell header. To pass. When the virtual path connection identifier controller 712 receives the VPI from the cell multiplexer 711, the virtual path connection identifier controller 712 outputs the VPI to the virtual path connection identifier table storage 720 to read the virtual path connection identifier 43 of the corresponding VPI. The virtual path connection identifier table storage unit 720 configures a DPRAM to simultaneously read and write the transmission connection identifier management circuit 710 and the virtual path connection identifier controller 712. The virtual path connection identifier has a corresponding VPI. It consists of 1 bit of connection type bit and 7 bits of virtual path connection identifier indicating whether the cell connection is a virtual path connection or a virtual channel connection, and 8 bits of information are stored by the controller. Determine whether the cell is a cell for virtual path connection or a cell for virtual channel connection. The virtual path connection identifier manager 713 transfers the virtual path connection identifier 43 read from the virtual path connection identifier table storage 720 to the connection identifier management table manager 713. The connection identifier table manager 713 receives the connection identifier 44 from the connection identifier table storage unit 730 by using the virtual path connection identifier received from the virtual path identifier controller 712 and the VCI received from the cell multiplexer 711. Extract. The connection identifier table storage unit 730 is configured as a CAM. The CAM is an element that checks whether the input data and the data stored in the internal memory match and outputs the address of the memory where the matching data is stored. Using the address as a linkage identifier is a very useful device for managing linkage identifiers. In the present invention, the CAM is used as the connection identifier management table, and the data registered in the CAM registers 24 bits of data including the virtual path connection identifier 8 bits and the VCI 16 bits in the CAM. When the cells are multiplexed and output, the connection identifier table management unit 713 outputs the virtual path connection identifier and the VCI to the connection identifier table storage unit 730 to extract and output the connection identifiers. In the case of the virtual path connection, the VCI is set to 0 and only the virtual path connection identifier is output to the connection identifier table storage unit 730 so that the connection identifier can be found only by the virtual path connection identifier regardless of the VCI of the multiplexed cell. In the case of a point-to-multipoint connection, the multipoint connection reference number extracted from the cell is output in place of the virtual path connection identifier without searching the virtual path connection identifier 43, and the VCI is output as 0 to output the multipoint connection reference. Extract connection identifier by number. This allows you to manage connection identifiers with the same management scheme for point-to-multipoint connections or point-to-multipoint connections.

8 is a block diagram of a transmitting cell manager of FIG. 6.

As shown in FIG. 8, the transmission cell management unit of FIG. 6 includes a transmission cell management circuit 810 and a transmission cell management table storage unit 820.

The transmit cell management circuit 810 includes a field programmable gate array (FPGA) configured to include a cell input unit 811, a cell output unit 812, and a table control unit 813, and a transmit cell management table storage unit 820. ) Is composed of DPRAM (Dual Port Random Access Memory) so that the transmission cell management circuit 810 and the control unit can read and write at the same time.

The operation of the transmitting cell manager of FIG. 6 having the structure as described above will now be described.

The cell input unit 811 of the transmit cell management circuit 810 transmits a connection identifier 36 from the transmission connection identifier management unit 630, a connection type 37 signal indicating whether the connection is a virtual path connection or a virtual channel connection, and cell data. Receiving a signal or the like, the cell data is transmitted to the cell output unit 812, and the remaining signals are transmitted to the table control unit 813.

The table controller 813 reads the connection information of the connection from the transmission cell management table storage unit 820 using the connection identifier 36. The transmission cell management table storage unit 820 has connection information for each connection. The connection information in the transmission cell management table storage unit 820 is an output PBA bitmap 56 to which a cell of the connection is to be output as shown in FIG. 8, and an H bit 61 indicating whether a header of an output cell should be converted. C bit 62 indicating the connection type, O bit indicating whether the OAM cell generated when generating the OAM cell is generated as a single-to-end OAM cell or a segment OAM cell (63). ), An output VPI 57, an output VCI 58, an output cell counter 59, an A bit 65 indicating whether the continuity check is activated, a continuity check counter 60, and the like. In the cell output unit 812, two bytes of the output PBA bitmap obtained from the connection information to the cell data received from the table control unit 813 and the cell input unit 811 and the subscriber line number (for the multipoint connection, refer to the multi-point connection. A 56-byte cell in which 1 byte is added) is converted into 16 bits in the form of the cell shown in Fig. 8, and the transmit cell 39 is output to the transmit cell bus.

A method of multi-transmitting a cell to a low-speed subscriber using a device having such a configuration is as follows.

First, when the ATM layer processing unit 110 receives a cell from the switch link, the switch link matching unit 220 checks whether the cell is a cell of a point-to-point connection or a cell of a point-to-multipoint connection. In the case of the point-to-point connection, the cell is stored in the user cell buffer 610 of the transmitting cell processor 230 by adding 1 byte of all bits to the front of the cell. Reads the multi-point connection reference number from the multi-point connection management table using the multi-point connection identifier received from the switch, adds it to the front of the cell, and outputs the cell to the user cell buffer 610. Then, the transmission connection identifier management unit 630 reads the user cell 23 of the user cell buffer 610, extracts the VPI / VCI or the multipoint connection reference number in the header of the cell, and finds the connection identifier. And cell data 38 are transmitted to the transmitting cell management unit 640, and the transmitting cell management unit 640 reads the transmission connection management information from the transmitting cell management table storage unit 820 using the connection identifier and outputs it to the front end of the cell. A 56-byte cell is added with 2 bytes of PBA bitmap and 1 byte of output line number or multi-point connection reference number, converted to 16-bit data, and output to the transmit cell bus. The plurality of physical layer processing units 120-1 to 120 -N examine the first word of the cell input to the transmit cell bus 150, extract only the cell destined for it, and perform header conversion using a multi-point connection reference number. The 53-byte ATM standard cell is stored in the transmit cell buffer at the front end of the active physical layer processing unit by removing the output PBA bitmap and line number 3 bytes. Then, the physical layer processor reads the cell from the transmission cell buffer and loads the cell in the low speed frame to the subscriber.

9 is a structural diagram of transmission connection management information, FIG. 10 is a structural diagram of a cell transmitted from an ATM layer processing unit to a physical layer processing unit via a transmission cell bus, and FIG. 11 is a structural diagram of multipoint connection management information.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, the low-speed subscriber matching apparatus of the asynchronous delivery mode switch of the present invention receives a cell of a point-to-multipoint connection from a switch link having a cell transmission rate of 155 Mbps and uses a multipoint connection identifier to If you identify the connection identifier and use it to output the cell to the cell bus with the output PBA bitmap in the connection management information and the multipoint connection refnum attached to the cell, only the cells destined for it in each physical layer processing PBA By extracting and performing header translation according to the multi-point connection reference number and transmitting the cell to an active subscriber, multiple output layer PBAs are connected to one switch link and multiple subscribers are accommodated in each PBA. By selecting, there is an effect of configuring a device that can multi-transmit a cell to a subscriber.

Claims (6)

Asynchronous delivery mode layer processing means for multiplexing and demultiplexing a received cell; Perform line matching of the low-speed subscriber, extract and multiplex and demultiplex the asynchronous delivery mode cells to be transmitted to the subscriber from the asynchronous delivery mode layer processing means, and transfer the cell to the subscriber according to the connection state of the extracted cell At least one physical layer processing means for transmitting or multiple outputting cells to any of the subscriber lines; And Connection and mounting means for interconnecting the asynchronous delivery mode layer processing means and the at least one physical layer processing means to be implemented. Low speed subscriber matching device made of an asynchronous delivery mode switch. The method of claim 1, The at least one physical layer processing means, A plurality of physical layer processing boards connected to the asynchronous delivery mode layer processing means via the connecting and mounting means Low speed subscriber matching device made of an asynchronous delivery mode switch comprising a. The method of claim 2, The physical layer processing means, If the extracted cell is a cell of point-to-point connection, the cell is transmitted to the subscriber according to the output line number. If the extracted cell is a cell of point-to-multipoint connection, header conversion is performed for each line. A low speed subscriber matching device for an asynchronous delivery mode switch, characterized in that it outputs multiple cells to any subscriber line. The method of claim 1, The asynchronous delivery mode layer processing means, Receiving cell processing means for reading and multiplexing a cell from the physical layer processing means and converting and transmitting a header of the receiving cell using the reception connection information; Convert the cell received from the receiving cell processing means and transmit it to the outside, and when receiving the cell from the outside, by attaching information indicating that the point-to-point connection to the front end of the cell according to the connection type of the cell, or multiple Switch link matching means for attaching and transmitting a point connection reference number to a front end of the cell; When the user cell is received from the switch link matching means, a line number is added to the front end of the cell by using transmission connection information, or a multi-point connection reference number received from the switch link matching means is attached and converted into bits of a small number and transmitted. Transmission cell processing means; And Control means for managing the state of the physical layer processing means, managing the reception connection information in the reception cell processing means, and managing the transmission connection information of the transmission cell processing means; Low speed subscriber matching device made of an asynchronous delivery mode switch. The method of claim 1, The physical layer processing means, Cell multiplexing and demultiplexing means for receiving a cell, extracting the cell, and delivering the cell with reference to a line number according to the extracted cell connection type, or performing cell header conversion to output multiple cells; Transmitting user cell buffering means for buffering the transmitting user cell outputted from the cell multiplexing and demultiplexing means; Frame processing and storage means for reading a cell inputted to the transmitting user cell buffer means, loading the cell in a frame, delivering the cell to the outside, processing a frame input from the outside, and extracting and storing an ATM cell; Physical layer control means for periodically inspecting the frame processing and storage means to monitor for occurrence of a failure and to monitor the state of the physical layer processing means; And Control bus buffer means for controlling communication between the asynchronous delivery mode layer processing means and the physical layer processing means Low speed subscriber matching device made of an asynchronous delivery mode switch. The method of claim 4, wherein The transmission cell processing means, Transmission connection identifier management means for reading and multiplexing a user cell and a management cell, extracting a virtual path identifier and a virtual channel identifier of the cell to find and transmit a connection identifier, and extracting and transmitting a connection identifier using the connection identifier; And Reads connection management information using the connection identifier received from the transmission connection identifier management means, adds a line number with connection management information, outputs a transmission cell converted to a predetermined bit, and adds and receives the received multi-point connection reference number. Transmission cell management means Low speed subscriber matching device made of an asynchronous delivery mode switch.

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