KR0169644B1 - Interface module of atm-mss - Google Patents

Abstract

The present invention relates to a matching module of ATM-MSS, and the present invention provides a receiving unit 1 receives the STM-1 optical frame from another node's connection module and converts it into an electrical signal, the first receiving level converting unit ( 2) converts to TTL level, divides into cell units, the first header converter 3 converts the header, the IPC cell inserter inserts an IPC cell, and the header adder 7 attaches an overheader. The second transmission level converting section 8 converts the transmission level and transmits it to the cell switching module, while the second receiving level converting section 9 receives the cell from the cell switching module and converts the cell to the TTL level. The reject 10 removes the overheader, the IPC extractor 11 extracts the IPC cell, converts the header of the user cell passed by the second header converter 12, and converts the second transmit level converter ( In step 13), the transmission level is multiplexed to STM-1, and the transmission unit 14 converts the transmission signal into an optical signal. By song, to that using an STM-1 link can be provided with a high-speed data services 155.52Mbps it has that effect.

Description

ATM-MSS Matching Module

1 is an overall configuration diagram of an ATM-MSS.

2 is a detailed configuration diagram of ATM-MSS.

3 is a block diagram of a matching module of an ATM-MSS in accordance with the present invention.

4 is a format diagram showing the structure of an ATM cell.

* Explanation of symbols for main parts of the drawings

1: receiving unit 2: first receiving level converting unit

3: first header converter 4: first memory

5: IPC cell insertion 6: Second memory

7: Overhead Adder 8: First Transmission Level Conversion Unit

9: second reception level converting unit 10: overhead header deleting unit

11: IPC cell extraction unit 12: second header conversion unit

13: second transmission level converting unit 14: transmitting unit

The present invention relates to an ATM-MSS, and more particularly, to a matching module of an ATM-MSS configured to connect an HSN and an RSN in an ATM-MSS to an STM-1 link, or to connect an ATM-MSS to another exchange and an STM-1 link. It is about.

Due to the rapid development of the information society, users' communication service demand has increased so that B-ISDN appears as the next-generation communication network. In B-ISDN, it is a plunge to accommodate various services not only in narrow band but also in wide band regardless of band and speed. It is based on ATM, which is a transmission mode, as a basic means of transportation.Because it takes a lot of investment and time to construct such ATM network, broadband information communication through MAN that can be easily developed into B-ISDN while satisfying the current user's needs. Is expanding the application area.

Here, ATM (Asynchronous Transfer Mode) refers to a method of dividing information to be transmitted into a short-length packet unit called a cell and transmitting asynchronously at high speed.Man (Metropolitan Area Network) It is a network system built in the city or intercity of Iran. It is composed of a multimedia system that can be used by tens of thousands of people in a diameter of 50km and handles not only text but also voice and video.

As a result, ATM-MAN has been developed that adopts ATM technology in order to preserve the integrity of B-ISDN.

In general, ATM-MANS (ATM-MAN Switching System) refers to a MAN switching system employing the ATM method.

1 is an overall configuration diagram of an ATM-MSS. As shown in FIG. 1, an ATM-MSS is referred to as a Remote Switcing Node (hereinafter referred to as RSN) and a Hub Switcing Node (hereinafter referred to as HSN). ) And Element Management System (hereinafter referred to as EMS).

The connection between HSN and RSN includes a star topology method (a) in which HSN and RSN are connected point-to-point, and a ring topology method (b) in dual rings having different transmission directions. ) Duplicated the link so that it can be recovered immediately in the event of a link failure.In the ring topology method (b), each node shares a dual link, so that a node receiving a cell from a link in one direction checks the address of the cell. If the cell is delivered to the other node, it is received. If the cell is delivered to the other node, it passes to the next node.

Here, RSN collects traffic inputted from subscriber and transmits it to HSN or transmits traffic inputted from HSN to subscriber, ATM cell exchange function between subscribers connected to same RSN, subscriber when receiving circuit emulation and frame relay service. It provides the function of converting information into ATM cell or converting ATM cell into frame format or frame relay format of circuit. It also multiplexes and centralizes traffic input from subscribers, and demultiplexes traffic to be delivered to subscribers.

In addition, the HSN is in charge of ATM cell exchange function and multiplexing demultiplexing, traffic centralization, cell exchange function with other ATM or ATM-MSS exchanges between RSNs, and performs an access function with an EMS, an operator matching function and a subscriber access test function.

And the EMS is in charge of the operation and maintenance of ATM-MSS.

Subscriber access link uses DS3 class and DS1E class and exchanges information using frame type that map ATM cell to frame type used in existing asynchronous digital network.

FIG. 2 is a detailed diagram of ATM-MSS showing the relationship between HSN, RSN, exchange, and subscriber. As shown in FIG. 2, the ATM-MSS is a node in charge of management of each board in RSN or HSN. A subscriber matching module (2) for connecting the management module (1) with a subscriber and an ATM-MSS, a node matching module (3) for connecting an RSN and an HSN, an exchange matching module (4) for connecting another exchanger and an ATM-MSS, and It consists of a cell switching module 5 for three exchanges between modules.

In particular, the cell switching module 5 receives a cell from each module in the node and delivers the cell to the corresponding destination module based on the routing field (overheader) of the header. The subscriber matching module 2 and the node matching are performed. The exchange function of the user cell input through the module 3 and the exchange matching module 4 and the IPS cell exchange function for mode management input from the mode management module 1 are provided.

That is, the ATM cell is largely divided into a user cell and an IPC cell as described above.

In this case, the user cell refers to information transmitted by the user through ATM-MSS and is a data flow that occupies most of the cell switching module 5.

On the other hand, the IPC (Inter-Processor Communication) cell is a kind of management message that the node management module delivers for the purpose of managing each module implemented in one node. If it is determined to occur, it is processed, and the performance degradation is detected in advance to prevent the occurrence of failures, and the performance is analyzed to evaluate the performance of the entire network and take appropriate measures to induce the performance improvement, while the point-to-point path and Set up and release channels.

These ATM-MSSs provide 155.52 Mbps of RSNs and HSNs or ATM-MSSs and other exchanges to implement B-ISDN to provide broadband information communications such as video telephony, video conferencing, CATV distribution, and HDTV. You need a matching module to connect to the STM-1 link.

Accordingly, in order to achieve the above object, the present invention provides an ATM-MSS matching module for connecting an RSN and an HSN in an ATM-MSS to an STM-1 link, or for connecting an ATM-MSS and another switch to an STM-1 link. The purpose is to provide.

The matching module of the ATM-MSS of the present invention for achieving the above object, the receiving unit for receiving the STM-1 class optical frame from the connection module of the other node and converts it into an electrical signal; A first reception level converting unit receiving an STM-1 class frame of an electrical signal from the receiving unit, converting the same into a TTL level, and dividing it into 53-byte ATM cells;

A first header converter which receives a TTL level ATM cell from the first reception level converter and converts the header into a header applicable to the ATM-MSS;

First memory for storing the IPC cell:

An IPC cell insertion unit for receiving an IPC cell stored at a designated address of the first memory by a CUP for transmission to another module, and inserting the IPC cell into a flow of an ATM cell inputted from the first header converter.

Second memory for storing the header:

An overhead header adder which receives an ATM cell from the IPC cell inserter and analyzes a header to determine a transmission destination, and then reads a corresponding 6-byte header from the second memory and attaches it to the front of the cell;

A second reception level converting unit which receives a 59-byte ATM cell from the addition of the header and converts it to a transmission level and transmits it to a cell switching module for transmission to another module;

A second reception level converting unit for receiving a 59 byte ATM cell from the cell switching module and converting the same to a TTL level:

An overhead header remover configured to receive an ATM cell converted to a TTL level from the second reception level converter and to remove an overhead header of 6 bytes;

An IPC cell extracting unit which receives an 53-byte ATM cell from the overhead removing unit and determines whether it is an IPC cell or a user cell, extracts an IPC cell and stores the extracted IPC cell in the first memory;

A second header converter configured to receive the passed user cell and analyze the header and convert the header into a header applicable to the ATM-MSS;

A second transmission level conversion unit receiving an ATM cell from the second header conversion unit, multiplexing to STM-1 level, and converting to a transmission level; and

And a second transmitter for receiving an STM-1 class frame from the second transmitter level converting unit and converting the STM-1 class frame into an optical frame for transmission to the other node's connection module.

According to the present invention, the apparatus of the present invention converts an STM-1 class optical frame input from another node's access module to a TTL level, divides it into units of ATM cells, and then converts a header into units of ATM cells. Add the headers before sending. On the contrary, in order to transfer the ATM cell inputted from the cell switching module to the other node's access module, the header is converted to the TTL level to remove the header, the header is converted, and then multiplexed to the STM-1 class frame to match the transmission level. Send to module

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram of a matching module of an ATM-MSS according to the present invention. The apparatus of the present invention includes a receiving unit 1 for receiving an STM-1 class optical frame from another node's connection module and converting it into an electrical signal: A first reception level converter (2) which receives an STM-1 class frame of an electrical signal from the receiver (1), converts it into a TTL level, and divides it into units of 53 bytes of ATM cells: the first reception level converter (2) 2) First header converter 3 for receiving TTL level ATM cells and converting the headers into headers applicable to this ATM-MSS: First memory 4 for storing IPC cells: Other An IPC cell insertion unit which receives an IPC cell stored at a designated address of the first memory 4 by a CPU for transmission to a module, and inserts the IPC cell into the flow of an ATM cell input from the first header converter 3 ( 5): second memory 6 for storing the overheader: inserting an ATM cell from the IPC cell insertion unit 5 The header is analyzed to determine the transmission destination, and then the corresponding header of 6 bytes is read from the second memory 6 and pasted to the beginning of the cell; from the header adding unit 7. Second transmission level converting unit (8) for receiving 59-byte ATM cells, converting them to a transmission level, and transmitting them to another module for transmission to another module (8): Receives 59-byte ATM cells from a cell switching module to a TTL level. A second reception level converting unit 9 for converting: An overhead header removing unit 10 for receiving an ATM cell converted to a TTL level from the second reception level converting unit 9 and removing an overhead of 6 bytes. An IPC cell extraction unit which receives 53 bytes of ATM cells from the header removing unit 10 determines whether an IPC cell or a user cell is extracted, and extracts an IPC cell, stores it in the first memory 4, and passes it through the user cell. (11): input the passed user cell A second header converter 12 for analyzing the header and converting the header into a header applicable to the ATM-MSS: receiving an ATM cell from the second header converter 12, multiplexing it to STM-1 level, and transmitting it A second transmission level converting unit 13 for converting to a level; The second transmission unit 14 is configured to receive an STM-1 class frame from the second transmission level conversion unit 13, convert the STM-1 class frame into an optical frame, and transmit the same to the other node's connection module.

Next, the operation and effect of the present invention configured as described above will be described in detail.

4 is a format diagram showing the structure of an ATM-MSS inter-module data flow, that is, the structure of an ATM cell.

As shown in FIG. 4, the configuration of one cell may include a 53-byte ATM cell including a 5-byte header and an overhead header (tag) of about 6 bytes required for switching in the cell switching unit. have.

In addition, in order to control several modules in a node, communication between the node management module and each module is performed through a switching module, and an IPC cell performing such a function allocates a separate bit in an header by Indicates a cell for control messages inside the system.

The 53-byte ATM cell is divided into a 5-byte header and a 48-byte payload. The 5-byte header structure has a first byte of 4 bits of generic flow control (GFC). ) And a 4-bit Virtual Channel Identifier (VCI), the second byte consists of a 4-bit Virtual Path Identifier (VPI) and a 4-bit Virtual Channel Identifier (VCI), The third byte consists of an 8-bit virtual channel identifier (VCI), so the fourth byte is a 4-bit virtual channel identifier (VCI), a 3-bit effective load type identifier (PTI) and a 1-bit cell. Cell Loss Priority (CLP), and the fifth byte is composed of 8-bit header error control (HEC).

At this time, when an ATM cell is received from each module to the switching unit 40, an header, or tag, is prefixed to the ATM cell by the routing table before the ATM cell is output from each module. Thus, the switching unit 40 ) Extracts the tag of the received ATM cell, determines the target module based on the tag and the internal recording recorded in the switching unit 40, finds the set path, and then performs switching.

All ATM cells are transmitted to the corresponding target module through the cell switching device.

As shown in FIG. 3, the apparatus of the present invention receives an ATM cell from another node's access module and transmits it to the cell switching module, and on the contrary, receives an ATM cell from the cell switching module and transmits it to the other node's access module. This can be explained by dividing it.

First, when receiving an ATM cell from another node's connection module and transmitting it to the cell switching module for transmission to another module of the main node, the STM-1 of 155.52Mbps transmitted from the other node connection module by the first receiver 1 Receives an optical frame and converts it into an electrical signal and serially transmits it to the first reception level converting unit 2, and checks the LOS (loss of signal) of the STM-1 optical frame, and also receives the first reception level converting unit 2 To serial.

In general, the synchronous transmission device receives an asynchronous multiplexed signal (eg, zjs vs. DS1, DS1E) from the subscriber side, synchronously multiplexes it, converts it into an optical signal, and then transmits the asynchronous multiplexed signal to the opposite station through the rhkd cable. Multiplex and form an STM-1 frame of 155.52Mbps.

The first reception level converter 2 receiving the STM-1 frame from the receiver 1 receives a clock of 19.44 Mbps from a clock generator (not shown) and restores a clock of 155.52 Mbps from the input STM-1 frame. Based on the recovered 155.52 Mbps clock, after checking the failure states of the out of frame (LOF), loss of frame (LOF), and loss of signal (LOS) of the STM-1 frame, the STM-1 frame Partitions the ATM cell into 53-byte units, checks whether the cell is damaged, checks for HEC (Header Error Control), etc., and then uses a 1-bit (Start Of Cell) signal and 53-byte ATM. The cell is transmitted to the first header converter 3.

In addition, the first reception level converting section 2 converts the transmission level to a TTL level.

In general, when a transmitter transmits a signal through a cable, the transmission level is converted to increase the transmission speed. Accordingly, the receiver must convert the signal back to a TTL level to process the signal.

The first header converter 3, which receives the 1-bit SOC signal and the 53-byte ATM cell, analyzes the VPI and VCI in the header part and converts the VPI and VCI to be applicable to the ATM-MSS. A bit SOC signal and a 53-byte ATM cell are transmitted to the IPC cell inserter 5.

The IPC cell insertion unit 5 receives an 53-byte IPC cell stored at a designated address of the first memory 4 by the CPU to transmit to another module, and receives the input from the first header converter 3. It is inserted into the flow of an ATM cell of 53 bytes and transmitted to the header adding unit 7.

The header adder 7, which receives the 1-bit SOC signal and the 53-byte ATM cell from the IPC cell inserter 7, writes the ATM cell into the second memory 6 as the ATM cell is input, and then again. By reading a 53-byte ATM cell from the second memory 6 and analyzing the header part, the corresponding 6-byte header (store tag) stored in the second memory 6 is read and attached to the front of the ATM cell. Thereafter, the formed 59-byte ATM cell is transmitted to the first transmission level converting section 8.

At this time, the second memory 6 not only serves as a buffer for temporarily storing the ATM cells transmitted to the header adding unit 7 but also means for storing the header.

The first transmission level converter 8 may level-translate the 1-bit SOC signal of the TTL level and the 59-byte cell and transmit the converted level to the cell switching module.

On the contrary, when receiving an ATM cell from the cell switching module and transmitting it to the matching module of another node, the second reception level converter 9 receiving the 1-bit SOC signal and the 59-byte cell from the cell switching module transmits the TTL signal. The data is converted to the level and transmitted to the header deleting unit 10.

The overhead header deleting unit 10 receiving the 1-bit SOC signal converted to the TTL level and 59 bytes of cells removes the 6-byte rounding tag and then outputs 53 bytes of ATM cells.

The IPC cell extracting unit 11 receives the 53-byte ATM cell, determines whether it is an IPC cell or a user cell, extracts the IPC cell if it is an IPC cell, stores it in a stored address of the first memory 4, and if it is a user cell, It just passes to the second header converter 12.

The second header converter 12 receiving the extracted 53-byte user cell analyzes the header and converts the header into VPI and VCI applicable to the ATM-MSS.

Accordingly, the second transmission level converting unit 13 receives the 53-byte ATM cell from the second header converting unit 12, multiplexes it into an STM-1 class frame, and transmits it to the transmitting unit 14, and then transmits the transmitting unit 14. ) Converts an STM-1 class frame, an electrical signal, into an STM-1 optical frame and transmits it to the other node's access module.

Accordingly, the apparatus of the present invention signals an optical STM-1 frame received from a counterpart station for application to an ATM-MSS system and simultaneously processes a signal to transmit an ATM cell input from a cell switching module to the counterpart station, thereby providing ATM-MSS. Not only can HSN and RSN be connected to STM-1 link of 155.52Mbps, but ATM-MSS can be connected to STM-1 link with other ATM-MSS switch or ATM switch, and it can accommodate broadband transmission capacity of 155.52Mbps. Since the subscriber side can also be connected to the STM-1 link, the STM-1 link can be used to provide a high-speed data service of 155.52 Mbps.

Claims (1)

Receiving unit (1) for receiving an STM-1 class optical frame from the connection module of the Tanor and converting it into an electrical signal: The STM-1 class frame of the electrical signal is received from the receiving unit (1) and converted to a TTL level. A first reception level converting unit (2) for dividing bytes into ATM cell units: A header applicable to this ATM-MSS by receiving a TTL level ATM cell from the first receiving level converting unit (2) and analyzing the header A first header converter 3 for converting an IPC cell: a first memory 4 for storing an IPC cell: an input of an IPC cell stored at a designated address of the first memory 4 by the CPU for transmission to another module An IPC cell inserting unit 5 for receiving and inserting into the flow of an ATM cell inputted from the first header converting unit 3: a second memory 6 for storing an overhead header: the IPC cell inserting unit 5 Receive the ATM cell and analyze the header to determine the transmission destination, and then 6 bar from the second memory. Overhead adder 7 for reading the corresponding header of a byte and attaching it to the front of the cell: A cell for receiving a 59-byte ATM cell from the overhead adder 7, converting it to a transmission level, and transmitting the same to another module. Second transmission level converting section 8 for transmitting to switching module: Second reception level converting section 9 for receiving 59 bytes of ATM cell from cell switching module and converting to TTL level: Second receiving level converting section ( 9) an overhead header removing unit 10 which receives an ATM cell converted to a TTL level from the header and removes 6 bytes of headers: an IPC cell or user receiving 53 bytes of ATM cells from the overhead header removing unit 10; The IPC cell extraction unit 11 which determines whether the cell is an IPC cell, extracts it, stores it in the first memory, and passes the user cell if the user cell passes. The header is analyzed by receiving the passed user cell and applied to the ATM-MSS. Second header converter for converting headers 12. A second transmission level conversion section 13 for receiving an ATM cell from the second header conversion section 12, multiplexing it to STM-1 level, and converting it into a transmission level. 13) A matching module of ATM-MSS, comprising: a second transmitting unit (14) which receives an STM-1 class frame from the first frame and converts it into an optical frame and transmits it to a connection module of another node.