KR19990077438A - Method and apparatus for driving a battery-backed up clock while a system is powered-down - Google Patents

Abstract

The present invention relates to a method and apparatus for driving a battery backup clock while a computer system is powered down. The present invention uses auxiliary power supply VAUX to provide power to the microprocessor bus oscillator. Microprocessor bus oscillators are typically high frequency, very precise oscillators. The microprocessor bus oscillator remains running while the computer system is plugged into a wall outlet but is powered down. Thus, an accurate time base can be synthesized to drive the battery backup clock input. Microcontroller PAL, or other circuitry, can be used to convert the high-frequency signals from the microprocessor bus oscillator to a frequency suitable for the battery backup clock. Thus, one oscillator is used to maintain time for normal operation. Use a battery-backed crystal oscillator to keep time only if the system is moved or if mains power fails. This minimizes the occurrence of timing errors when the system is turned off and back on.

Description

TECHNICAL AND APPARATUS FOR DRIVING A BATTERY-BACKED UP CLOCK WHILE A SYSTEM IS POWERED-DOWN

The present invention relates to calculating time in a computer system, and more particularly, to a method and apparatus for driving a battery backup clock while a system is powered down.

In most computer systems, the actual time is calculated internally by the microprocessor. A very precise microprocessor bus oscillator acts as the clock source. For example, a 14.3 MHz oscillator that generates 14,300,000 ticks (ie cycles) per second can be used as the clock source. Clock ticks are accumulated in a high speed counter (eg, a subtraction counter) or a system real time clock (RTC). The actual time is calculated as a function of the subtractor value and the known oscillator frequency. For example, if the counter has a value of 1 to 3 million ticks and a value of 2 to 2 million ticks, then 0.0699 seconds ((3 million-2 million) /14.3 million) between time 1 and time 2 It can be judged that it has passed. The frequency of the microprocessor bus oscillator is specified with a given temperature and voltage range. This means that the frequency of the microprocessor bus oscillator remains within a certain range of a given temperature and voltage range.

When the computer system is powered down, the system RTC value should be stored in the battery backup RTC. Battery-backed RTCs are low-power circuits that typically operate on a 32,768 Hz (32 KHz) time base. The time is calculated and stored in the battery backup RTC while the computer system is powered down. However, the battery backup RTC is not as accurate as the system RTC. This is because the frequency of the 32 KHz oscillator driving the battery-backed RTC fluctuates greatly with the action of temperature. A typical error margin is -0.04 x (delta T) x (delta T), where (delta T) is the deviation from normal temperature of 25 degrees Celsius. Therefore, the 32 KHz oscillator has an inverse parabolic function temperature coefficient, and the more the temperature fluctuates from 25 degrees Celsius, the slower the battery backup RTC runs.

When the computer is restored to power, the battery backup RTC is copied to the system RTC and the microprocessor is back in real time. However, the accumulated error when the computer is powered off passes to the system RTC when the computer is powered on. The conventional way to deal with this problem has been to use a temperature-compensated 32 KHz oscillator to drive the battery backup clock when the system is powered down. However, temperature-compensated oscillators are expensive and are typically not suitable for battery operation.

In conclusion, there is a need for an inexpensive method and apparatus for driving a battery backup RTC when the computer system is powered down. It is also desirable to ensure accurate timekeeping through the battery backup clock while the system is powered down and to minimize timing errors that are passed to the system RTC when the system is powered on.

Accordingly, the present invention relates to a method and apparatus for driving a battery backup clock while a computer system is powered down. The present invention uses an auxiliary power supply VAUX to provide power to the microprocessor bus oscillator. Microprocessor bus oscillators are typically high frequency, very precise oscillators. The microprocessor bus oscillator remains running while the computer system is plugged into a wall outlet but is powered down. Thus, an accurate time base can be synthesized to drive the battery backup clock input. Microcontroller PAL, or other circuitry, can be used to convert the high-frequency signals from the microprocessor bus oscillator to a frequency suitable for the battery backup clock.

An advantage of the present invention is that one oscillator is used to maintain time for normal operation. Only when the system is moved or if there is a mains power failure, a battery-backed crystal oscillator is used to maintain time. Another advantage of the present invention is that timing errors are minimized when the system is turned off and back on.

1 is a circuit diagram of one embodiment of a master / slave time base circuit in accordance with the present invention.

2 is a circuit diagram of an alternative embodiment of a master / slave time base circuit.

<Explanation of symbols for the main parts of the drawings>

10: VAUX

12: bus oscillator

13: Bus Oscillator Signal

36: PAL (850)

44: input comparator

54: sync signal

308: Battery Backup Clock Circuit

850: PAL

The above features and advantages of the present invention and other features and advantages will become more apparent from the following detailed description of the preferred embodiments of the present invention. In the following description, reference numerals are given to the accompanying drawings in which the same reference numbers indicate the same parts in the various drawings.

Most computer systems have auxiliary power supplies, commonly referred to as VAUX, that continue to power the system when the system is turned off while connected to the main wall outlet. Auxiliary power supplies are also often used to power power management units or maintenance processors. Since the present invention uses VAUX to power the microprocessor bus oscillator, the oscillator continues to run while the computer system is connected to a wall outlet. Microprocessor bus oscillators are typically high frequency, very precise oscillators. Thus, an accurate time base can be synthesized to drive the battery backup clock input. An advantage of the present invention is that one oscillator is used to maintain time for normal operation. Only when the system is moved or if there is a mains power failure, a battery-backed crystal oscillator is used to maintain time. When the computer system is powered down, real-time values (such as date and time) are copied to the backup clock. When a computer system is powered up by system initialization, the real time value is copied from the backup clock to the microprocessor real time clock.

Hereinafter, an embodiment of the present invention will be described with reference to FIG. 1. As shown in FIG. 1, the VAUX 10 is used to power a high frequency, very precise microprocessor bus oscillator 12. In this embodiment, oscillator 12 is a 14.3 MHz oscillator, the frequency of which is specified at +/- 10 (ppm) per million in operating temperature and voltage range. Oscillator 12 drives a microprocessor RTC. As shown in FIG. 1, the signal 13 of the oscillator 12 is input to the buffer 14. The power good indication 16 is an indication that the output of the power supply (not shown) is stable and within a certain range. The signal 18 of the buffer 14 is input to a phase locked loop microprocessor clock generator 20. Clock signal 22 is input to counter 24 of microprocessor 26, which accumulates clock ticks to calculate the actual time, such as date and time, when the system is powered up.

The signal 13 of the oscillator 12 is also input to the circuit 750. In the embodiment being described, circuit 750 is a microcontroller that can be programmed in assembly language. Those skilled in the art will appreciate that any number of circuits may be used to implement the logic structure of circuit 750. Circuit 750 synthesizes a 32 KHz time base, 32768 A, using 14.3 MHz input of oscillator 12. A 32 KHz time base, 32768 A, is sufficient for an average of 32 KHz over time. For example, in the illustrative embodiment the instantaneous frequency of 32768 A may be greater than or less than 32 KHz, but the average frequency is close to 32 KHz during the one second interval. In the illustrative embodiment, circuit 750 executes a series of instructions, mostly no operand (nop) instructions, for a period of time to convert the 14.3 MHz input of oscillator 12 to a 32 KHz output 32768 A. The instructions are executed at a frequency of 14.3 MHz. At the appropriate time point (eg, after a certain number of cycles have elapsed), 32768 A is pulsed (ie, switched from high to low or from low to high). Thus, a 32 KHz frequency is generated and input to the multiplexer 30. Multiple input frequencies can be adjusted to invoke different timing loops to produce a constant 32 KHz output.

The 32 KHz oscillator 32 also supplies an input signal 34 to the multiplexer 30. Oscillator 32 is powered through a battery (not shown) as indicated by input NVRAMVcc 36. Circuit 750 monitors on / off circuit 38 to determine if VAUX 10 is operating and sends signal 42 to multiplexer 30. Signal 42 is the output of circuit 750 and determines whether 32768 A or input signal 34 is used to drive battery backup clock circuit 308. The battery backup clock circuit 308 is powered by a battery (Vbat and Vcc), so that operation continues even if the VAUX 10 is not in operation. With the help of the field effect transistor (FET) input comparator 44, the circuit 750 monitors the 32 KHz oscillator 32 to synchronize the multiplexer 30 between 32768 A and the signal 34 of the oscillator 32. Can switch When the system is unplugged or the mains power fails, the on / off circuit 38 detects the VAUX 10 falling below the threshold voltage, and the circuit 750 determines that the oscillator 32 provides a 32 KHz signal. do. In this way, the oscillator 32 controls the operating frequency.

When the system is plugged in again or main power is restored, the battery backup RTC 308 can again use 32768 A as the time base. If the on / off switch 38 detects the VAUX 10 above the threshold voltage, the circuit 750 again decides to use 32768 A. The circuit 750 monitors the synchronization signal 54 output from the comparator 44 to synchronously switch the multiplexer 30. If the sync signal 54 is determined to be low, the circuit 750 begins a 32768 A cycle, which is a signal 32768 A low, and switches the multiplexer 30 to select signal 32768 A.

Hereinafter, an alternative embodiment of the present invention will be described with reference to FIG. 2. Referring to FIG. 2, as described above with reference to FIG. 1, the VAUX 10 powers a 14.3 MHz oscillator 12 to drive a microprocessor clock generator. The signal 13 of the oscillator 12 is also input to the PAL (programmable array logic circuit) 850. PAL 850 is programmed to convert the 14.3 MHz input frequency to 32 KHz output frequency, 32768 A. The switch 46 is controlled by the on / off circuit 48 and is used to block the 32768 A signal while the VAUX is fluctuating. The switch 50 is used to connect the 32768 A signal to the battery backup clock, circuit 308 once the VAUX 10 is stabilized.

When the system is unplugged or the main power fails, the on / off circuit 48 detects the VAUX 10 falling below the threshold voltage and opens the switch 46. This allows the crystal 52 to control the operating frequency. In the illustrative embodiment, the crystal 52 is a 32 KHz crystal. An oscillator (not shown) is integrated into the circuit 308 and driven by the crystal 52. Since the frequencies of the oscillator driven by crystal 52 and 32768 A are close but not exactly the same, the oscillator adjusts slightly until its frequency is at the resonant frequency. In other words, when both switch 46 and switch 50 are closed, signal 32768 A drives the X1 input of circuit 308. When either switch 46 or switch 50 (or both) is open, the oscillator in circuit 308 adjusts the crystal frequency of crystal 52.

When the system is plugged in again or main power is restored, the battery backup RTC 308 can again use 32768 A as the time base. PAL 850 includes logic circuitry to monitor output signal 54 of comparator 44. If VAUX 10 is available, a synchronous connection is made to crystal 52. Comparator 44 allows PAL 850 to monitor sync signal 54. If the sync signal 54 is determined to be low, the PAL 850 starts a 32768 A cycle with a signal of 32768 A low and closes the switch 50. Once the 32768 A signal is connected to the input X1 of the RTC circuit 308, it again begins to operate using the 32768 A signal as a time base.

While the present invention has been described to some extent, it will be understood by those skilled in the art that modifications may be made in the elements of the invention without departing from the spirit and scope of the invention. The invention is limited only by the following claims and their equivalents.

According to the present invention, one oscillator is used to maintain time for normal operation, and the time is maintained by using a battery backup crystal oscillator only when the system is moved or when main power fails. According to another aspect of the present invention, there is an effect that the timing error is minimized when the system is turned off and back on.

Claims (14)

In a method for calculating elapsed time in a computer system, Providing a processor clock with a first signal having a first frequency generated by a first oscillator receiving power from a power source that maintains operation even when the computer system is powered down; Converting the first signal into a second signal having a second frequency; Providing the second signal to a backup clock. The method of claim 1, Providing a third signal to the backup clock if it is detected that the power source is unavailable, the third signal being caused by a second oscillator having a third frequency that is substantially equivalent to the second frequency. How it occurs. The method of claim 2, And the second oscillator is powered by a battery. The method of claim 2, Providing the third signal to the backup clock further comprises transitioning the second signal to the third signal when it is detected that the power source is unavailable. The method of claim 4, wherein If it is detected that the power source is available, transitioning the third signal to the second signal. In a method for calculating elapsed time in a computer system, Powering the processor, the first oscillator, and the frequency converter via a basic power supply; Generating, by the first oscillator, a first signal having a first frequency; Generating a date and time by the processor while the processor is powered up; In response to the first signal, generating, by the frequency converter, a second signal having a second frequency; Supplying power to the second oscillator and backup clock by a backup power supply; Generating a third signal having a third frequency substantially equivalent to the second frequency by the second oscillator; When the computer system is powered down and the primary power supply is available, generating a date and time by the backup clock in response to the second signal; Generating a date and time by the backup clock in response to the third signal when the computer system is powered down and the primary power supply is not available. In a circuit for calculating elapsed time in a computer system, A power source that maintains operation even when the computer system is powered down; A first oscillator powered by the power source and operating at a first frequency; A first clock driven by the first signal of the first oscillator; Means for converting the first signal into a second signal having a second frequency; A backup clock driven by the second signal. The method of claim 7, wherein And a second oscillator powered by a battery and operating at a third frequency, the third frequency being substantially equivalent to the second frequency. The method of claim 8, Means for determining if the power source is unavailable; Means for driving the backup clock with a third signal generated by the second oscillator. The method of claim 9, The means for driving the backup clock with the third signal further comprises means for transitioning the second signal to the third signal. The method of claim 10, Means for determining if the power source is available; Means for transitioning said third signal to said second signal to drive said backup clock. The method of claim 7, wherein Said means for converting said first signal into said second signal comprises a microcontroller. The method of claim 7, wherein Said means for converting said first signal into said second signal comprises a programmable array logic circuit. 12. A circuit for calculating elapsed time in a computer system comprising a processor, a first oscillator, and a frequency converter, powered by a basic power supply, Means for generating a first signal having a first frequency by a first oscillator; Means for generating a date and time by the processor while the processor is powered up; Means for generating, by the frequency converter, a second signal having a second frequency in response to the first signal; Means for powering the second oscillator and backup clock by a backup power supply; Means for generating, by the second oscillator, a third signal having a third frequency substantially equivalent to the second frequency; Means for generating a date and time by the backup clock in response to the second signal when the computer system is powered down and the primary power supply is available; Means for generating a date and time by the backup clock in response to the third signal when the computer system is powered down and the primary power supply is unavailable.