JPS5797130A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5797130A
JPS5797130A JP55171604A JP17160480A JPS5797130A JP S5797130 A JPS5797130 A JP S5797130A JP 55171604 A JP55171604 A JP 55171604A JP 17160480 A JP17160480 A JP 17160480A JP S5797130 A JPS5797130 A JP S5797130A
Authority
JP
Japan
Prior art keywords
clock
supply
circuit
gate
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55171604A
Other languages
Japanese (ja)
Other versions
JPS6135565B2 (en
Inventor
Tomihiro Ishihara
Yukio Maehashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55171604A priority Critical patent/JPS5797130A/en
Publication of JPS5797130A publication Critical patent/JPS5797130A/en
Publication of JPS6135565B2 publication Critical patent/JPS6135565B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom

Abstract

PURPOSE:To prevent the malfunction and to reduce the power consumption, by providing a control means which stops and restarts the supply of the clock signal plus a control means which stabilizes the restarting of the clock signal to a processor processing a clock oscillating circuit which uses a quartz oscillator. CONSTITUTION:The timing control is given to a processing part 1 by means of a clock signal 6 supplied from a clock generating part 5, and then a program is processed. The part 5 includes a clock generating circuit 11 using a quartz oscillator etc., and AND gate 25 which supplies the clock to the part 1, a supply inhibiting FF22 which inhibits the supply of clock to the part 1 through the gate 25 by an inhibition request signal 23 and for a period decided by a counter 17, and an oscillation stopping FF16 that stops the generation of clock at the circuit 11 by a stop request signal 15. Then the supply of clock to the part 1 through the gate 25 is controlled and inhibited at a control part 2 for a period decided by the counter 17 form the restart 18 of the generation of clock at the circuit 11.
JP55171604A 1980-12-05 1980-12-05 Data processor Granted JPS5797130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55171604A JPS5797130A (en) 1980-12-05 1980-12-05 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55171604A JPS5797130A (en) 1980-12-05 1980-12-05 Data processor

Publications (2)

Publication Number Publication Date
JPS5797130A true JPS5797130A (en) 1982-06-16
JPS6135565B2 JPS6135565B2 (en) 1986-08-13

Family

ID=15926238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55171604A Granted JPS5797130A (en) 1980-12-05 1980-12-05 Data processor

Country Status (1)

Country Link
JP (1) JPS5797130A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59200327A (en) * 1983-04-26 1984-11-13 Nec Corp Control system of peripheral device
JPS6034628U (en) * 1983-08-10 1985-03-09 三洋電機株式会社 Initial setting circuit
JPH05259825A (en) * 1992-02-28 1993-10-08 Nec Corp Clock generating circuit
FR2789247A1 (en) * 1999-01-28 2000-08-04 St Microelectronics Sa Modular electronic circuit having improved synchronization for use in processing and transmission of electronic data at very high frequencies has modules comprising cells with means for coordinating clock signals

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59200327A (en) * 1983-04-26 1984-11-13 Nec Corp Control system of peripheral device
JPH0113573B2 (en) * 1983-04-26 1989-03-07 Nippon Electric Co
JPS6034628U (en) * 1983-08-10 1985-03-09 三洋電機株式会社 Initial setting circuit
JPH05259825A (en) * 1992-02-28 1993-10-08 Nec Corp Clock generating circuit
FR2789247A1 (en) * 1999-01-28 2000-08-04 St Microelectronics Sa Modular electronic circuit having improved synchronization for use in processing and transmission of electronic data at very high frequencies has modules comprising cells with means for coordinating clock signals
US6772358B1 (en) 1999-01-28 2004-08-03 St Microelectronics Sa System and method for coordinating activation of a plurality of modules through the use of synchronization cells comprising a latch and regulating circuits

Also Published As

Publication number Publication date
JPS6135565B2 (en) 1986-08-13

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