JPS58113889A - Timer device - Google Patents
Timer deviceInfo
- Publication number
- JPS58113889A JPS58113889A JP21289081A JP21289081A JPS58113889A JP S58113889 A JPS58113889 A JP S58113889A JP 21289081 A JP21289081 A JP 21289081A JP 21289081 A JP21289081 A JP 21289081A JP S58113889 A JPS58113889 A JP S58113889A
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- oscillator
- output
- power
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G19/00—Electric power supply circuits specially adapted for use in electronic time-pieces
- G04G19/10—Arrangements for supplying back-up power
Abstract
Description
【発明の詳細な説明】
本発明は、ビデオテープレコーダ等の電子機器2パー゛
に内蔵され、時刻の計数とともに予じめ設定された予定
時刻において、記録再生テレビジョンチャンネルの選択
等の種々の動作を行うタイマー装置に関するものである
。DETAILED DESCRIPTION OF THE INVENTION The present invention is built into an electronic device such as a video tape recorder, and is capable of performing various functions such as recording/reproducing television channel selection at a preset scheduled time along with time counting. This invention relates to a timer device that operates.
ビデオテープレコーダ等に使用されるタイマー装置は、
一部のものを除き停電時のタイマーバンクアップは重要
な機能の一つとなっている。長時間のバンクアップを行
なうには消費電流を押えることが必要である。一方、タ
イマーの多機能化のためにはシステムを高速で動作させ
ることが望ましく、このためには消費電力は増加するこ
ととなり、この両者は相反するものとなっている。この
ため従来は充電可能な比較的容量の大きい電池を停電時
のバックアップ電源として用いることで目的を達成して
いたが、電池の信頼性の問題と充電に時間を要するため
、長時間システムを通電した後でないと充分なバックア
ップをできないという欠点を持っていた〇
本発明は、停電時のタイマー装置の必要な動作が、メモ
リー内容の保持と時刻の運針だけであり、3ページ
比較的低速度の動作でも満足できることから、通常動作
時には発振周波数が高く、温度特性の良い高精度水晶振
動子をシステムのシステムクロック信号および時計のタ
イムベースクロック信号源として用い、停電時には発振
周波数の低い水晶振動子を用いることによジ、通常時は
、高精度高機能のタイマー装置としての動作を可能にし
、停電時はコンデンサーでもバックアップ可能にし、安
価で高信頼性のシステムを実現するものである。Timer devices used in video tape recorders, etc.
With the exception of some types, timer bank up during power outages is one of the important functions. In order to perform bank up for a long time, it is necessary to suppress current consumption. On the other hand, in order to make the timer multi-functional, it is desirable to operate the system at high speed, which increases power consumption, and these two are contradictory. Conventionally, this goal was achieved by using a rechargeable battery with a relatively large capacity as a backup power source during a power outage. However, the present invention has the disadvantage that a sufficient backup cannot be made until after the power outage occurs.In the present invention, the only necessary operations of the timer device during a power outage are to hold the memory contents and move the time hand, and the 3 page Since the operation is satisfactory, a high-precision crystal resonator with a high oscillation frequency and good temperature characteristics is used as the system clock signal and time base clock signal source for the system during normal operation, and a crystal resonator with a low oscillation frequency is used during power outages. By using it, it is possible to operate as a highly accurate and highly functional timer device during normal times, and it can also be backed up by a capacitor in the event of a power outage, realizing an inexpensive and highly reliable system.
以下図面を参照して、本発明の1実施例をあげ説明する
。An embodiment of the present invention will be described below with reference to the drawings.
図面において、1は、発振周波数が高く(4,9430
4石)、かつ、温度特性も優れた高精度水晶振動子X+
’r振動子とする第1の発振器であり、その発振出力は
第1の分周器2により所定のシステムクロック周波数ま
で分周された後、切換スイッチ3の接点A1を介して、
マイクロコンピュータを含むタイマ一手段4にシステム
クロック信号として印加されている。In the drawing, 1 has a high oscillation frequency (4,9430
4 stones) and high precision crystal oscillator X+ with excellent temperature characteristics
The oscillation output is divided by the first frequency divider 2 to a predetermined system clock frequency, and then transmitted through the contact A1 of the changeover switch 3.
The signal is applied as a system clock signal to a timer means 4 including a microcomputer.
また、前記第1の分周器2の出力の一部は第2の分周器
5により、所定のタイムベースクロック周波数まで分周
された後に、前記切換スイッチ3の接点人2を介して前
記タイマ一手段4にタイムベースクロック信号として印
加されている。Further, a part of the output of the first frequency divider 2 is divided by a second frequency divider 5 to a predetermined time base clock frequency, and then passed through the contact 2 of the changeover switch 3 to the The timer means 4 is applied as a time base clock signal.
6は、前記水晶振動子x1はど厳しい温度特性も必要な
く、低電力で発振可能な低周波数(32,768kHz
)の水晶振動子Xzf振動子とする第2の発振器であ
り、その発振出力は直接、前記切換スイッチ3の接点B
1を介してシステムクロック信号としてタイマ一手段4
に印加されている。6 is a low frequency (32,768 kHz) crystal resonator x1 that does not require severe temperature characteristics and can oscillate with low power.
), and its oscillation output is directly connected to contact B of the changeover switch 3.
A timer means 4 as a system clock signal via 1
is applied to.
また、前記第2の発振器6の出力の一部は第3の分周器
7によジ前記所定のタイムベースクロック信号周波数ま
で分周された後に、前記切換スイッチ3の接点B2i介
して前記タイマ一手段4にタイムベースクロック信号と
して印加されている。Further, a part of the output of the second oscillator 6 is divided by the third frequency divider 7 to the predetermined time base clock signal frequency, and then transmitted to the timer via the contact B2i of the changeover switch 3. One means 4 is applied as a time base clock signal.
8は通常動作時の電源回路であり、ダイオードD+’(
i=介して前記第2の発掘器6.第3の分周器7゜タイ
マ一手段4および停電検知回路9に電源供給するととも
に、ダイオードD2ヲ介して第1の発振器1.第1の分
周器2.第2の分周器5に電源供5べ一部
給をおこなっている。8 is a power supply circuit during normal operation, and the diode D+' (
i=through said second excavator 6. The third frequency divider 7° supplies power to the timer means 4 and the power failure detection circuit 9, and also supplies power to the first oscillator 1 through the diode D2. First frequency divider 2. A power supply 5 is supplied to the second frequency divider 5.
また、Cは前記ダイオードのアノード側と接地間に挿入
されたバックアップ電源用の蓄電器である。Further, C is a capacitor for backup power supply inserted between the anode side of the diode and ground.
以上の構成において、通常時(通電時)には停電検知回
路9は動作せず、切換スイッチ3の可動接片はそれぞれ
接点A1. 人2に接続し、タイマ一手段4は第1の
発振器1の出力により動作される〇
一方、停電時には、停電検知回路9が動作し、切換スイ
ッチ3の可動接片をそれぞれ接点B1゜B2に切換え、
タイマ一手段4は第2の発振器6の出力により動作され
るよう構成されている。また、前記停電検知回路9の停
電時の出力の一部はタイマ一手段6にも印加され時計動
作等の必要最小限の動作のみ可能に構成し、不必要な電
力消費を阻止している。また、この停電時には、蓄電器
Cの出力により第2の発振器6.第3の分周器7゜タイ
マ一手段4.停電検出回路9は動作される。In the above configuration, under normal conditions (when energized), the power failure detection circuit 9 does not operate, and the movable contacts of the changeover switch 3 are connected to contacts A1, . The timer means 4 is operated by the output of the first oscillator 1. On the other hand, in the event of a power outage, the power outage detection circuit 9 is activated and the movable contacts of the changeover switch 3 are connected to contacts B1 and B2. Switch to
The timer means 4 is configured to be operated by the output of the second oscillator 6. Further, a part of the output of the power failure detection circuit 9 at the time of power failure is also applied to the timer means 6, so that only the minimum necessary operation such as clock operation is possible, thereby preventing unnecessary power consumption. Also, during this power outage, the output of the capacitor C causes the second oscillator 6. Third frequency divider 7° timer means 4. The power failure detection circuit 9 is activated.
以上のように本発明によれば、非常時である停6ベー7
′
電時には、低消費電力の低周波数の発振器の出力に切換
え駆動されるよう構成されているため、停電時のバック
アップ電源としては小容量のもので良く、例えば、二重
積層型コンデンサ等により構成できるものである。As described above, according to the present invention, the emergency
´ During power outage, the power supply is configured to be switched to the output of a low-frequency oscillator with low power consumption, so a small-capacity backup power supply in the event of a power outage is sufficient, such as a double-layered capacitor, etc. It is possible.
図面は本発明の1実施例におけるタイマー装置のブロッ
ク図である。
1.6・・・・・・発振器、2,5.7・・・・・・分
周器、3・・・・・・切換スイッチ、4・・・・・・タ
イマ一手段、8・・・・・・電源、9・・・・・・停電
検知回路、xl、x2・・・・・・水晶振動子、C・・
・・・・蓄電器、Dl、B2・・・・・・ダイオード。The drawing is a block diagram of a timer device in one embodiment of the present invention. 1.6... Oscillator, 2, 5.7... Frequency divider, 3... Changeover switch, 4... Timer means, 8... ...Power supply, 9...Power failure detection circuit, xl, x2...Crystal oscillator, C...
...Condenser, Dl, B2...Diode.
Claims (1)
分周して、所定周波数のシステムクロック信号とタイム
ベースクロック信号を作成する第1のクロック信号発生
手段と、蛯第 の水晶振動子全振動子とし、前記第1の
発振器より低周波数で消費電力の小なる第2の発振器の
出力よりシステムクロック信号とタイムベースクロック
信号とを作成する第2のクロック信号発生手段と、停電
時前記第2のクロック信号発生手段の電源となる充電可
能な蓄電器と、停電時に前記第1のクロック信号発生手
段の前記クロック信号に代え前記第2のクロック信号発
生手段からのクロック信号をタイマ一手段に切換え印加
する切換スイッチとを有するタイマー装置。a first clock signal generation means for dividing the output of a first oscillator using a first crystal resonator to generate a system clock signal and a time base clock signal of a predetermined frequency; a second clock signal generating means that generates a system clock signal and a time base clock signal from the output of a second oscillator which has a lower frequency and lower power consumption than the first oscillator; a rechargeable capacitor that serves as a power source for the second clock signal generating means, and a timer that uses a clock signal from the second clock signal generating means in place of the clock signal of the first clock signal generating means in the event of a power outage. A timer device having a changeover switch for selectively applying voltage to the means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21289081A JPS58113889A (en) | 1981-12-28 | 1981-12-28 | Timer device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21289081A JPS58113889A (en) | 1981-12-28 | 1981-12-28 | Timer device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58113889A true JPS58113889A (en) | 1983-07-06 |
JPS6220511B2 JPS6220511B2 (en) | 1987-05-07 |
Family
ID=16629953
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21289081A Granted JPS58113889A (en) | 1981-12-28 | 1981-12-28 | Timer device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58113889A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS643590A (en) * | 1987-06-25 | 1989-01-09 | Sony Corp | Time signal generator |
EP0366495A2 (en) * | 1988-10-28 | 1990-05-02 | Omron Corporation | Numerical value setting device |
JPH0376418A (en) * | 1989-08-18 | 1991-04-02 | Furuno Electric Co Ltd | Rtc circuit |
EP0436488A2 (en) * | 1990-01-05 | 1991-07-10 | Pioneer Electronic Corporation | Sleep timer for audio/visual apparatus and method of sleep timer operation |
US6069850A (en) * | 1998-03-18 | 2000-05-30 | International Business Machines Corporation | Method and apparatus for driving a battery-backed up clock while a system is powered-down |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0736724U (en) * | 1993-12-22 | 1995-07-11 | 酒井 年枝 | Umbrella storage bag |
-
1981
- 1981-12-28 JP JP21289081A patent/JPS58113889A/en active Granted
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS643590A (en) * | 1987-06-25 | 1989-01-09 | Sony Corp | Time signal generator |
EP0366495A2 (en) * | 1988-10-28 | 1990-05-02 | Omron Corporation | Numerical value setting device |
JPH0376418A (en) * | 1989-08-18 | 1991-04-02 | Furuno Electric Co Ltd | Rtc circuit |
EP0436488A2 (en) * | 1990-01-05 | 1991-07-10 | Pioneer Electronic Corporation | Sleep timer for audio/visual apparatus and method of sleep timer operation |
US6069850A (en) * | 1998-03-18 | 2000-05-30 | International Business Machines Corporation | Method and apparatus for driving a battery-backed up clock while a system is powered-down |
Also Published As
Publication number | Publication date |
---|---|
JPS6220511B2 (en) | 1987-05-07 |
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