KR19990046870A - Heater block for wire bonding for V, C, A package manufacture - Google Patents
Heater block for wire bonding for V, C, A package manufacture Download PDFInfo
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- KR19990046870A KR19990046870A KR1019970065025A KR19970065025A KR19990046870A KR 19990046870 A KR19990046870 A KR 19990046870A KR 1019970065025 A KR1019970065025 A KR 1019970065025A KR 19970065025 A KR19970065025 A KR 19970065025A KR 19990046870 A KR19990046870 A KR 19990046870A
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- die pad
- chip
- heater block
- package
- wire bonding
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000004065 semiconductor Substances 0.000 description 4
- 238000000465 moulding Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000009966 trimming Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000009740 moulding (composite fabrication) Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004148 unit process Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/787—Means for aligning
- H01L2224/78743—Suction holding means
- H01L2224/78744—Suction holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Abstract
본 발명은 다이패드보다 칩이 더 큰 사이즈를 갖는 브이·씨·에이 패키지 제조를 위한 와이어 본딩 공정에서, 1차 와이어 본딩인 볼 본딩시 칩의 바운싱(bouncing)을 최소화 할 수 있는 새로운 구조의 히터블록을 제공하기 위한 것이다.The present invention provides a heater having a new structure that can minimize bouncing of chips during ball bonding, which is a primary wire bonding, in a wire bonding process for manufacturing a V-C package having a larger chip size than a die pad. To provide a block.
이를 위해, 본 발명은 다이패드(1a)에 칩(2)이 본딩된 리드프레임(3a)을 진공압으로 흡입하여 상기 칩의 본딩패드(4)와 인너리드(5)를 와이어 본딩시 상기 칩이 바운싱되지 않도록 하는데 사용되는 히터블록(6)에 있어서; 상기 히터블록(6)의 면상에 인너리드(5) 및 이와 동일 평면을 이루는 다이패드(1a)가 위치하는 안착면(7)이 요입 형성되고, 상기 안착면(7) 상에는 상기 다이패드(1a)에 접착된 다이패드(1a)보다 큰 사이즈를 갖는 라지 칩(2) 저면을 지지하는 지지돌기(8a)가 형성되며, 이와 더불어 상기 지지돌기(8a) 내부에는 진공라인에 연결되어 상기 칩(2)을 흡착하도록 진공압이 유기되는 진공홀(9a)이 형성됨을 특징으로 하는 브이·씨·에이 패키지 제조를 위한 와이어 본딩용 히터블록이 제공된다.To this end, the present invention sucks the lead frame 3a on which the chip 2 is bonded to the die pad 1a by vacuum pressure, and wires the bonding pad 4 and the inner lead 5 of the chip to wire bonding. In the heater block 6 used to prevent this from bouncing; A seating surface 7 on which the inner lead 5 and the die pad 1a constituting the same plane is located is formed on the surface of the heater block 6, and the die pad 1a is formed on the seating surface 7. A support protrusion 8a for supporting the bottom surface of the large chip 2 having a size larger than that of the die pad 1a bonded to the die pad 1a is formed, and the support protrusion 8a is connected to a vacuum line in the support protrusion 8a. Provided is a heater block for wire bonding for manufacturing a V-C package, wherein a vacuum hole 9a is formed in which vacuum pressure is induced to adsorb 2).
Description
본 발명은 브이·씨·에이 패키지(VCA Package ; Variable Chip-size Applicable Package ; 이하, "브이·씨·에이 패키지"라고 한다) 제조를 위한 와이어 본딩용 히터블록에 관한 것으로서, 더욱 상세하게는 다이패드보다 칩이 더 큰 사이즈를 갖는 브이·씨·에이 패키지의 제조를 위한 단위 공정인 와이어 본딩 공정에 알맞은 새로운 구조의 히터블록을 제공하기 위한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heater block for wire bonding for manufacturing a VCA Package (VCA Package; hereinafter referred to as a "V-C-A package"). The present invention provides a heater block having a new structure suitable for a wire bonding process, which is a unit process for manufacturing a VC package having a chip having a larger size than a pad.
일반적인 반도체소자 패키징 공정은 다음과 같은 순서로 수행된다.A general semiconductor device packaging process is performed in the following order.
먼저, 웨이퍼에 집적회로를 형성하는 FAB공정(Fabrication Process)을 완료한 후, 웨이퍼 상에 만들어진 각 칩을 서로 분리시키는 다이싱(Dicing), 분리된 각 칩을 리드프레임(Lead Frame)의 다이패드(die pad)에 안착시키는 칩 본딩(Chip Bonding), 칩 위의 본딩 패드(Bonding pad)와 리드프레임의 인너리드(Inner Lead portion)를 전기적으로 접속시키는 와이어 본딩(Wire Bonding)을 순차적으로 수행한다.First, after completing the FAB process (Fabrication Process) to form an integrated circuit on the wafer, and then dicing (dicing) to separate each chip made on the wafer from each other, the die pad of the lead frame (Lead Frame) Chip bonding to be seated on a die pad, and wire bonding to electrically connect a bonding pad on the chip and an inner lead portion of the lead frame are sequentially performed. .
그 후, 칩 및 본딩된 와이어를 몰딩부재로 봉지하여 보호하기 위한 몰딩(Molding)을 수행하게 된다.Thereafter, molding to seal and protect the chip and the bonded wire with the molding member is performed.
또한, 몰딩 공정을 수행한 후에는 리드프레임의 타이 바(Tie Bar) 및 댐 바(Dam Bar)를 자르는 트리밍(Triming) 및, 아웃터리드(Outer Lead)를 소정의 형상으로 성형하는 포밍(Forming)을 차례로 수행하게 된다.In addition, after performing the molding process, trimming to cut tie bars and dam bars of the lead frame, and forming the outer lead to a predetermined shape. In turn.
트리밍 및 포밍후에는 최종적으로 솔더링(Soldering)을 실시하므로써 반도체 패키지를 얻을 수 있게 된다.After trimming and forming, soldering is finally performed to obtain a semiconductor package.
한편, 도 1은 상기한 바와 같은 과정을 거쳐 만들어지는 반도체 패키지의 제조 공정중 와이어 본딩 공정을 나타낸 것으로서, 다운-셋(down-set)된 다이패드(1)가 히터블록(6a)에 안착되어 진공홀(9)을 통해 유기되는 진공압에 의해 고정된 상태에서, 다이패드(1) 상면에 접착된 칩(2)의 본딩패드(4)와 인너리드(5)를 와이어(10)를 이용하여 전기적으로 연결하는 와이어 본딩이 진행된다.Meanwhile, FIG. 1 illustrates a wire bonding process of a semiconductor package manufactured through the above process, and the down-set die pad 1 is seated on the heater block 6a. In the state of being fixed by the vacuum pressure induced through the vacuum hole 9, the bonding pad 4 and the inner lead 5 of the chip 2 adhered to the upper surface of the die pad 1 by using the wire 10 Wire bonding is then performed.
그러나, 이와 같은 종래의 히터블록(6a)은 다이패드(1)가 다운-셋된 타입의 리드프레임(3)을 이용하여 패키징하는 반도체 패키지의 제조 작업에는 적합하나, 도 2에 나타낸 브이·씨·에이 패키지용 리드프레임(3)을 이용한 패키징 작업에는 적용시킬 수 없게 된다.However, such a conventional heater block 6a is suitable for the manufacturing operation of the semiconductor package packaged using the lead frame 3 of the type in which the die pad 1 is down-set. The packaging operation using the lead frame 3 for this package cannot be applied.
이 때, 브이·씨·에이 패키지는 리드프레임의 인너리드 및 다이패드가 동일 평면상에 위치하는 구조의 패키지를 일컫는 용어이며, 이는 상기 인너리드(5) 및 다이패드(1)가 동일 평면상에 위치하는 구조의 리드프레임(3)을 사용하여 패키징함에 따라 얻어지게 된다.In this case, the V-C package refers to a package having a structure in which the inner lead and the die pad of the lead frame are located on the same plane, which means that the inner lead 5 and the die pad 1 are coplanar. It is obtained by packaging using a lead frame 3 having a structure located at.
즉, 브이·씨·에이 패키지용 리드프레임(3)을 종래의 히터블록(6a)에 적용시킬 경우에는 도 3에 나타낸 바와 같이, 다이패드(1)와 인너리드(5)가 동일 평면 상에 위치하므로 인해 다이패드(1)가 히터블록(6a)에 흡착되지 못하게 된다.That is, when the lead frame 3 for the V-C package is applied to the conventional heater block 6a, as shown in FIG. 3, the die pad 1 and the inner lead 5 are on the same plane. Due to the position, the die pad 1 cannot be adsorbed to the heater block 6a.
따라서, 종래에는 브이·씨·에이 패키지용 리드프레임(3)의 구조에 알맞은 별도의 히터블록이 마련되어야 하는 문제점이 있었다.Therefore, conventionally, there is a problem in that a separate heater block suitable for the structure of the lead frame 3 for V-C package is required.
본 발명은 상기한 제반 문제점을 해결하기 위한 것으로서, 다이패드보다 칩이 더 큰 사이즈를 갖는 브이·씨·에이 패키지 제조를 위한 와이어 본딩 공정에서, 볼 본딩시 칩의 바운싱을 최소화 할 수 있는 새로운 구조의 히터블록을 제공하는데 그 목적이 있다.The present invention is to solve the above-mentioned problems, a new structure that can minimize the bouncing of the chip during ball bonding in the wire bonding process for manufacturing a V-C package having a larger chip size than the die pad The purpose is to provide a heater block.
도 1은 종래의 히터블록에 칩 본딩된 리드프레임이 로딩되어 와이어 본딩된 상태를 나타낸 것으로, 다이패드가 다운-셋된 일반적인 리드프레임이 로딩된 상태를 나타낸 종단면도1 is a view illustrating a state in which a chip bonded lead frame is loaded and wire bonded to a conventional heater block, and a longitudinal lead diagram in which a general lead frame in which a die pad is down-set is loaded is loaded.
도 2는 브이·씨·에이 패키지용 리드프레임을 나타낸 평면도Figure 2 is a plan view showing a lead frame for V-C package
도 3은 도 1의 히터블록에 도 2의 브이·씨·에이 패키지용 리드프레임이 적용될 수 없음을 보여주는 종단면도3 is a longitudinal sectional view showing that the lead frame for the V-C package of FIG. 2 cannot be applied to the heater block of FIG.
도 4는 본 발명의 히터블록의 일실시예를 나타낸 종단면도Figure 4 is a longitudinal sectional view showing an embodiment of the heater block of the present invention
도 5는 도 4의 A부 확대 평면도5 is an enlarged plan view of a portion A of FIG.
도 6은 도 4의 본 발명 히터블록에 칩 본딩된 브이·씨·에이 패키지용 리드프레임이 로딩되어 와이어 본딩되는 상태를 나타낸 종단면도FIG. 6 is a longitudinal cross-sectional view illustrating a state in which a lead frame for a V-C package chip bonded to the heater block of the present invention is loaded and wire-bonded. FIG.
도 7은 원형의 다이패드를 갖는 브이·씨·에이 패키지용 리드프레임을 나타낸 평면도7 is a plan view showing a lead frame for a V-C package having a circular die pad;
도 8은 도 7의 리드프레임에 적용되는 본 발명 히터블록의 다른 실시예를 나타낸 평면도8 is a plan view showing another embodiment of the heater block of the present invention applied to the lead frame of FIG.
도 9는 도 8의 Ⅰ-Ⅰ선을 나타낸 종단면도FIG. 9 is a longitudinal sectional view showing the line II of FIG. 8; FIG.
도면의 주요부분에 대한 부호의 설명Explanation of symbols for main parts of the drawings
1a,1b:다이패드 2:칩1a, 1b: Dippad 2: Chip
3a,3b:리드프레임 4:본딩패드3a, 3b: lead frame 4: bonding pad
5:인너리드 6:히터블록5: inner lead 6: heater block
7:안착면 8a,8b:지지돌기7: Seating surface 8a, 8b: Supporting protrusion
9a,9b:진공홀 10:와이어9a, 9b: vacuum hole 10: wire
상기한 목적을 달성하기 위해, 본 발명은 다이패드에 칩이 본딩된 리드프레임을 진공압으로 흡입하여 상기 칩의 본딩패드와 인너리드를 와이어 본딩시 칩이 바운싱되지 않도록 하는데 사용되는 히터블록에 있어서; 상기 히터블록의 면상에 인너리드 및 이와 동일 평면을 이루는 다이패드가 위치하는 안착면이 요입 형성되고, 상기 안착면 상에는 상기 다이패드에 접착된 다이패드보다 큰 사이즈의 칩 저면을 지지하는 지지돌기가 형성되며, 이와 더불어 상기 지지돌기 내부에는 진공라인에 연결되어 상기 칩을 흡착하도록 진공압이 유기되는 진공홀이 형성됨을 특징으로 하는 다이패드보다 큰 사이즈의 칩이 적용되는 브이·씨·에이 패키지 제조를 위한 와이어 본딩용 히터블록이 제공된다.In order to achieve the above object, the present invention is a heater block used to suck the lead frame bonded the chip on the die pad by vacuum pressure so that the chip is not bounced when the bonding pad and the inner lead of the chip wire bonding ; A seating surface on which an inner lead and a die pad forming the same plane are located is formed on the surface of the heater block, and a support protrusion for supporting a chip bottom having a size larger than that of the die pad adhered to the die pad is formed on the seating surface. In addition, the V, C, A package is applied to the chip of a larger size than the die pad, characterized in that a vacuum hole in which the vacuum pressure is induced to be connected to the vacuum line to suck the chip is formed in the support projections. Provided is a heater block for wire bonding.
이하, 본 발명의 실시예들을 도 4 내지 도 9를 참조하여 상세히 설명하면 다음과 같다.Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 4 to 9.
도 4는 본 발명의 히터블록의 일실시예를 나타낸 종단면도이고, 도 5는 도 4의 A부 확대 평면도이며, 도 6은 도 4의 본 발명 히터블록에 칩 본딩된 브이·씨·에이 패키지용 리드프레임이 로딩되어 와이어 본딩되는 상태를 나타낸 종단면도이다.Figure 4 is a longitudinal sectional view showing an embodiment of the heater block of the present invention, Figure 5 is an enlarged plan view of a portion A of Figure 4, Figure 6 is a V-C package bonded to the chip of the present invention heater block of Figure A longitudinal cross-sectional view showing a state in which a lead lead frame is loaded and wire bonded.
본 발명은 다이패드(1a)에 칩(2)이 본딩된 리드프레임(3a)을 진공압으로 흡입하여 상기 칩(2)의 본딩패드(4)와 인너리드(5)를 와이어 본딩시 다이패드(1a)가 유동하지 않도록 하는데 사용되는 히터블록(6)의 면상에 인너리드(5) 및 상기 인너리드(5)와 동일 평면을 이루는 다이패드(1a)가 위치하는 안착면(7)이 요입 형성되고, 상기 안착면(7) 상에는 상기 다이패드(1a)에 접착된 다이패드(1a)보다 큰 사이즈를 갖는 라지 칩(2) 저면을 지지하는 지지돌기(8a)가 형성되며, 이와 더불어 상기 지지돌기(8a) 내부에는 진공라인에 연결되어 상기 칩(2)을 흡착하도록 진공압이 유기되는 진공홀(9a)이 형성되어 구성된다.According to an embodiment of the present invention, the lead pad 3a on which the chip 2 is bonded to the die pad 1a is sucked under a vacuum pressure, so that the die pad at the time of wire bonding the bonding pad 4 and the inner lead 5 of the chip 2 to the die pad 1a. An inner lead 5 and a seating surface 7 on which a die pad 1a coplanar with the inner lead 5 are positioned on the surface of the heater block 6 used to prevent the flow of the 1a. The support protrusion 8a is formed on the seating surface 7 to support the bottom surface of the large chip 2 having a size larger than that of the die pad 1a adhered to the die pad 1a. A vacuum hole 9a is formed in the support protrusion 8a to be connected to a vacuum line to induce a vacuum pressure to suck the chip 2.
이 때, 상기 지지돌기(8a)는 브이·씨·에이 패키지용 리드프레임(3a)의 다이패드(1a)가 사각 형상일 경우, 상기 다이패드(1a)의 각 면 주위에 직사각형 형상을 이루도록 형성되며, 상기 지지돌기(8a) 내부에 형성되는 진공홀(9a) 또한 직사각형 형상을 이루게 된다.At this time, the support protrusion 8a is formed to have a rectangular shape around each surface of the die pad 1a when the die pad 1a of the V-C package lead frame 3a is square. The vacuum hole 9a formed in the support protrusion 8a also has a rectangular shape.
이와 같이 구성된 본 발명의 히터블록(6)을 이용하여 다이패드보다 큰 사이즈의 칩(2)이 적용되는 브이·씨·에이 패키지의 와이어 본딩 과정 및 작용은 다음과 같다.The wire bonding process and action of the VC-A package to which the chip 2 of a larger size than the die pad is applied using the heater block 6 of the present invention configured as described above are as follows.
브이·씨·에이 패키지 제조시, 브이·씨·에이 패키지용 리드프레임(3a)의 다이패드(1a)에 칩(2)을 접착시키는 칩 본딩이 완료되면, 상기 칩 본딩된 리드프레임(3a)을 도 4에 나타낸 히터블록(6)에 안착시키게 된다.When the chip bonding for bonding the chip 2 to the die pad 1a of the lead package 3a for the V-C package is completed, the chip-bonded lead frame 3a is completed. To be seated on the heater block 6 shown in FIG.
이 때, 상기 리드프레임(3a)에 본딩된 칩(2)은 다이패드(1a) 보다 큰 면적을 갖는 라지 칩(2)이며, 본 발명의 히터블럭은 이와 같은 라지 칩(2) 타입에 맞게 진공홀(9a)이 형성된 지지돌기(8a)가 다이패드(1a) 안착부 외측에 위치하도록 형성된다.At this time, the chip 2 bonded to the lead frame 3a is a large chip 2 having a larger area than the die pad 1a, and the heater block of the present invention is adapted to such a large chip 2 type. The support protrusion 8a in which the vacuum hole 9a is formed is formed outside the seating part of the die pad 1a.
따라서, 리드프레임(3a)의 다이패드(1a)는 지지돌기(8a) 내측에 위치하게 되며, 지지돌기(8a)는 도 6에 나타낸 바와 같이, 칩(2)의 저면을 떠받치게 된다.Therefore, the die pad 1a of the lead frame 3a is positioned inside the support protrusion 8a, and the support protrusion 8a supports the bottom surface of the chip 2, as shown in FIG.
그리고, 이와 같이 칩(2)이 지지돌기(8a) 상면에 안착된 상태에서, 지지돌기(8a) 내부에 형성된 진공홀(9a)을 통해 진공압이 유기되면 칩(2)은 지지돌기(8a) 상면에 흡착되어 고정된다.In the state where the chip 2 is seated on the upper surface of the support protrusion 8a as described above, when the vacuum pressure is induced through the vacuum hole 9a formed inside the support protrusion 8a, the chip 2 is supported by the support protrusion 8a. ) It is adsorbed on the upper surface and fixed.
즉, 다이패드(1a) 주위의 진공홀(9a)을 통해 진공압이 유기됨에 따라, 라지 칩(2)의 가장자리 네 부분이 흡착되며, 이에 따라 와이어 본딩시 칩(2)의 바운싱(bouncing)을 최소화하여 안정된 볼 본딩을 행할 수 있게 된다.That is, as the vacuum pressure is induced through the vacuum hole 9a around the die pad 1a, four edges of the large chip 2 are adsorbed, thereby bouncing the chip 2 during wire bonding. By minimizing this, stable ball bonding can be performed.
이에 따라, 와이어 본딩 공정의 볼본딩 불량을 감소시켜 브이·씨·에이 패키지의 신뢰성을 향상시킬 수 있게 된다.Thereby, the ball bonding defect of a wire bonding process can be reduced and the reliability of a V-C package can be improved.
한편, 도 7은 원형의 다이패드를 갖는 브이·씨·에이 패키지용 리드프레임을 나타낸 평면도이고, 도 8은 도 7의 리드프레임에 적용되는 본 발명의 히터블록의 다른 실시예를 나타낸 평면도이며, 도 9는 도 8의 Ⅰ-Ⅰ선을 나타낸 종단면도로서, 다이패드(1b)가 원형인 브이·씨·에이 패키지용 리드프레임(3b)의 경우에는 히터블록(6)의 다이패드(1b)가 안착되는 면이 원형이 되도록 지지돌기(8b)를 호형(弧形)으로 형성하고, 상기 지지돌기(8b) 내부에 형성되는 진공홀(9b) 또한 호형이 되도록 하여 다이패드 형상과 조화를 이루도록 하는 것이 더욱 바람직하다.On the other hand, Figure 7 is a plan view showing a lead frame for V-C package having a circular die pad, Figure 8 is a plan view showing another embodiment of the heater block of the present invention applied to the lead frame of Figure 7, FIG. 9 is a longitudinal sectional view taken along the line I-I of FIG. 8, in the case of the lead frame 3b for the VC-A package in which the die pad 1b is circular, the die pad 1b of the heater block 6; The support protrusion 8b is formed in an arc shape so that the surface on which the seat is seated is circular, and the vacuum hole 9b formed inside the support protrusion 8b also becomes an arc shape so as to be in harmony with the die pad shape. More preferably.
상기 원형의 다이패드(1b)를 갖는 브이·씨·에이 패키지용 리드프레임(3b)의 경우에도 칩 본딩이 완료된 브이·씨·에이 패키지용 리드프레임(3b)을 히터블록(6)에 안착시켜 와이어 본딩하는 과정 및 작용은 전술한 실시예에서 설명한 과정과 동일하므로 설명을 생략한다.In the case of the V-C package lead frame 3b having the circular die pad 1b, the V-C package lead frame 3b on which the chip bonding is completed is mounted on the heater block 6, Process and action of wire bonding is the same as the process described in the above embodiment, and thus description thereof is omitted.
이상에서와 같이, 본 발명은 다이패드(1a)보다 칩이 더 큰 사이즈를 갖는 브이·씨·에이 패키지 제조를 위한 와이어 본딩 공정에서, 1차 와이어 본딩인 볼 본딩시 칩의 바운싱(bouncing)을 최소화 할 수 있는 새로운 구조의 히터블록(6)이 제공된다.As described above, in the wire bonding process for manufacturing a V-C package having a larger chip size than the die pad 1a, the bouncing of the chip during the ball bonding as the primary wire bonding is performed. A heater block 6 having a new structure that can be minimized is provided.
즉, 칩(2)이 직접 진공홀(9a),(9b)을 통해 유지되는 직접 진공압에 의해 지지돌기(8) 상면에 흡착되어 고정되므로써, 브이·씨·에이 패키지 제조를 위한 와이어 본딩 공정의 본딩 불량을 감소시켜 브이·씨·에이 패키지의 신뢰성을 향상시킬 수 있게 된다.That is, since the chip 2 is adsorbed onto the upper surface of the support protrusion 8 by the direct vacuum pressure held through the vacuum holes 9a and 9b and fixed, the wire bonding process for manufacturing a V-C package. It is possible to improve the reliability of the V-C package by reducing bonding defects of the V-C package.
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KR1019970065025A KR100252906B1 (en) | 1997-12-01 | 1997-12-01 | Heater block for bonding wire in fabrication of variable chip-size applicable package |
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