KR19990043699A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

A second sacrificial layer is formed using a polyimide-based polymer on the actuator, and the second sacrificial layer is etched using a multi-level resist method. That is, after the silica layer is formed on the second sacrificial layer, a photoresist layer is formed on the silica layer. Thereafter, the photoresist layer is patterned to etch the silica layer. The second sacrificial layer is etched using the silica layer as an etch mask and the photoresist is removed and a mirror is formed on top of the resultant. Accordingly, even if the initial bending occurs in the actuator, the actuator can be sufficiently covered, and the second sacrificial layer can be sufficiently etched to improve the horizontal level of the mirror regardless of the bending of the actuator, thereby improving the sharpness of the screen. have.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing a thin film type optical path control apparatus using AMA (Actuated Mirror Array), and more particularly, to form a second sacrificial layer using a polyimide-based polymer and multiply the second sacrificial layer. The present invention relates to a method of manufacturing a thin film type optical path control apparatus capable of improving the horizontality of a mirror formed on an upper portion of a second sacrificial layer by patterning using a multi-level resist method.

Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. An image processing apparatus using an optical path control device or a spatial light modulator typically has a direct-view image display device and a projection-type image display according to a method of displaying optical energy on a screen. device).

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display apparatuses include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2%, requiring dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. The AMA reflects the light incident from the light source at each angle installed in the mirrors, and the reflected light is projected on the screen through an aperture such as a slit or pinhole to be imaged. The device can adjust the luminous flux to bear. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a bright and clear image.

Each actuator of the AMA generates a deformation in accordance with the electric field generated by the applied electric picture signal and the bias signal. As the actuator deforms, each of the mirrors mounted on top thereof is inclined. Therefore, the inclined mirrors reflect the light incident from the light source at a predetermined angle to form an image on the screen. As an actuator for driving the respective mirrors, piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ) or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used. It is also possible to configure the actuator as electrostrictive material such as PMN (Pb (Mg, Nb) O 3).

These AMA devices are largely divided into bulk type and thin film type. Bulk light path control devices are disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path control device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode therein into an active matrix in which a transistor is built, and then processing by using a sawing method and installing a mirror on the top. . However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the deformation layer is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in Korean Patent Application No. 96-64440 (name of the invention: a method of manufacturing a thin film type optical path control device) filed by the applicant of the Korean Patent Office on December 11, 1996.

Figure 1 shows a cross-sectional view of the thin film type optical path control device described in the preceding application.

Referring to FIG. 1, the thin film type optical path adjusting device includes an active matrix 1, an actuator 25, and a mirror 29. The active matrix 1 in which M x N (M, N is an integer) MOS transistors are formed and a drain pad 7 extending from the drain of the transistor is formed. It includes a protective layer 3 stacked on the upper portion and the etch stop layer 5 stacked on the protective layer (3).

The actuator 25 has one side in contact with a portion of the etch stop layer 5 in which the drain pad 7 is formed, and the other side of the membrane 13 and the membrane 13 are formed horizontally through the air gap 11. The lower electrode 15 stacked on the upper side, the strained layer 17 stacked on the upper portion of the lower electrode 15, the upper electrode 19 stacked on the strained layer 17, and one side of the strained layer 17. The lower electrode 15 in the via hole 21 formed vertically from the strained layer 17, the lower electrode 15, the membrane 13, the etch stop layer 5, and the protective layer 3 to the drain pad 7. ) And the drain pad 7 include a via contact 23 formed to be electrically connected to each other. The mirror 29 has one side bent at a right angle to contact the upper electrode 19 and the other side is formed horizontally. Preferably, the mirror 29 has the shape of the letter 'b'.

Hereinafter, the manufacturing method of the above-mentioned thin film type optical path control apparatus will be described. 2A to 2D are manufacturing process diagrams of the apparatus shown in FIG. 1.

Referring to FIG. 2A, a protective layer 3 is formed by using silicate glass PSG on top of an active matrix 1 having M × N MOS transistors (not shown) and having a drain pad 7 formed therein. Laminated. The protective layer 3 is formed to have a thickness of about 1.0 μm using a chemical vapor deposition (CVD) method. The protective layer 3 protects the active matrix 1 in which the transistor is embedded during the subsequent process.

An etch stop layer 5 made of nitride is stacked on the passivation layer 3. The etch stop layer 5 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 5 prevents the protective layer 3, the active matrix 1, and the like from being etched during the subsequent etching process. The first sacrificial layer 9 is stacked on the etch stop layer 5. The first sacrificial layer 9 is formed of phosphorous silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 1.0 to 3.0 µm using an atmospheric chemical vapor deposition (APCVD) method. In this case, since the first sacrificial layer 9 covers the upper portion of the active matrix 1 in which the transistor is embedded, the surface flatness is very poor. Accordingly, the surface of the first sacrificial layer 9 is planarized by using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the first sacrificial layer 9 in which the drain pad 7 is formed is etched to expose a portion of the etch stop layer 5 to form a position where the support portion of the actuator 25 is to be formed.

Referring to FIG. 2B, the membrane 13 is stacked on the exposed etch stop layer 5 and the first sacrificial layer 9 to a thickness of about 0.1 μm to about 1.0 μm. The membrane 13 is formed using a low pressure chemical vapor deposition (LPCVD) method. At this time, the membrane 13 is formed while varying the ratio of the reaction gas in the low pressure reaction vessel to control the stress in the membrane 13.

The lower electrode 15 made of a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta) is stacked on the membrane 13. The lower electrode 15 is formed to have a thickness of about 0.1 to 1.0 μm using a sputtering method. A first signal (image signal) is applied to the lower electrode 15 through a transistor built in the active matrix 1 from the outside.

On the lower electrode 15, a strain layer 17 made of a piezoelectric material such as PZT or PLZT is stacked. The strained layer 17 is formed to have a thickness of about 0.1 μm to about 1.0 μm, preferably about 0.4 μm using the sol-gel method, and then subjected to a phase change by heat treatment using a rapid heat treatment (RTA) method. In the strained layer 17, a second signal (bias signal) is applied to the upper electrode 19, and a first signal is applied to the lower electrode 15, according to a potential difference between the upper electrode 19 and the lower electrode 15. It is deformed by the generated electric field.

The upper electrode 19 is stacked on top of the strained layer 17. The upper electrode 19 is formed of a metal having excellent electrical conductivity such as aluminum or platinum so as to have a thickness of about 0.1 to 1.0 μm using a sputtering method. The second signal is applied to the upper electrode 19 through a common electrode line (not shown) from the outside.

Referring to FIG. 2C, after the upper electrode 19, the strained layer 17, and the lower electrode 15 are patterned to have a predetermined pixel shape, respectively, from one side of the strained layer 17 to the drain pad 7. The strain layer 17, the lower electrode 15, the membrane 13, the etch stop layer 5, and the protective layer 3 are sequentially etched to form a via hole vertically from the strain layer 17 to the drain pad 7. 21 is formed. Subsequently, a via contact 23 is formed in the via hole 21 so that the drain pad 7 and the lower electrode 15 are electrically connected to each other by a sputtering method of a metal such as tungsten, platinum, or titanium. Thus, the via contact 23 is formed vertically from the lower electrode 15 to the drain pad 7 in the via hole 21. Therefore, the first signal is applied from the outside to the lower electrode 15 through the transistor, the drain pad 7 and the via contact 23 embedded in the active matrix 1. Then, platinum-tantalum (Pt-Ta) is deposited on the bottom of the active matrix 1 using a sputtering method to form an ohmic contact (not shown). Subsequently, the actuator 25 is completed by etching the first sacrificial layer 9 with hydrogen fluoride (HF) vapor to form an air gap 11 at the position of the first sacrificial layer 9.

Referring to FIG. 2D, after forming the air gap 11 as described above, the second sacrificial layer 27 is formed on the entire surface of the resultant. The second sacrificial layer 27 is formed by using a spin coating method such as a polymer having good fluidity, and is formed to completely cover the actuator 25 while completely filling the air gap 11. Subsequently, the second sacrificial layer 27 is patterned to form a post in which the mirror 29 is formed on one side of the upper electrode 19. Thus, one side of the upper electrode 19 is exposed. Subsequently, aluminum (Al) or silver (Ag) having good reflectivity is formed on the upper portion of the second sacrificial layer 27 and the exposed upper electrode 19 on which the post is formed to a thickness of about 0.1 to 1.0 μm. It is deposited to form the mirror 29. Preferably, the mirror 29 has a '-' shape, one side is bent at a right angle to contact the upper electrode 19, the other side is formed horizontally with respect to the upper electrode 19. After the mirror 29 is formed as described above, the second sacrificial layer 27 is removed using an oxygen plasma (O ₂ plasma), and a rinsing and drying process is performed to perform the thin film type AMA as shown in FIG. 1. Complete the device.

In the above-described thin film type optical path adjusting device, when the first signal is applied to the lower electrode 15 and the second signal is applied to the upper electrode 19, the potential difference between the upper electrode 19 and the lower electrode 15 depends on the potential difference. Electric field is generated. The deformed layer 17 formed between the upper electrode 19 and the lower electrode 15 causes deformation, and the deformed layer 17 contracts in a direction perpendicular to the generated electric field. Accordingly, the actuator 25 including the deformation layer 17 is bent at a predetermined angle, and the mirror 29 mounted on the upper electrode 19 of the actuator 25 is attached to the bent upper electrode 19. This causes the axis to move and incline to reflect light incident from the light source. The light reflected by the mirror 29 is projected onto the screen through the slit to form an image.

However, in the above-described manufacturing method of the thin film type optical path control device, the first sacrificial layer is generated by the stress between the thin films constituting the actuator by about 7 to 8 ° in the actuator to form a mirror on the actuator. When is applied, a portion of the bent actuator is projected to the upper portion of the applied second sacrificial layer occurs a problem that the level of the mirror is lowered. This will be described with reference to the drawings.

3 is a cross-sectional view showing a state where the actuator is bent. Referring to FIG. 3, after completing the actuator 25, the first sacrificial layer 9 is etched using hydrogen fluoride vapor to form an air gap 11. The second sacrificial layer 27 is coated on the entire surface of the resultant polymer using a spin coating method. The second sacrificial layer 27 is then patterned to form a post of the mirror 29 to expose a portion of the upper electrode 19. A mirror 29 is formed by depositing and patterning a metal such as aluminum or silver on the exposed upper electrode 19 and the second sacrificial layer 27. However, in this case, the actuator 25 is bent due to the stress between the thin films constituting the actuator 25. When the second sacrificial layer 27 is applied to the curved actuator 25 as described above, it is difficult to completely wet it with the polymer, so that the actuator 25 protrudes above the second sacrificial layer 27. have. When the protrusion of the actuator 25 occurs, the horizontality of the mirror 29 formed on the upper portion is lowered, resulting in a problem that the light efficiency is lowered.

Accordingly, an object of the present invention is to form a second sacrificial layer using a polyimide-based polymer and to pattern the second sacrificial layer using a multi-level resist method, irrespective of the bending of the actuator. It is to provide a method for manufacturing a thin film-type optical path control device that can improve the horizontal degree of.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the applicant's prior application.

2A to 2D are manufacturing process diagrams of the apparatus shown in FIG. 1.

3 is a cross-sectional view showing a state where the actuator is bent.

4 is a plan view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is an enlarged perspective view of the apparatus shown in FIG. 4. FIG.

FIG. 6 is a cross-sectional view of the apparatus shown in FIG. 5 taken along line C-C '.

7A to 7G are manufacturing process diagrams of the apparatus shown in FIG. 6.

<Explanation of symbols for main parts of the drawings>

100: active matrix 130: first metal layer

135: first protective layer 140: second metal layer

145: second protective layer 150: etch stop layer

155: first sacrificial layer 160: air gap

165 support layer 170 lower electrode

175 strain layer 180 upper electrode

185: Beer Hall 190: Beer Contact

195: lower electrode connecting member 200: common electrode line

205: common electrode connecting member 210: actuator

215: second sacrificial layer 218: silica layer

220: Post 230: Mirror

In order to achieve the above object, the present invention provides a method comprising: providing an active matrix containing M x N (M, N is an integer) MOS transistor; Forming a first metal layer on the active matrix, the first metal layer including a drain pad extending from the drain of the transistor; After forming and patterning a first sacrificial layer on the active matrix, forming an actuator including a support layer, a lower electrode, a strained layer, and an upper electrode on the patterned first sacrificial layer; Removing the first sacrificial layer; Forming a second sacrificial layer on top of the actuator; Forming a silica layer using silica (SiO ₂ ) on the second sacrificial layer; Applying a photoresist on top of the silica layer and forming a pattern on the photoresist; After patterning the silica layer and the second sacrificial layer along the photoresist pattern to expose a portion of the upper electrode and removing the photoresist, a post and a mirror is formed on the exposed upper electrode, the silica layer and the second sacrificial layer. It provides a method for manufacturing a thin film type optical path control apparatus comprising the step of.

According to the present invention, a second sacrificial layer is formed on the actuator using a polyimide-based polymer, and the second sacrificial layer is etched using a multi-level resist method. That is, after the silica layer is formed on the second sacrificial layer, a photoresist layer is formed on the silica layer. Thereafter, the photoresist layer is patterned to etch the silica layer. After using the silica layer as an etching mask to etch the second sacrificial layer and removing the photoresist, a mirror is formed on top of the resultant product. Accordingly, by forming a second sacrificial layer using a polyimide-based polymer and patterning the second sacrificial layer using a multi-level resist method, even if initial bending occurs in the actuator, the actuator can be sufficiently covered. The second sacrificial layer may be sufficiently etched regardless of the curvature, thereby improving the horizontality of the mirror, thereby improving the sharpness of the screen.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

Figure 4 is a plan view of a thin film type optical path control apparatus according to the present invention, Figure 5 is an enlarged perspective view of the device shown in Figure 4, Figure 6 is a cross-sectional view taken along the line C-C 'of the device of FIG. It is shown.

4 to 6, the thin film type optical path adjusting device according to the present invention includes an active matrix 100, an actuator 210 formed on the active matrix 100, and a mirror 230 formed on the actuator 210. ).

The active matrix 100 includes an isolation layer 120 for dividing the active matrix 100 into an active region and a field region, and an M formed with a gate 115, a source 110, and a drain 105 in the active region. N (M, N is an integer) P-MOS transistors are included. In addition, the active matrix 100 is stacked on top of the MOS transistor and patterned to be connected to the source 110 and the drain 105, respectively, and the first metal layer 130 and the first stacked on the first metal layer 130. The protective layer 135, the second metal layer 140 stacked on the first protective layer 135, the second protective layer 145 stacked on the second metal layer 140, and the second protective layer ( And an etch stop layer 150 stacked on top of the 145. The first metal layer 130 includes a drain pad extending from the drain 105 of the MOS transistor, and the second metal layer 140 includes a titanium (Ti) layer and a titanium nitride (TiN) layer.

The actuator 210 has a support layer 165 and a support layer having one side contacting a portion where the drain pad of the first metal layer 130 is formed in the lower portion of the etch stop layer 150 and the other side being horizontally formed through the air gap 160. The lower electrode 170 stacked on the upper portion 165, the strained layer 175 stacked on the upper portion of the lower electrode 170, the upper electrode 180 stacked on the upper portion of the strained layer 175, and the strained layer ( The first metal layer 130 is formed from one side of the 175 through the strained layer 175, the lower electrode 170, the support layer 165, the etch stop layer 150, the second protective layer 145, and the first protective layer 135. The via contact 190 is formed so that the lower electrode 170 and the drain pad of the first metal layer 130 are connected to each other in the via hole 185 vertically formed to the drain pad of FIG. The support layer 165 functions as a membrane supporting the actuator of the thin film type optical path adjusting device described in the previous application. Preferably, the support layer 165 has a 'T' shape, and the lower electrode 170 is formed on the center portion of the support layer 165 in a quadrangular shape. The strained layer 175 has a rectangular shape with a smaller area than the lower electrode 170, and the upper electrode 180 has a rectangular shape with a smaller area than the strained layer 175.

In addition, referring to FIG. 5, the actuator 210 may be formed from the via contact 190 to the lower electrode 170 to connect the via contact 190 and the lower electrode 170. The common electrode line 200 is formed on one side of the support layer 165, and the common electrode connection member 205 connecting the upper electrode 180 and the common electrode line 200. A first signal (image signal) is applied to the lower electrode 170 through the transistor, the via contact 190, and the lower electrode connection member 195 embedded in the active matrix 100 from the outside. At the same time, when the second signal (bias signal) is applied to the upper electrode 180 from the outside through the common electrode line 200 and the common electrode connecting member 205, a deformation formed between the upper electrode 180 and the lower electrode 170. Layer 175 causes deformation.

The mirror 230 has a lower shape supported by a post 220 formed on one side of the upper electrode 180 and has a rectangular flat plate formed on both sides of the mirror 230.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

7A to 7G are manufacturing process diagrams of the apparatus shown in FIG. 6.

Referring to FIG. 7A, an active region 100, which is an n-type doped silicon (Si) wafer, is prepared, and then an active region is formed in the active matrix 100 using a conventional device isolation process, for example, silicon partial oxidation (LOCOS). And an isolation layer 120 for dividing the field region. Subsequently, a gate 115 made of a conductive material such as polysilicon doped with impurities is formed on the active region, and then p ⁺ source 110 and drain 105 are formed by an ion implantation process to thereby form M x N. (M and N are integers) P-MOS transistors are formed.

After the insulating film 125 made of oxide is formed on the P-MOS transistor, the openings exposing the upper portions of the source 110 and one side of the drain 105 are formed by a photolithography process. Subsequently, the first metal layer 130 is formed by depositing a metal such as titanium, titanium nitride, tungsten, or the like on the resulting product on which the openings are formed. The patterned first metal layer 130 includes a drain pad extending from the drain 105 of the P-MOS transistor to an anchor 182 that is a support of the actuator 210.

A first protective layer 135 is formed on the first metal layer 130 to protect the active matrix 100 having the P-MOS transistor. The first passivation layer 135 is formed to have a thickness of about 8000 GPa by using the silicate glass (PSG) chemical vapor deposition (CVD) method.

A second metal layer 140 formed of a titanium layer and a titanium nitride layer is formed on the first protective layer 135. In order to form the second metal layer 140, first, a titanium layer is formed by sputtering titanium (Ti) to a thickness of about 300 μm. Subsequently, titanium nitride is deposited on the titanium layer by using a physical vapor deposition (PVD) method to form a titanium nitride layer. Since the second metal layer 140 is incident not only to the mirror 230 incident from the light source but also to a portion other than the portion where the mirror 230 is formed, light leakage current flows into the active matrix 100 to prevent the device from malfunctioning. do. A portion of the second metal layer 140 formed on the drain pad of the first metal layer 130 is etched through the photolithography process in consideration of the position where the via contact 190 is to be formed in the subsequent process, and thus the opening 143. By forming a portion of the first protective layer 135 is exposed.

The second passivation layer 145 is formed on the exposed first passivation layer 135 and the second metal layer 140. The second passivation layer 145 is formed to have a thickness of about 2000 GPa using in-silicate glass (PSG). The second protective layer 145 prevents damage to the active matrix 100 and the results formed on the active matrix 100 during subsequent processing.

An etch stop layer 150 is formed on the second passivation layer 145. The etch stop layer 150 prevents the second passivation layer 145 and the like from being etched and damaged by the subsequent etching process. The etch stop layer 150 is formed by depositing nitride by low pressure chemical vapor deposition (LPCVD) to have a thickness of about 1000 to 2000 kPa.

The first sacrificial layer 155 is formed on the etch stop layer 150. The first sacrificial layer 155 serves to facilitate stacking of the thin films for forming the actuator 210, and is removed by hydrogen fluoride (HF) vapor after the stacking of the actuator 210 is completed. The first sacrificial layer 155 is formed of a silicate glass (PSG) to a thickness of about 2.0 ~ 3.0㎛ by the atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the first sacrificial layer 155 covers the top of the active matrix 100 in which the P-MOS transistor is embedded, the flatness of the surface thereof is very poor. Therefore, by polishing the surface of the first sacrificial layer 155 so that the first sacrificial layer 155 is about 1.1 μm thick by using a spin on glass (SOG) method or a chemical mechanical polishing (CMP) method. Planarize. Subsequently, the portion of the first sacrificial layer 155 adjacent to the portion (see FIG. 5) adjacent to the portion where the opening 143 of the second metal layer 140 is formed is etched to expose a part of the etch stop layer 150. An anchor 182 that is a support of 210 is formed.

Referring to FIG. 7B, a first layer 164 is formed on the exposed etch stop layer 150 and on the first sacrificial layer 155. The first layer 164 is formed to have a thickness of about 0.1 μm to 1.0 μm using a hard material such as nitride or metal. The first layer 164 is formed using low pressure chemical vapor deposition (LPCVD). In this case, the stress inside the first layer 164 is controlled by forming the first layer 164 while changing the ratio of the reactive gas by time in the reaction vessel of low pressure. The first layer 164 is later patterned into a support layer 165 having the shape of a 'T'.

After the first photoresist layer 167 is formed on the first layer 164 by using a spin coating method, the first photoresist layer 167 is patterned to form a first photoresist layer 164. A portion adjacent to the portion where the opening 143 of the second metal layer 140 is formed below is exposed in a quadrangular shape along a direction orthogonal to the direction in which the drain pad of the first metal layer 130 is formed. After forming the lower electrode layer 169 on the exposed first layer 164 and the first photoresist 167 by using a sputtering method or a chemical vapor deposition method, a common electrode line 200 is subsequently formed. The lower electrode layer 169 is patterned in consideration of the position to be formed so that the lower electrode layer 169 having a rectangular shape is formed on the exposed first layer 164. Accordingly, the lower electrode layer 169 is formed only at the center of the first layer 164 and later patterned into the lower electrode 170. The lower electrode layer 169 is formed to have a thickness of about 0.1 μm to 1.0 μm using a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta) having electrical conductivity.

The second layer 174 is formed on the lower electrode layer 169 and the first photoresist 167. The second layer 174 may have a thickness of about 0.1 to 1.0 μm, preferably about 0.4 μm, using a sol-gel method, sputtering method, or chemical vapor deposition (CVD) method. Form. The second layer 174 is formed using ZrO ₂ , PZT, or PLZT, which is a piezoelectric material. Subsequently, the piezoelectric material constituting the second layer 174 is subjected to heat treatment using a rapid heat treatment (RTA) method to phase change. Second layer 174 is later patterned into strained layer 175.

An upper electrode layer 179 is formed on the second layer 174. The upper electrode layer 179 is formed using aluminum (Al), platinum (Pt), or tantalum (Ta), which is a metal having electrical conductivity. The upper electrode layer 179 is formed to have a thickness of about 0.1 to 1.0 μm using a sputtering method. The upper electrode layer 179 is later patterned with the upper electrode 180 to which a second signal (bias signal) is applied.

Referring to FIG. 7C, after the second photoresist (not shown) is coated on the upper electrode layer 179 by a spin coating method, the upper electrode layer 179 is formed in a rectangular shape using the second photoresist as an etching mask. Patterning is performed on the upper electrode 180 having a shape. As a result, the upper electrode 180 is formed on the center of the first layer 164.

The second layer 174 is patterned into a strained layer 175 having a rectangular shape having a larger area than the upper electrode 180 using the same method as the patterning of the upper electrode layer 179. At this time, the strained layer 175 has a smaller area than the lower electrode layer 169 already formed. The lower electrode layer 169 is also patterned in the same manner to be patterned into the lower electrode 170 having a larger area than the strained layer 175, and the first photoresist 167 is also removed.

The first layer 164 is also patterned into the support layer 165 in the same manner as above. Unlike the shape of the lower electrode 170, the support layer 165 has a 'T' shape, and the lower electrode 170 is formed on the center portion of the support layer 165. Next, the common electrode line 200 is formed on one side of the support layer 165. That is, after the third photoresist (not shown) is applied on the support layer 165 by spin coating, the third photoresist is patterned to expose one side of the support layer 165, and then platinum, tantalum and platinum-tantalum are exposed. , The aluminum or the silver is used to form the common electrode line 200. The common electrode line 200 is formed to have a thickness of about 0.5 to 2.0 μm using a sputtering method or a chemical vapor deposition method. In this case, the common electrode line 200 is spaced apart from the lower electrode 170 by a predetermined distance. Subsequently, the common electrode connecting member 205 connecting the common electrode line 200 and the upper electrode 180 is formed using the same material and the same method as the common electrode line 200. Therefore, the common electrode connecting member 205 is spaced apart from the lower electrode 170 by a predetermined distance and does not contact the lower electrode 170.

In addition, when patterning the third photoresist, a portion of the support layer 165 is exposed from the top of the portion where the opening 143 of the second metal layer 140 is formed to the portion where the lower electrode 170 is formed. Subsequently, the etch stop layer 150, the second passivation layer 145, and the first passivation layer 135 are etched from the support layer 165 to form the via hole 185 vertically up to the drain pad of the first metal layer 130. Afterwards, a via contact 190 is formed from the drain pad to the support layer 165 in the via hole 185. At the same time, the lower electrode connecting member 195 is formed to be connected to the via contact 190 from the lower electrode 170 to the via hole 185 (see FIG. 5). Therefore, the via contact 190, the lower electrode connecting member 195 and the lower electrode 170 are connected to each other. The via contact 190 and the lower electrode connecting member 195 are formed using a sputtering method or a chemical vapor deposition method. The via contact 190 and the lower electrode connecting member 195 are formed using platinum, tantalum or platinum-tantalum, which are metals having electrical conductivity. In this case, the lower electrode connecting member 195 is formed to have a thickness of about 0.5 to 1.0 μm. Accordingly, the first signal is applied to the lower electrode 170 through the transistor embedded in the active matrix 100, the drain pad of the first metal layer 130, the via contact 190, and the lower electrode connecting member 195 from the outside. do. Subsequently, the third photoresist and the first sacrificial layer 155 are removed to form an actuator 210 including the upper electrode 180, the strain layer 175, the lower electrode 170, and the support layer 165.

Referring to FIG. 7D, as described above, the first sacrificial layer 155 is removed to form the second sacrificial layer 215 using a polyimide polymer on the actuator 210 having the air gap 160 formed thereon. do. The second sacrificial layer 215 is formed using a spin coating method to completely cover the upper electrode 180.

The silica layer 218 is formed on the second sacrificial layer 215. The silica layer 218 is formed of silica (SiO ₂ ) using PECVD (Plasma Enhanced CVD). The silica layer 218 may then form aluminum oxide (Al ₂ O ₃ ) in the step of depositing the mirror 230 to not only improve adhesion between the second sacrificial layer 215 and the fourth photoresist 225. It serves as an etch mask during the transfer of the polyimide-based polymer. Subsequently, the fourth photoresist 225 is coated on the second sacrificial layer 215 by a spin coating method. In the present invention, since the silica layer 218 and the fourth photoresist 225 are sufficiently coated on the second sacrificial layer 215 as described above, even if the actuator 210 is bent, it can be overcome.

Referring to FIG. 7E, after patterning the fourth photoresist 225 in consideration of the position where the post 220 of the mirror 230 is to be formed, the following scheme 1 is used by using the fourth photoresist 225 as a mask. Accordingly, the silica layer 218 is patterned using a gas tetrafluoride (CF ₄ ) based gas plasma.

CF ₄ + SiO ₂ → CO ₂ + SiF ₄

The patterned silica layer 218 has the same pattern as the fourth photoresist 225.

Referring to FIG. 7F, one side of the upper electrode 180 is exposed by patterning the second sacrificial layer 215 using an oxygen plasma (O ₂ Plasma) using the silica layer 218 as an etching mask. At this time, the fourth photoresist 225 formed on the silica layer 218 is removed together.

Referring to FIG. 7G, the post 220 and the mirror 230 may be simultaneously formed using aluminum, platinum, or silver, which is a reflective metal on one side of the exposed upper electrode 180 and on the silica layer 218. Form. Post 220 and mirror 230 are formed using a sputtering method or a chemical vapor deposition method. Preferably, the mirror 230 reflecting light incident from a light source (not shown) has a thickness of about 0.1 to 1.0 μm. Subsequently, after the mirror 230 is patterned to have a rectangular shape, the silica layer 218 and the second sacrificial layer 215 are ashed and removed, washed and dried to complete the thin film type optical path control device.

In the above-described thin film type optical path control apparatus according to the present invention, the first signal transmitted from the outside is lowered through the MOS transistor embedded in the active matrix 100, the drain pad of the first metal layer 130, and the via contact 190. Is applied to the electrode 170. At the same time, a second signal is applied from the outside to the upper electrode 180 to generate an electric field according to the potential difference between the upper electrode 180 and the lower electrode 170. Due to this electric field, the deformation layer 175 formed between the upper electrode 180 and the lower electrode 170 causes deformation. The strained layer 175 contracts in a direction orthogonal to the electric field, whereby the actuator 210 is bent at a predetermined angle. Since the mirror 230 is formed on the actuator 210, the mirror 230 is tilted at the same angle as the actuator 210. Therefore, the mirror 230 reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit and is projected onto the screen to form an image.

As described above, according to the present invention, a second sacrificial layer is formed on the actuator using a polyimide-based polymer and the second sacrificial layer is etched using the multi-level resist method. That is, after the silica layer is formed on the second sacrificial layer, a photoresist layer is formed on the silica layer. Thereafter, the photoresist layer is patterned to etch the silica layer. After using the silica layer as an etching mask to etch the second sacrificial layer and removing the photoresist, a mirror is formed on top of the resultant product. Accordingly, by forming a second sacrificial layer using a polyimide-based polymer and patterning the second sacrificial layer using a multi-level resist method, even if initial bending occurs in the actuator, the actuator can be sufficiently covered. The second sacrificial layer may be sufficiently etched regardless of the curvature, thereby improving the horizontality of the mirror, thereby improving the sharpness of the screen.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (5)

Providing an active matrix with M × N (M, N is an integer) embedded therein; Forming a first metal layer on the active matrix, the first metal layer including a drain pad extending from the drain of the transistor; After forming and patterning a first sacrificial layer on the active matrix, forming an actuator including a support layer, a lower electrode, a strain layer, and an upper electrode on the patterned first sacrificial layer; Removing the first sacrificial layer; Forming a second sacrificial layer on top of the actuator; Forming a silica layer using silica (SiO ₂ ) on the second sacrificial layer; Applying a photoresist on top of the silica layer and forming a pattern on the photoresist; And Patterning the silica layer and the second sacrificial layer along the photoresist pattern to expose a portion of the upper electrode and removing the photoresist, and then over the exposed upper electrode, the silica layer and the second sacrificial layer. Forming a post and a mirror in the manufacturing method of the thin film type optical path control device characterized in that it comprises. The method of claim 1, wherein the forming of the second sacrificial layer is performed using a polyimide-based polymer. The method of claim 1, wherein the forming of the silica layer on the second sacrificial layer is performed using a Plasma Enhanced Chemical Vapor Deposition (PECVD) method. The method of claim 1, wherein the silica layer is patterned using a gaseous tetrafluoride (CF ₄ ) -based gas plasma. The method of claim 1, wherein the patterning of the second sacrificial layer and the removing of the photoresist are performed using an oxygen plasma (O ₂ plasma).