KR19990026631A - Leadframes for Integrated Circuits - Google Patents

Abstract

Disclosed is a leadframe for an integrated circuit. The lead frame for an integrated circuit includes a metal substrate, a first plating layer in which copper or a copper alloy is plated on the metal substrate, a second plating layer in which nickel or nickel alloy is strike plated on the first plating layer, and the second plating layer. The plated layer formed of multiple layers including a third plating layer having a copper or copper alloy strike-plated and a fourth plating layer in which the noble metal or the noble metal alloy is plated on the third plating layer, the deformation of the plating layer during bending of the lead frame It is not generated and reliability is improved.

Description

Leadframes for Integrated Circuits

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit lead frame, and more particularly, to an integrated circuit lead frame having improved solderability and improved structure of a plating layer so that cracking does not occur during bending deformation.

A lead frame for an integrated circuit is one of the core components of a semiconductor package together with a semiconductor chip, and serves as a lead connecting the inside and the outside of the semiconductor package and a support for supporting the semiconductor chip. Play a role. Such an integrated circuit lead frame may be manufactured in various shapes according to a method of increasing density, high integration, and substrate mounting of a semiconductor chip. An example of such an integrated circuit lead frame is illustrated in FIG. 1.

As shown in the drawing, a typical integrated circuit lead frame includes a pad 12 for mounting and maintaining a static state of a semiconductor chip 11 as a memory device, and a wire bonding with the semiconductor chip 11 and wire bonding. It consists of a structure including an internal lead (13) connected by means and an external lead (14) for connection with an external circuit. In the lead frame for an integrated circuit having the above-described structure, the pad 12 is supported by the tie bars 15, and the tape 16 is attached to the inner lead 13 to prevent deformation of the inner lead 13. And support.

The lead frame for an integrated circuit as described above is manufactured into a semiconductor package through an assembly process with the semiconductor chip 11, a resin protective film molding process, and the like. In order to improve the wire bonding property between the semiconductor chip 11 and the inner lead 13 of the lead frame during the assembling process of the semiconductor package, and to improve the characteristics of the pad 12 on which the semiconductor chip 11 is mounted, it is usually The pad 12 and the inner lead 13 are plated with a metal material having predetermined characteristics, and solder (Sn) is formed on a predetermined portion to improve solderability when mounting a substrate on the outer lead 14 exposed to the outside after molding the resin protective film. Pb) plating is carried out. However, if the solder plating is performed, a deflation process for removing the solder penetrated to the inner lead 13 of the lead frame is required. After the resin protective film molding process, a wet treatment is performed on a product close to the finished product, thereby providing reliability. The problem arises that this falls considerably.

Proposed to solve this problem is a lead-plated frame method disclosed in Japanese Patent Laid-Open No. 63-2358. This method is to complete the semiconductor package by forming a plating layer having a good solder wettability in a predetermined portion of the lead frame before the semiconductor package process and molding it with a resin protective film. 2 is a cross-sectional view schematically showing the structure of the above-described plating layer.

As shown in the figure, the nickel plating layer 22, which is an intermediate plating layer, and the palladium-nickel alloy plating layer 23 are sequentially stacked on the copper substrate 21, and the outermost plating layer on the palladium-nickel alloy plating layer 23 is sequentially stacked. Phosphorus palladium plating layer 24 is formed. In the structure of the above-described plating layer, the nickel plating layer 21 serves as a barrier layer to prevent the formation of copper compounds such as oxides or sulfides by the diffusion of copper atoms from the copper substrate 21 to the surface of the outermost plating layer. . However, since a large number of pores exist in the nickel plating layer 22, the degree of diffusion of copper atoms varies according to the thickness thereof. Typically, when the thickness of the nickel plating layer 21 is 400 micro inches (micro-inch: 10.2 μm) or less, a phenomenon in which copper atoms diffuse through pores formed in the nickel plating layer 21 occurs, and when the thickness is 400 micro inches or more. There is a problem that cracking of the entire plating layer becomes significant during the bending process of the lead frame.

Therefore, in the related art, in order to solve the above problems, the plating layer is prevented from diffusing copper atoms by minimizing the structure of the plating layer and minimizing the occurrence of cracks in the lead frame during bending. However, in order to prevent diffusion of copper atoms, the thickness of the entire plating layer including the nickel plating layer should be formed in the range of at least 100 micro inches to 1000 micro inches. In addition, a trimming process and a forming process of processing the external lead of the lead frame mounted on the external substrate to a predetermined shape after the resin protective film molding process of the semiconductor package manufacturing process are performed. Mechanical defects such as cracking of the plating layer and separation between the layers are generated. Herein, mechanical defects such as cracks and separation between the layers increase in proportion to the thickness of the plating layer, so that there is a restriction in increasing the thickness of the plating layer. In particular, the cracks generated in the plating layer become an integrated path through which copper atoms are diffused from the copper substrate, and thus cannot prevent the formation of copper compounds such as oxides or sulfides. There is a problem of worsening.

Therefore, in order to suppress the formation of cracks in the plating layer as much as possible, the interfacial adhesion between the lead frame, which is the starting point of the crack propagation, and the plating layer is very good, so that the crack is not generated, and the crack is locally generated due to the ductility of the plating layer itself. Even if it absorbs itself and does not propagate to adjacent sites.

The present invention has been made in view of the above problems, and includes a plating layer having improved lamination structure and physical properties, and does not cause deformation such as cracking during bending, and provides a lead frame for an integrated circuit having improved solderability and corrosion resistance. Its purpose is to.

1 is a plan view showing an example of a conventional lead frame for an integrated circuit,

2 is a cross-sectional view showing a structure of a plating layer in a conventional lead frame for an integrated circuit;

3 is a cross-sectional view illustrating a structure of a plating layer in a lead frame for an integrated circuit according to the present invention.

* Explanation of symbols for main parts of the drawings

11 semiconductor chip 12 pad

13: inside lead 14: outside lead

15: tie bar 16: tape

31 metal substrate 32 first plating layer

33: second plating layer 34: third plating layer

35: fourth plating layer

In order to achieve the above object, an integrated circuit lead frame of the present invention includes a metal substrate, a first plating layer in which copper or a copper alloy is plated on the metal substrate, and a strike plating of nickel or nickel alloy on the first plating layer. And a plating layer formed of a second plating layer, and a third layer including a third plating layer having a strike plated with copper or a copper alloy on the second plating layer, and a fourth plating layer plated with a noble metal or a noble metal alloy on the third plating layer.

And in the present invention, the copper alloy comprises a component, such as nickel, tin, cobalt, lead, indium, molybdenum, aluminium, titanium, zirconium, etc., the sum of the weight of less than 50 wt%, the nickel alloy is a weight sum Less than 50 wt% of copper, tin, cobalt, lead, indium, molybdenum, aluminium, titanium, zirconium, and other components are preferably included. The precious metal is any one selected from palladium, gold, platinum, silver and rhodium. Preferably, the precious metal alloy includes at least two metals selected from palladium, gold, platinum, silver, and rhodium.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view schematically illustrating a structure of a plating layer in a lead frame for an integrated circuit according to the present invention.

As shown in the drawing, an integrated circuit lead frame according to the present invention includes a first plating layer 32 in which copper or a copper alloy is plated on a metal substrate 31 used as a material of an integrated circuit lead frame, and nickel or The nickel-plated strike-plated second plating layer 33 and the copper or copper alloy strike-plated third plating layer 34 are sequentially stacked to form an intermediate layer, and the third plating layer 34 is plated with a noble metal or a noble metal alloy. The fourth plating layer 35 is formed to include a plating layer formed of multiple layers forming the outermost plating layer.

In the multilayer plating layer having the above-described structure, it is preferable that the first plating layer 32 is formed of copper or a copper alloy in a predetermined thickness, for example, in a range of about 0.5 μm to 10 μm. The copper alloy is, for example, nickel (Ni), tin (Sn), cobalt (Co), lead (Pb), indium (In), molybdenum (Mo), aluminum (Al), titanium (Ti), zirconium (Zi). It is preferably included so as to include a component such as), and is preferably formulated so that the weight sum of the above-mentioned components in the formed copper alloy is less than 50 wt%.

In the second plating layer 33, it is preferable that the nickel or the nickel alloy is strike-plated in a predetermined thickness, for example, in the range of about 0.05 µm to 0.5 µm. The nickel alloy may be, for example, copper (Cu), tin (Sn), cobalt (Co), lead (Pb), indium (In), molybdenum (Mo), aluminum (Al), titanium (Ti), zirconium (Zi). It is preferably included so as to include a component such as), and the composition is such that the weight sum of the above-mentioned components in the formed nickel alloy is less than 50 wt%.

In the third plating layer 34, it is preferable that the copper or copper alloy is strike-plated in a predetermined thickness, for example, in the range of about 0.05 µm to 0.5 µm. The copper alloy is, for example, nickel (Ni), tin (Sn), cobalt (Co), lead (Pb), indium (In), molybdenum (Mo), aluminum (Al), titanium (Ti) as described above. And zirconium (Zi), and the like, and the composition is preferably composed so that the weight sum of the above-mentioned components in the formed copper alloy is less than 50wt%.

The fourth plating layer 35 is formed of a precious metal or a precious metal alloy such as, for example, palladium (Pd), gold (Au), platinum (Pt), silver (Ag), and rhodium (Rh). Here, the precious metal alloy includes at least two or more precious metals selected from the above-described precious metals such as palladium (Pd), gold (Au), platinum (Pt), silver (Ag), and rhodium (Rh), and the precious metal alloy It is based on the above-mentioned noble metals, for example, nickel (Ni), copper (Cu), tin (Sn), cobalt (Co), lead (Pb), indium (In), molybdenum (Mo), aluminum (Al), titanium (Ti), zirconium (Zi) and the like may be further included, but it is preferable that the weight of the above-described components in the composition of the precious metal alloy is less than 50wt%.

As the material of the metal substrate 31 used as the material of the lead frame for the integrated circuit, for example, copper, a copper alloy, a nickel alloy, or the like may be used. And, the thickness of the metal substrate is preferably formed in the range of approximately 0.1mm to 3mm.

In the lead frame for an integrated circuit according to the present invention having a multi-layered plating layer structure as described above, since the first plating layer 32 is formed of copper or a copper alloy, adhesion to the metal substrate 31 is improved, and ductility is increased. Therefore, when the bending process for the lead frame, etc. is large, the area where the crack is generated is reduced, and even if a predetermined crack occurs at the local part, it is not transmitted to other parts because it has its own ductility. In addition, the second plating layer 33 strike-plated with nickel or nickel alloy on the first plating layer 32 may improve corrosion resistance, and the third plating layer 34 strike-plated with copper or copper alloy may be a precious metal and a precious metal alloy. It serves to increase the adhesion between the fourth plating layer 35 and the second plating layer 33, which is the outermost plating layer plated with.

An integrated circuit lead frame according to the present invention includes a first plated layer plated with a copper or copper alloy on a metal substrate, which is a material of the lead frame, a second plated layer plated with a nickel or nickel alloy, and a strike plated with copper or a copper alloy. The third plating layer is sequentially stacked, and the outermost layer is provided with a multilayer plating layer including a fourth plating layer plated with a noble metal or a noble metal alloy, thereby performing bending processing on the lead frame for an integrated circuit according to the present invention. When the cracks in the plating layer has the advantage that the deformation is minimized. Therefore, the semiconductor package using the lead frame for the integrated circuit according to the present invention has the advantage that the oxide does not occur, such as discoloration of the surface of the plating layer is generated, the solderability is improved and the overall reliability is improved.

Claims (10)

Metal substrate; A first plating layer in which copper or a copper alloy is plated on the metal substrate; A second plating layer on which the first plating layer is strike plated with nickel or a nickel alloy; A third plating layer in which the copper or copper alloy is strike plated on the second plating layer; And And a fourth plating layer in which the noble metal or the noble metal alloy is plated on the third plating layer. The method of claim 1, The thickness of the first plating layer is an integrated circuit lead frame, characterized in that about 0.5㎛ 10㎛. The method of claim 1, The thickness of the second plating layer is an integrated circuit lead frame, characterized in that about 0.05㎛ to 0.5㎛. The method of claim 1, The thickness of the third plating layer is an integrated circuit lead frame, characterized in that about 0.05㎛ to 0.5㎛. The method of claim 1, The copper alloy has a sum total of less than 50 wt% nickel, tin, cobalt, lead, indium, molybdenum, aluminium, titanium, zirconium, and the like. The method of claim 1, The nickel alloy is a lead frame for an integrated circuit, characterized in that the sum total of less than 50 wt% copper, tin, cobalt, lead, indium, molybdenum, aluminium, titanium, zirconium and the like. The method of claim 1, The noble metal is any one selected from palladium, gold, platinum, silver, rhodium lead frame for an integrated circuit. The method of claim 1, The precious metal alloy includes at least two or more metals selected from palladium, gold, platinum, silver and rhodium. The method of claim 8, The noble metal alloy has a weight sum of less than 50 wt% nickel, copper, tin, cobalt, lead, indium, molybdenum, aluminium, titanium, zirconium, and the like. The method of claim 1, The material of the metal substrate is a lead frame for an integrated circuit, characterized in that any one of copper, copper alloy and nickel alloy.