KR19990006215A - Liquid crystal display device and manufacturing method - Google Patents

Abstract

The present invention discloses a liquid crystal display device and a method of manufacturing the same.

The disclosed invention includes an upper and lower substrates facing each other, a data line and a scan line formed on the lower substrate and arranged in a matrix, a thin film transistor arranged in a matrix at an intersection of the data line and the scan line, and the thin film. And a passivation layer having a predetermined thickness formed of a non-transparent polymer and formed to surround a pixel electrode connected to the transistor and driven by the thin film transistor, and an upper portion of the thin film transistor arranged in a matrix. Here, the passivation layer is used as a cell gap material between the upper and lower substrates.

Description

Liquid crystal display device and manufacturing method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the same. More specifically, a thin film transistor liquid crystal display (hereinafter referred to as TFT-LCD) is a thin film transistor and a turn thereof. A lower substrate on which a pixel electrode driven according to on is formed, an upper substrate facing the lower substrate, and having three color filter layers of red, green and blue repeatedly arranged; The liquid crystal is sealed between the upper substrate and the lower substrate.

Here, a typical example of the TFT-LCD is shown in FIG. 1, which is briefly described as follows.

Referring to the drawings, the plurality of gate lines 11 and the data lines 16 are arranged on the lower substrate (not shown) so as to vertically intersect to define unit cells in the form of a lattice.

A channel layer 13 is formed on the gate line 11 near the intersection of the gain line 11 and the data line 16, and is drawn out of the data line 16 to overlap one side of the channel layer 13. The source electrode 16A is formed, and the drain electrode 16B overlapping the other side of the channel layer 13 is formed to form a thin film transistor TFT.

In the unit cell space, a pixel electrode 17 is formed in contact with a predetermined portion of the drain electrode 16B to drive a liquid crystal (not shown).

Although not shown in the drawings, a protective film is formed on the lower substrate resultant to protect the electrode lines 11 and 16 and the thin film transistor.

FIG. 2 is a cross-sectional view of FIG. 1 taken along the line II-II ', wherein the gate electrode 11 is formed on the lower substrate 11 by a known metal pattern forming method, and then the gate electrode 11 is formed on the resultant. In order to prevent a short circuit with the conductive layer to be formed later, an insulating film such as a gate insulating film 12, for example, a silicon nitride film, is formed. Subsequently, an amorphous silicon layer 13 serving as a channel of the thin film transistor and an insulating film for an etch stopper are sequentially stacked on the gate insulating film 12. Subsequently, the insulating film for etch stoppers is partially patterned, so that the etch stopper 14 is formed. In this case, the etch stopper 14 may be formed on the amorphous silicon layer 13 including the gate electrode 11.

Subsequently, an amorphous silicon layer (15: N ⁺ a-si) doped with N-type impurities serving as an ohmic layer is deposited on the resulting source and lower electrode of the lower substrate 10, and then a thin film transistor. In order to limit the shape of the doped amorphous silicon layer 15 and the amorphous silicon layer 13 is patterned. In this case, the amorphous silicon layer 13 is patterned larger than the width of the gate electrode 11 to secure the minimum channel length of the thin film transistor.

Then, in order to form the source and drain electrodes of the thin film transistor on the lower substrate 10, a metal film such as aluminum, tantalum, or chromium is deposited to a predetermined thickness, and the metal is formed to have the form of the source and drain electrodes of the thin film transistor. Predetermined portions of the film and the doped amorphous silicon layer 15 are patterned to form drain electrodes and source electrodes 16A and 16B to complete the thin film transistor.

Then, in order to protect the device formed on the entire structure, a protective film 19 composed of a silicon nitride film or a polyimide film is formed by a known formation method.

Subsequently, although not shown in the drawing, in a subsequent process, the upper substrate is bonded with the color filter formed thereon, and then the spacer having a predetermined height is distributed to maintain the cell gap of the upper and lower substrate yarns. Next, a liquid crystal is enclosed and a liquid crystal display element is completed.

However, the liquid crystal display device as described above has the following problems.

First, in the liquid crystal display device, the cell gap between the upper and lower substrates determines the characteristics of the liquid crystal display device. That is, the response speed, contrast ratio, viewing angle, and the like of the TFT-LCD correspond to this.

In particular, a TFT-LCD using any kind of display mode has a problem in that a high contrast ratio cannot be obtained unless the thickness of the liquid crystal layer is strictly set in accordance with the optical characteristics of the liquid crystal material.

However, in order to control and maintain the cell gap as described above, in the method of dispersing the spacer using the plastic balls, the gap may be uneven according to the difference in the dispersion density of the spacer.

In addition, there is a possibility of causing static electricity during the spacer dispersion process, there is a problem that the change of the gap according to the design change is not easy.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of accurately maintaining a cell gap without a spacer scattering step for maintaining a cell gap.

Another object of the present invention is to provide a method for producing the liquid crystal display device.

1 is a plan view of a lower substrate of a liquid crystal display device according to the related art.

FIG. 2 is a cross-sectional view taken along the line II-II 'of FIG. 1; FIG.

3 is a plan view of a lower substrate of a liquid crystal display device according to the present invention;

4 is a cross-sectional view taken along the line IV-IV 'of FIG. 3;

Explanation of symbols for the main parts of the drawings

10,20: lower substrate 11, 21: gate electrode

12, 22: gate insulating film 13, 23: active layer

14, 24: etch stopper layer 15, 25: ohmic contact layer

16, 26 source / drain electrodes 17, 27 pixel electrodes

19,29: passivation layer

MEANS TO SOLVE THE PROBLEM In order to achieve the above object of this invention, this invention is a matrix formed on the mutually opposing upper and sub board | substrates, the lower substrate, and the data line and the scanning line arrange | positioned in matrix, and the intersection of the said data line and the scanning line. A thin film transistor disposed above the thin film transistor, a pixel electrode connected to the thin film transistor and driven by the thin film transistor, and an upper portion of the thin film transistor arranged in a matrix, the distance between the upper and lower substrates is reduced. And a passivation layer to adjust and maintain.

The present invention includes providing a lower substrate facing the upper substrate; Forming a plurality of thin film transistors on a matrix on the lower substrate; Forming a plurality of pixel electrodes connected to the plurality of thin film transistors; Forming a passivation layer with a predetermined thickness on the lower substrate; Patterning the passivation layer so that the passivation layer is present only at the top and the periphery of the thin film transistor, respectively.

The TFT-LCD of the present invention having the above-described configuration can maintain the gap between the upper substrate and the lower substrate uniformly so that the cell thickness can be uniformly controlled, and the spacer dispersion process can be omitted, thereby simplifying the process. have.

EXAMPLE

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 and 4 show the layout of the lower substrate of the TFT-LCD according to the present invention and the cross section of the thin film transistor thereof.

Referring to FIG. 3, a plurality of gate lines 21 and data lines 26 are arranged vertically and intersect on a lower substrate (not shown) to define a unit cell in a grid form.

A channel layer 23 is formed on the gate line 21 near the intersection of the gate line 21 and the data line 26, and is drawn out of the data line 26 to overlap one side of the channel layer 23. The source electrode 26A is formed, and the drain electrode 26B overlapping with the other side of the channel layer 13 is formed to form a thin film transistor.

In the unit cell space, a pixel electrode 27 is formed in contact with a predetermined portion of the drain electrode 26B to drive a liquid crystal (not shown).

In the present invention, the passivation layer 29 used as a cell gap holding material is formed to include the thin film transistor region while protecting the thin film transistor. At this time, the protective film 29 is formed of a non-transmissive polymer, the thickness can be adjusted to adjust the cell gap as desired by the operator.

4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3. After the gate electrode 21 is formed on the lower substrate 20 by a known metal pattern forming method, the gate electrode 21 is formed on the resultant. ) And an insulating film such as a silicon nitride film, for example, a silicon nitride film is formed to prevent a short circuit between the < RTI ID = 0.0 >

Subsequently, a fine crystal chamber silicon layer (μc-Si: 23A) is deposited on the gate insulating film 22 as an active layer serving as a channel of the thin film transistor, and then a hydrogenated amorphous silicon layer (a-Si: H: 23B) is deposited. After the deposition, the hydrogenated amorphous silicon layer (a-Si: H: 23B) is sequentially deposited to form an active layer 23 having a double structure. Here, the microcrystalline silicon layer (μc-Si: 23A) serves to increase the role of the channel layer in the active layer.

In the subsequent etching process, an etch stopper layer 24 for minimizing damage to the active layer is formed to be positioned on a predetermined portion on the hydrogenated amorphous silicon layer 23. Subsequently, as an ohmic contact layer 25 of the thin film transistor on the lower substrate 20 on which the etch stopper layer 24 is formed, an amorphous silicon layer (n + a-Si: H) doped with impurities or fine crystalline doped with impurities A silicon layer (n + μc-Si) is formed. Afterwards, the doped amorphous silicon layer (n + a-Si: H: 25) and the active layer 23 are patterned to define the operating region of the thin film transistor.

Next, a metal film, for example, a chromium or aluminum film, is deposited on the entire surface of the resultant, and patterned with a predetermined portion to define the thin film transistor region, so that the source electrode 26A and the drain electrode 26B are formed. At this time, during patterning of the source / drain electrodes 26A and 26B, a predetermined portion of the etch stopper layer 24 is exposed. Thereafter, although not shown in the figure, a pixel electrode (not shown) is formed to contact the drain electrode 26B.

Subsequently, the passivation layer 29 is formed on the lower substrate 2 on which the thin film transistor is formed to have a predetermined thickness. In this case, as described above, the passivation layer 29 is preferably patterned to exist only on the thin film transistor, and is formed of a non-transparent polymer material. Here, the passivation layer 29 adjusts the cell gap according to the thickness thereof, so that a separate cell gap material, for example, a spacer scattering process is excluded.

That is, in the lower substrates of the liquid crystal display elements arranged in a plurality of active matrix states, the passivation layer 29 is formed at predetermined heights at the uniform positions of each cell to support the upper and lower substrates. In addition, the cell gap is maintained. Therefore, the thickness of the passivation layer 29 and the distance of the cell gap are proportional to each other.

Thereafter, a series of processes of an upper substrate forming step, a cell bonding step, and a liquid crystal encapsulation step are performed to complete the TFT-LCD substrate.

As described above, according to the present invention, by using the passivation layer as the protective film and the cell gap holding material of the thin film transistor, the separate spacer dispersion process is eliminated.

Therefore, the manufacturing process is simplified, and generation of static electricity of the liquid crystal display device due to the spacer can be prevented.

In addition, the cell gap can be adjusted, and the cell gap can be kept uniform.

Claims (9)

Upper and lower substrates facing each other, A data line and a scan line formed on the lower substrate and arranged in a matrix; A thin film transistor arranged in a matrix at the intersection of the data line and the scan line; A pixel electrode connected to the thin film transistor and driven by the thin film transistor; And a passivation layer formed to surround an upper portion of the thin film transistor arranged in a matrix, and controlling and maintaining a distance between the upper and lower substrates. The liquid crystal display of claim 1, wherein the passivation layer is a non-transparent polymer. The thin film transistor of claim 1 or 2, A gate electrode integrated with the scan line; A gate insulating film formed on the lower substrate; An active layer formed on a predetermined portion of the gate insulating layer including a gate electrode region below the substrate; An etch stopper layer formed on a predetermined portion on the active layer above the gate electrode; A pair of ohmic contact layers respectively formed on both edges of the active layer and the etch stopper layer, A source electrode in contact with the one side ohmic contact layer and integral with the data line; And a drain electrode in contact with the other ohmic contact layer. The liquid crystal display device according to claim 3, wherein the active layer has a laminated structure composed of crystalline silicon and amorphous silicon in advance. The liquid crystal display device of claim 4, wherein the microcrystalline silicon layer serves as a channel layer in an active layer. Providing a lower substrate opposite the upper substrate; Forming a plurality of thin film transistors on a matrix on the lower substrate; Forming a plurality of pixel electrodes connected to the plurality of thin film transistors; Forming a passivation layer with a predetermined thickness on the lower substrate; And patterning the passivation layer such that the passivation layer is present only on the top and the periphery of the thin film transistor, respectively. The method of claim 6, wherein the passivation layer is made of a non-transmissive polymer. The method of claim 6, wherein the forming of the thin film transistor comprises: Forming a gate electrode connected to the scan line on the lower substrate opposite the upper substrate; Forming a gate insulating film on the gate electrode; Forming an active layer on the gate insulating film; Forming an etch stopper layer on the active layer above the gate electrode; Forming an ohmic contact layer on the etch stopper layer and the active layer; Patterning the ohmic contact layer and the active layer; Forming a drain electrode on one side of the patterned ohmic contact layer and the etch stopper layer by contacting the data line; And forming a source electrode on the other side of the patterned ohmic contact layer and the etch stopper layer to manufacture a thin film transistor. The method of claim 8, wherein forming the active layer comprises: forming a microcrystalline silicon layer; And laminating a hydrogenated amorphous silicon layer.