KR20040054433A - method for switching device or driving device for liquid crystal display with driving circuit - Google Patents

Abstract

PURPOSE: A fabrication method of a switching element or a driving element of a driving circuit integrated LCD device is provided to form a crystalloid poly silicon layer by using an SLS(Sequential Lateral Solidification) crystallization technique, and to consecutively proceed a plasma process and a gate insulating film forming process in one chamber, thereby reducing a process time. CONSTITUTION: By depositing a silicon oxide on a transparent insulating substrate(100), a buffer layer(105) is formed. By depositing amorphous silicon on the buffer layer(105), an amorphous silicon layer is formed. By using an SLS(Sequential Lateral Solidification) crystallization technique, a poly silicon layer(115) is formed through crystallization of the amorphous silicon layer. Projections(117) are protruded on a surface of the poly silicon layer(115). The poly silicon layer(115) is patterned through a mask process. After applying a photoresist to entire sides of the poly silicon layer(115), the poly silicon layer(115) is exposed by using a mask. When the photoresist is developed and etched, a desired pattern of the poly silicon layer(115) is made. The remaining photoresist is removed. The poly silicon layer(115) configures a semiconductor layer. After locating the substrate(100), where the semiconductor layer(115) of poly silicon is formed, in a chamber of a PECVD(Plasma Enhanced Chemical Vapor Deposition) device that uses helium as purge gas or carrier gas, the chamber becomes in vacuum state. The helium gas is injected into the chamber to create a helium atmosphere.

Description

Method for manufacturing switching device or driving device in liquid crystal display with integrated driving circuit {method for switching device or driving device for liquid crystal display with driving circuit}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching element or a method for manufacturing the driving element of a liquid crystal display with integrated driving circuit.

Recently, with the rapid development of the information society, there is a need for a flat panel display having excellent characteristics such as thinning, light weight, and low power consumption. Among them, a liquid crystal display having excellent color reproducibility, etc. displays are actively being developed.

In general, a liquid crystal display device is formed by arranging two substrates on which electric field generating electrodes are formed so that the surfaces on which two electrodes are formed face each other, inserting a liquid crystal material between the two substrates, and then applying voltage to the two electrodes. It is a device that expresses an image by the transmittance of light that varies depending on the movement of liquid crystal molecules by moving the liquid crystal molecules by an electric field.

The lower substrate of the liquid crystal display includes a thin film transistor which is a switching element, and an active layer used in the thin film transistor is mainly made of amorphous silicon (a-Si). This is because amorphous silicon can be formed on a large substrate such as a low cost glass substrate at low temperature.

However, a driving circuit is required to drive the thin film transistor using such amorphous silicon. The driving circuit includes a plurality of complementary metal oxide semiconductor (CMOS) devices, and single crystal silicon is used to form such a CMOS device.

Accordingly, the liquid crystal display device is driven by connecting a large scale integration made of single crystal silicon to a thin film transistor array substrate made of amorphous silicon by a method such as tape automated bonding (TAB). However, since the price of the driving circuit is very high, such a liquid crystal display has a disadvantage of high price.

Recently, a liquid crystal display device employing a thin film transistor using polysilicon (poly-Si) has been widely researched and developed. In a liquid crystal display using polysilicon, the thin film transistor and the driving circuit can be formed on the same substrate, and the process is simplified because the process of connecting the thin film transistor and the driving circuit is unnecessary. In addition, polysilicon has a field response mobility of about 100 to 200 times greater than that of amorphous silicon, so it has a fast response speed and excellent stability to temperature and light.

Such polysilicon may be directly deposited (as-deposition), or by depositing amorphous silicon by plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD) by crystallizing it. Can be formed.

Polysilicon formation using amorphous silicon includes solid phase crystallization (SPC), metal induced crystallization (MIC), laser annealing, and sequential side solidification ( sequential lateral solidification (hereinafter referred to as SLS method).

Among these, the SLS method widely used recently takes advantage of the fact that the grain of silicon grows in the direction perpendicular to the interface at the interface between the silicon liquid region and the solid state region of the silicon. A method of crystallizing an amorphous silicon thin film capable of improving the size of the silicon grain by moving and laterally growing the grain by a predetermined length (Robert S. Sposilli, MA Crowder, and James S. Im, Mat. Res. Soc. Symp. Proc. Vol. 452, 956 to 957, 1997). The SLS method can form a polysilicon thin film having a large size of silicon grain on a substrate.

This SLS crystallization method will be described below with reference to the accompanying drawings.

1A to 1C illustrate a process of crystallizing an amorphous silicon film by the SLS method.

First, before the SLS crystallization process, a buffer layer is formed by depositing silicon oxide (SiO ₂ ) on the transparent substrate. Thereafter, amorphous silicon is entirely deposited on the buffer layer to form an amorphous silicon layer.

First, as shown in FIG. 1A, crystals are grown by first irradiating a laser beam to the A region of the amorphous silicon layer 1. Since silicon grows laterally from the interface between the liquid region and the solid region, the grains 3 grow from both ends of the region A irradiated with the laser beam and stop growth at the region where the crystals meet (Ia line).

Subsequently, as shown in FIG. 1B, a crystal is grown by irradiating a laser beam to the B region of the amorphous silicon layer 1 secondly. At this time, the region B includes a part of the region to which the laser beam is first irradiated (region A of FIG. 1A), and since the crystal is grown from the boundary of the region B to which the laser beam is irradiated, the region A and the region B partially overlap. In the region AB region, grains generated during the first irradiation of the laser beam (3 in FIG. 1A) act as crystallization nuclei to thereby grow. This crystal growth stops at the Ib line, and larger grains 5 are produced after the secondary laser beam irradiation, as shown.

Next, as shown in FIG. 1C, crystals are grown by irradiating a laser beam to the C region of the amorphous silicon layer 1 in a tertiary manner, wherein the C region includes a part of the B region to which the laser beam is irradiated secondarily. . Therefore, the grains formed in the region C partially overlapped with the region B of the region C (grains BC of FIG. 1B) generated during the second irradiation of the laser beam act as crystallization nuclei so that larger grains 7 are formed. Is grown.

By repeating the laser beam irradiation in this manner, the entire thin film on which amorphous silicon is formed is scanned, thereby producing polysilicon having a large grain size. In addition, since the number of laser beams irradiated at the same position is reduced, the yield is high.

However, in the SLS crystallization process, undesired small grain regions are formed between the lateral growth regions, and thus more shots are used. In this case, sharp ridges at the "Ia, Ib ..." regions, which are intersection points of the grain boundary regions, are used. Is liable to occur, resulting in a problem that the surface of the polysilicon becomes rough. The problem will be mentioned later.

The above-described silicon crystallization method can be applied to fabricate a driving device or a switching device. In general, the higher the resolution of the liquid crystal display device, the shorter the pad pitch of the signal line and the scan line, and thus, the TCP (Tape Carrier Package), which is a general driving circuit mounting method, becomes difficult to bond itself. However, fabricating a drive circuit directly on the substrate with polysilicon reduces drive IC costs and simplifies mounting.

2 is a schematic view of a typical driving circuit unit integrated liquid crystal display device.

As shown, the driving circuit portion 17 and the pixel portion 13 are formed on the insulating substrate 10 together. The pixel portion 13 is positioned at the center of the substrate 10, and the data and gate driving circuit portions 17a and 17b are positioned at one side of the pixel portion 13 and the other side not parallel thereto. The pixel portion 13 includes a plurality of gate wires 21 connected to the gate driving circuit part 17b and a plurality of data wires 19 connected to the data driving circuit part 17a intersect with each other. The pixel electrode 23 is formed in the pixel region P defined by the pixel region P, and the thin film transistor T connected to the pixel electrode 23 is positioned at the intersection of the two wires.

In addition, the data and gate driving circuit portions 17a and 17b are connected to an external signal input terminal 25.

The data and gate driving circuit units 17a and 17b internally adjust an external signal input through the external signal input terminal 25 to control the display to the pixel unit 13 through the data and gate lines 19 and 21, respectively. Apparatus for supplying signals and data signals.

Accordingly, the data and gate driving circuit portions 17a and 17b are formed with a complementary metal-oxide semiconductor (CMOS) structure thin film transistor (not shown), which is an inverter, to properly output an input signal. It is.

The CMOS is a semiconductor technology used in a thin film transistor for driving circuits requiring high-speed signal processing. The CMOS uses extra electrons (n-type semiconductor) and negatively charged holes (p-type semiconductor) charged with negative electricity. It forms a conductor and is used as a complementary method for forming a current gate by effective electrical control of the two kinds of semiconductors, and it is used as a driving device constituting a driving circuit because it has an advantage of consuming very small power. .

Since the CMOS device requires fast operating characteristics, the polysilicon layer is used as the active channel layer, and the switching device also uses the polysilicon layer as the active channel layer, so that the high mobility is obtained. Image quality is improved.

The driving device and the switching device may be manufactured at the same time, which will be briefly described with reference to the accompanying drawings.

3 and 4 are cross-sectional views showing cross sections of the switching device and the CMOS device.

3 is a switching element T of the display unit, and FIG. 4 is a CMOS element C of the driver unit circuit unit.

First, a silicon nitride (SiNx) or silicon oxide (SiO ₂ ) is deposited on a transparent insulating substrate 30 on which a switching device region and a CMOS device region are defined to form a buffer layer 32. Next, after depositing amorphous silicon (a-Si) on the buffer layer 32, a dehydrogenation process is performed. Next, after the amorphous silicon layer subjected to the dehydrogenation process is crystallized into a polysilicon layer by SLS crystallization, the polysilicon layer is patterned into a predetermined shape. In this case, the polysilicon layer is simultaneously configured in the switching device region T and the CMOS device region C, and the polysilicon layers 35, 37, and 40 patterned in the device regions T and C are active channels, respectively. The semiconductor layers 35, 37, and 40 defined by the layers 35a, 37a, and 40a, the ohmic contact layers 35c, 37c, and 40c, and the LDD layers 35b and 37b are formed.

Next, in the semiconductor layers 35, 37, and 40, the surfaces of the semiconductor layers 35, 37, and 40 are uneven because sharp bumps are generated in the grain boundary region by the SLS crystallization process described above. The rough surface of the semiconductor layers 35, 37, and 40 may be formed by using a dry etching apparatus having a gas atmosphere chamber having a reactive gas such as hydrogen (H ₂ ) or fluorine (F). Plasma treatment improves the surface roughness of the semiconductor layers 35, 37, and 40. Thereafter, a gate insulating layer 43 of silicon oxide (SiO ₂ ) is formed on the semiconductor layers 35, 37, and 40 having the improved surface state. The gate insulating layer 43 has the substrate 30 on which the semiconductor layers 35, 37, and 40 having the improved surface are formed in the chamber of the PECVD apparatus, and then silane (SiH ₄ ) and nitrogen oxide (N ₂ O). After injecting gas to form an atmosphere in the chamber, a PECVD process is performed to deposit the gate insulating layer 43 of the silicon oxide (SiO 2) on the semiconductor layers 35, 37, and 40.

Thereafter, gate electrodes 45, 47, and 50 are formed on the gate insulating layer 43, and then the semiconductor layers 35, 37, and 40 of the substrate 30 on which the gate electrodes 45, 47, and 50 are formed. In the doping process, first, after low concentration n-doping, since the first element C1 of the switching element T and the driving element C is n-type, the remaining regions except for these regions are covered by a means such as photoresist and have a high concentration. Do the n + doping. Thereafter, the region doped with n + ions is blocked, and a high concentration of p + is doped into the impurity region 40c of the second element C2 of the driving element C. At this time, the n-doped portion of the semiconductor layers 35 and 37 of the switching element T and the first driving element C1 constitutes the LDD layers 35b and 37b, and the n-doped portion is the n-type ohmic contact. Layers 35c and 37c are formed. In addition, the p + doped portion of the second driving device forms a p-type ohmic contact layer 40c, and the undoped portion of the gate electrode 45, 47, 50 is covered by the active channel layers 35a, 37a, 40a). Next, an interlayer insulating layer 55 is formed on the doped semiconductor layers 35, 37, and 40 and the gate electrodes 45, 47, and 50 in the switching element T and the driving element C. By patterning, the ohmic contact layers 35c, 37c, and 40c of the switching element T and the driving element (n-type thin film transistor and p-type thin film transistor) C are exposed.

Next, source electrodes 60a, 62a, 65a and drain electrodes 60b, 62b, 65b of each device in contact with the ohmic contact layers 35c, 37c, and 40c of each device are formed.

In the above-described process, the switching element T of the pixel portion and the CMOS element C of the driving portion are fabricated, and a protective film 70 which is an insulating film is formed on the entire surface of the substrate 30 on which each of the elements is formed, and the switching is performed. The drain electrode 60b of the element T is exposed. Thereafter, the pixel electrode 73 in contact with each of the drain electrodes 60b is formed.

However, in the above-described method of manufacturing a switching element and a driving element of a liquid crystal display device with an integrated driving circuit, particularly in the surface treatment of a semiconductor layer of polysilicon and a process of forming a gate insulating film, hydrogen (H ₂ ) or a flue The surface treatment is performed by performing a plasma process in a chamber of a dry etching apparatus having a reactive gas containing an organ (F) group and the atmosphere, and then, the surface treated substrate is transferred to a chamber of a PECVD apparatus to form a gate insulating film. This is because the reactive gas reacts easily with others when a reactive gas having a reactive gas such as hydrogen (H ₂ ) or fluorine (F) is used. The process proceeds in different chambers. Therefore, the manufacturing process takes a lot of time, the surface treatment of the semiconductor layer, by using a reactive gas may cause side effects causing changes in the TFT device characteristics.

The present invention has been made to solve the above-mentioned conventional problems, the object of the present invention is to form a crystalline polysilicon layer using SLS crystallization technology, and then using a plasma process using an inert gas helium (He) gas, The process of forming the gate insulating film of silicon oxide is continuously performed in one chamber to shorten the process time and increase the process efficiency.

1A to 1C illustrate a process of crystallizing an amorphous silicon film by the SLS method.

2 is a plan view schematically illustrating an array substrate on which a data driving circuit and a gate driving circuit are mounted on a substrate;

3 is a cross-sectional view of a thin film transistor that is a switching element of a display unit.

4 is a cross-sectional view of a CMOS thin film transistor of a driving unit.

5A to 5G are cross-sectional views illustrating a method of manufacturing a thin film transistor that is a switching device or driving device of a liquid crystal display with a drive circuit integrated according to the present invention.

<Description of Symbols for Main Parts of Drawings>

100: insulating substrate 105: buffer layer

115: semiconductor layer 117: protrusion

In order to achieve the above object, a method of manufacturing a switching device or a driving device of a liquid crystal display with an integrated driving circuit according to the present invention includes forming a buffer layer on a transparent insulating substrate; Forming an amorphous silicon film on the buffer layer over the buffer layer; Forming a polysilicon film crystallized from the amorphous silicon film by a crystallization method; Patterning the crystallized polysilicon film to form a semiconductor layer; Improving the surface roughness of the semiconductor layer by plasma-processing the substrate on which the semiconductor layer is formed in a chamber of helium (He) atmosphere; Forming a gate insulating film by evaporating the substrate having an improved surface of the semiconductor layer in the chamber; And depositing and patterning a metal material on the substrate on which the gate insulating film is formed to form a gate electrode.

In this case, the plasma treatment is performed in a chamber of a PECVD apparatus using helium (He) as a purge or carrier gas, and after the helium (He) plasma treatment, the chamber is a silane (SiH ₄ ) gas and nitrogen oxide (N ₂ O). It is characterized by a gas atmosphere.

Further, after the gate electrode forming step, doping the semiconductor layer; Forming an interlayer insulating film over the doped semiconductor layer; Forming a source and a drain electrode on the interlayer insulating film; And forming a protective layer over the source and drain electrodes.

Hereinafter, with reference to the accompanying drawings will be described in detail with respect to the switching device and the manufacturing method of the driving circuit-integrated liquid crystal display device according to the present invention.

5A to 5F are manufacturing process diagrams of a switching element and a driving element of a liquid crystal display device with an integrated driving circuit according to the present invention.

First, as shown in FIG. 5A, a silicon oxide (SiOx) is deposited on the transparent insulating substrate 100 to form a buffer layer 105 having a predetermined thickness. When the amorphous silicon layer is recrystallized into a polysilicon layer, alkali ions, such as potassium ions (K +) and sodium ions (Na +), present in the substrate 100 may be generated by heat. In order to prevent the film quality characteristic of the polysilicon layer from deteriorating, the buffer layer 105 is formed between the substrate 100 and the polysilicon layer. Thereafter, amorphous silicon (a-Si) is deposited on the buffer layer 105 to form an amorphous silicon layer 110.

Next, as shown in FIG. 5B, the amorphous silicon layer 110 is crystallized using the SLS crystallization method using a laser to the amorphous silicon layer 110 to form the polysilicon layer 115. In this case, the boundary region between the grains and the grains of the surface of the polysilicon layer 115 is sharply raised by the SLS crystallization method to form the protrusion 117.

Next, as shown in FIG. 5C, the polysilicon layer 115 is patterned by performing a mask process. After the photoresist is coated on the entire surface of the polysilicon layer 115, the mask is exposed using a mask having a desired pattern. Thereafter, when the photoresist is developed and the etching process is performed, a polysilicon layer 115 having a desired pattern is formed. The remaining photoresist is then removed. The polysilicon layer 115 forms a semiconductor layer 115.

Next, as shown in FIG. 5D, the substrate 100 on which the semiconductor layer 115 of polysilicon is formed is placed on a chamber of a PECVD apparatus using helium as a purge or carrier gas. After placing the chamber in a vacuum state, helium (He) gas is injected into the chamber to create a helium (He) atmosphere. Since the PECVD equipment uses helium (He), which is an inert gas, as a carrier gas, it is possible to proceed with a simple preparation work because there is no need for preparation for injection into another chamber. Thereafter, a plasma process using helium (He) gas is performed for a proper temperature and a suitable time, and the surface of the semiconductor layer 115 whose surface state is roughened by the raised protrusion 117 of the grain and grain boundaries by the crystallization process is performed. Flatten

The reason for surface treatment of the said semiconductor layer is demonstrated briefly. Since the semiconductor layer formed by the crystallization method has raised projections of grain boundaries, the surface of the semiconductor layer is uneven. When the semiconductor layer in the above state uses the active channel layer, electric field concentration occurs due to the raised projections on the surface, and thus, the gate insulating layer easily breaks down. Therefore, in order to improve the interfacial properties of the surface of the semiconductor layer, a surface treatment for flattening the raised protrusions should be performed. In addition, when the surface of the semiconductor layer is planarized to improve the interfacial characteristics, the mobility characteristics are improved, so that the characteristics of the switching element or the driving element can be improved.

It is safer than the plasma process using a hydrogen (H ₂ ) or a fluorine (F) group, which is a reactive gas, to form the atmosphere in the chamber according to the present invention with helium (He), which is an inert gas. This is because inert gases do not react with other gases and are therefore safer than reactive gases in inhalation or gas leakage. In addition, when a reactive gas such as a fluorine (F) group-containing gas or hydrogen (H ₂ ) is used, the reactive gas may directly or indirectly exhibit charge in the thin film transistor, and the generation of the charge may occur in the thin film transistor. It causes device characteristic change. Therefore, the surface treatment of the semiconductor layer through the plasma process using helium (He), which is an inert gas, can minimize the side effects of the characteristics change of the thin film transistor device.

Next, as shown in FIG. 5E, helium in the chamber is left without a vacuum brake while the substrate 100 having the surface planarized by the plasma using the inert gas helium (He) is left in the chamber. (He) The gas is removed, and silane (SiH ₄ ) and nitrogen oxide (N ₂ O) are injected to change the atmosphere in the chamber. Subsequently, when the PECVD process is performed in the chamber, the mixed gas is deposited on the entire surface of the substrate including the semiconductor layer 115 by a plasma effect to form a gate insulating layer 120 of silicon oxide (SiO ₂ ).

Next, as shown in FIG. 5F, a metal, such as aluminum (Al), aluminum alloy (AlNd), or molybdenum (Mo), is deposited on the entire surface of the substrate 100 on which the gate insulating layer 120 is formed. The gate electrode 130 is formed. Thereafter, the LDD layer 115b is formed on the semiconductor layer 115 by n-doping on the substrate on which the gate electrode 130 is formed, and then the n-type ohmic contact layer 115c treated with n + doping through a mask process. ). At this time, although not shown, a p-type doped ohmic contact layer is formed through a mask process in the p-type thin film transistor of the driver CMOS. The semiconductor layer of the p-type thin film transistor does not form an LDD layer.

Next, as illustrated in FIG. 5G, an inorganic insulating material such as silicon nitride or silicon oxide is deposited on the substrate 100 on which the n-type ohmic contact layer 115c is formed, and then a semiconductor layer contact hole is formed by a mask process. An interlayer insulating film 140 having 145a and 145b is formed, a second metal material is deposited on the substrate 100 on which the interlayer insulating film 140 is formed, and then patterned by a mask process to contact the semiconductor layer. Source and drain electrodes 150 and 155 connected to the ohmic contact layer 115c are formed through the holes 145a and 145b. Thereafter, silicon nitride is deposited on the substrate 100 on which the source and drain electrodes 150 and 155 are formed, and a protective layer 160 having a drain contact hole 165 is formed by a mask process.

The following is not a process of manufacturing the switching element or the driving element of the driving circuit-integrated liquid crystal display device, but is briefly mentioned since it is related to the manufacturing of the switching element.

After forming the protective layer, indium tin oxide (ITO) is sequentially deposited on the substrate 100 on which the protective layer 160 is formed, and then drain electrode 155 through the drain contact hole 165 by a mask process. ) To form a pixel electrode 170.

In the present invention, in the crystallization of amorphous silicon to form a semiconductor layer of polysilicon by crystallization method, the raised point of the inevitably formed grain boundary region is inert to be used as the carrier gas of the PECVD equipment in the chamber of the PECVD equipment. After forming an atmosphere with helium (He) gas, which is a gas, plasma treatment is performed to planarize the surface of the semiconductor layer, and the atmosphere of the chamber is subsequently changed to a mixed gas atmosphere of silane (SiH 4) and nitrogen oxide (N 2 O), and then a PECVD process is performed. Proceeding to form a gate insulating film of silicon oxide. At this time, since the helium gas is an inert gas and does not react with other gases, there is no problem such as chamber contamination, and since the helium gas is used as a carrier gas of the PECVD equipment, it is possible to use the same chamber. Due to the above process, the plasma surface treatment by the reactive gas causes the process to be performed in different chambers to be performed in one chamber, thereby shortening the manufacturing time and increasing the process efficiency. It is possible to provide a method for manufacturing a drive element.

Claims (4)

Forming a buffer layer on the transparent insulating substrate; Forming an amorphous silicon film on the buffer layer over the buffer layer; Forming a polysilicon film crystallized from the amorphous silicon film by a crystallization method; Patterning the crystallized polysilicon film to form a semiconductor layer; Improving the surface roughness of the semiconductor layer by plasma-processing the substrate on which the semiconductor layer is formed in a chamber of helium (He) atmosphere; Forming a gate insulating film by evaporating the substrate having an improved surface of the semiconductor layer in the chamber; Depositing and patterning a metal material on the substrate on which the gate insulating film is formed to form a gate electrode Method of manufacturing a switching device or drive device of the liquid crystal display device integrated drive circuit comprising a. The method of claim 1, The plasma processing is a switching element or a method for manufacturing a driving element of a liquid crystal display integrated with a driving circuit which proceeds in a chamber of a PECVD apparatus using helium (He) as a purge or carrier gas. The method of claim 1, After the helium plasma treatment, the chamber is changed into a silane (SiH ₄ ) gas and a nitrogen oxide (N ₂ O) gas atmosphere. The method of claim 1, Doping the semiconductor layer after forming the gate electrode; Forming an interlayer insulating film over the doped semiconductor layer; Forming a source and a drain electrode on the interlayer insulating film; Forming a protective layer over the source and drain electrodes Method of manufacturing a switching device or drive device of the drive circuit-integrated liquid crystal display further comprising.