KR19990002738U - Semiconductor package - Google Patents

Abstract

The present invention discloses a semiconductor package that prevents warpage and voids in a package body that occurs as the size of a chip is reduced. The disclosed semiconductor package is configured by attaching a dam of a metal material to reduce the flow rate of the molding compound flowing into the lower predetermined portion of the inner lead. The reduction of chip size increases the flow rate of the molding compound to the lower package body part based on the lead frame. The structure of the molding compound on the upper and lower sides of the lead frame is formed by varying the size of the dam according to the degree of chip reduction. Make the flow velocity the same. This equalization of the flow velocity prevents the bending of the body portion and the generation of voids.

Description

Semiconductor package

The present invention relates to a semiconductor package, and more particularly to a semiconductor package in which the structure of the lead frame is changed.

Generally, in order to arrange and connect a unit tax designed in a chip manufacturing process of a semiconductor device, a wafer is sequentially performed, such as a selective introduction process of impurities into a predetermined portion of a semiconductor substrate, a lamination process of laminating an insulating layer and a conductive layer, and a pattern mask process. An integrated circuit is formed.

The integrated circuit chip thus formed is sent to an assembly process and packaged by proceeding in the order of chip cutting, chip attachment, wire bonding, mold, trimming and forming process.

1A and 1B are a plan view of a semiconductor package of a lock on chip (LOC) type having a lead frame 4 attached to a chip 2 according to a conventional embodiment, and FIGS. 2A and 2B are FIGS. It is sectional drawing along the horizontal direction of 1A and FIG. 1B.

2A and 2B, an inner lead of the lead frame 2 is attached to the semiconductor package 2 by a tape on the semiconductor chip 2, and a bonding pad (not shown) of the inner lead and the semiconductor chip 2 is wired. Bonded by (5). The part surrounding the structure in which the molding compound such as epoxy resin is wire bonded is the body part 8 of the package, and the body part 8 carries the molten epoxy resin from one side (gate) of the bonding structure installed in the molding die. It is formed by injecting.

With the development of semiconductor manufacturing technology, an increase in the degree of integration and miniaturization of the chip 6 has been achieved. As shown in Figs. 1A and 1B, when a semiconductor package is manufactured as a conventional lead frame structure without a solution for miniaturization of a chip size, a warpage of the package is caused. That is, as illustrated in FIGS. 2A and 2B, the flow of the molding compound toward the edge of the lower body portion of the package by the reduced length of the semiconductor chip is relatively faster than the flow of the upper body portion, thereby bending the package body portion. The molding compound proceeds to the figures of FIGS. 2A and 2B, where the flow rate of the molding compound at the edge portion is smaller because the width a of the portion where the chip is placed in the lower body of the package is smaller than the width b of the edge where the chip is not placed. Will be faster. Figure 3 shows the flow rate of the molding compound (MF _B ) according to the position in the lower body portion of the package, and shows that the flow rate of the edge side is higher than the center portion from the portion where the molding compound begins to flow into the bottom of the chip .

As such, the difference in the flow rate of the molding compound between the top and bottom of the package body changes the amount of the compound supplied to the upper and lower sides, thereby causing a warpage phenomenon.

In addition, the occurrence of warpage stresses the chip or the package and causes cracks in the package body. In addition, the flow velocity difference between the center and the edge may block the air vent to generate a void 10 as shown in FIG. 4.

Therefore, the present invention has been made to solve the above problems, by combining the reduction member to the lead frame to reduce the flow rate along the edge of the package body portion, the flow of the molding compound is increased according to the miniaturization of the chip, the bending phenomenon And to provide a semiconductor package that can prevent the generation of public.

1A and 1B are plan views illustrating a coupling state of a lead frame and a semiconductor chip according to a conventional embodiment.

2A and 2B are cross-sectional views of a lock type semiconductor package, according to a conventional embodiment;

3 is a diagram illustrating a traveling speed of a molding compound in a conventional semiconductor package.

4 is a plan view of a conventional semiconductor package.

5 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

6A to 6C are cross-sectional views illustrating a process of bonding the semiconductor package of FIG. 5.

FIG. 7 is a partial plan view of a leadframe constituting the semiconductor package of FIG. 5. FIG.

8A and 8B are longitudinal cross-sectional views of a conventional and inventive semiconductor package.

9 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention.

10 is a partial plan view of a leadframe according to another embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

22: semiconductor chip 24: inner lead

26, 52: Wire 28, 28a, 28b, 48: LOC tape

30, 50: Dam 54: Body part

According to the present invention, a semiconductor package includes a semiconductor chip having a bonding pad, a lead frame electrically connected to a bonding pad of the semiconductor chip, a predetermined portion of the lead frame and a package body part surrounding the semiconductor chip. And metal means for reducing the flow rate of the molding compound during molding along a predetermined portion of one side of the inner lead of the lead frame surrounded by the package body.

EXAMPLE

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention.

5 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

Referring to FIG. 5, in the semiconductor package of the present invention, the semiconductor chip 22 is attached to the end of the lower surface of the inner lead of the lead frame by a lead on chip (LOC) tape 28. Each bonding pad formed at the top is bonded by the inner lead and the wire 26 of the lead frame. At both edges of the reduced chip, a dam (Dam) 30 is provided as a deceleration means attached by the lock tape 28 to decelerate the flow rate of the injection molding compound. Since the dam 30 is a metal material and the deceleration degree varies according to its volume, the volume is determined by the degree of shrinkage of the chip and the volume of the package body on the upper and lower sides.

The bonding process of the semiconductor package having the above structure will be described with reference to FIGS. 6A to 6C.

Referring to FIG. 6A, a lock tape 27 for attaching a semiconductor chip is attached to an end of an inner lead of the lead frame 24, and a dam 30 is attached to a portion separated by a predetermined distance. The dam 30 is attached to the lock tape 28 in the state which attached the lock tape 28 for this. The state in which the lock tapes 27 and 28 are attached to the above process is illustrated in FIG. 7.

Referring to FIG. 6B, a die attaching step of attaching the upper surface on which the bonding pads of the semiconductor chip 22 are located to the lock tape 27 is performed. Then, as shown in FIG. 6C, a wire bonding process is performed in which the bonding pads of the semiconductor chips 22 and the inner leads of the lead frames are electrically connected using the wires 26.

After completion of the above bonding process, a molding process is performed to manufacture a semiconductor package as shown in FIG.

8A and 8B are diagrams illustrating the flow of a molding compound in the conventional case in which the dam 30 is not provided and in the present invention in which the dam 30 is provided, which are cut along the longitudinal direction of the semiconductor package. .

Referring to FIG. 8A, the molding compound flowing into the upper and lower portions of the lead frame through the gate G shows that the lower flow rate MF _B without the dam 30 is faster than the upper flow rate MF _T. . Reference A is an air vent.

Referring to FIG. 8B, the flow of the lower side of the molding compound flowing into the upper and lower portions of the lead frame through the gate G is impeded by the dam 30 so that the flow rate MF _T of the upper side is lower than this. It is balanced with the flow velocity (MF _B ) of the side.

FIG. 9 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention. The semiconductor package may include bonding pads of the semiconductor chip 42 with an inner lead of the lead frame 48 separated from the semiconductor chip 42. C) and each inner lead of the lead frame 48 are electrically connected by a wire 52.

Similarly, in the embodiment of FIG. 9, the dam 50 slows down the flow velocity toward the lower side of the package body portion 54 to make the flow rates of the molding compound on the upper and lower sides of the lead frame the same.

FIG. 10 illustrates another embodiment of attaching a lock tape to attach a dam 30. Unlike the case in which one tape shown in FIG. 7 is attached to all inner leads on one side, all inner leads on one side are attached. Is attached by separating the two tapes 28a and 28b. In this case, the dam 30 may also be separated into two.

As described above, the present invention is a deceleration means for reducing the flow rate of the inflowing molding compound, by forming a metal dam attached to the lower predetermined portion of the inner lid, the flow of the molding compound to the upper and lower sides of the lead frame Make the speed the same. This equalization of the flow velocity prevents the bending of the body portion and the generation of voids.

Although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.

Claims (5)

A semiconductor package comprising a semiconductor chip having a bonding pad formed thereon, a lead frame electrically connected to a bonding pad of the semiconductor chip, and a predetermined portion of the lead frame and a package body surrounding the semiconductor chip. And a deceleration means for reducing the flow rate of the molding compound during molding along a predetermined portion of one side of the inner lead of the lead frame surrounded by the upper and lower portions of the inner lead. The semiconductor package according to claim 1, wherein the deceleration means includes a metal member having a predetermined volume and an adhesive member for attaching the metal member to the inner lead. The semiconductor package of claim 1, wherein the adhesive member is a lock tape. The semiconductor package of claim 1, wherein a bonding pad of the semiconductor chip and each inner lead of the lead frame are electrically connected to each other by one side of the lead frame attached to a predetermined portion of the semiconductor chip. A semiconductor package comprising a lock type. The semiconductor package of claim 1, wherein a bonding pad of the semiconductor chip and each inner lead of the lead frame are electrically connected by wires while the inner lead of the lead frame is separated from the semiconductor chip. Semiconductor package.