KR19980026775A - Multi socket for semiconductor chip package inspection - Google Patents

Abstract

The present invention relates to a multi-socket for inspecting a semiconductor chip package capable of simultaneously inspecting electrical properties of a plurality of semiconductor chip packages, and having a plurality of openings through which a plurality of semiconductor chip packages can be inserted. A socket body having a lower body connected to the upper body by guides fastened to corners, the body being separated from the upper body; A plurality of socket leads fastened to the lower surface of the upper body and electrically connected to the leads of the semiconductor chip package; And a plurality of sockets formed on a lower surface of the lower body and including a plurality of circuit patterns for electrically connecting the socket leads to mount the plurality of semiconductor chip packages on the socket body of the multi-socket. Since the circuit patterns connecting the semiconductor chip packages are formed, the module test can be performed in the multi-socket before the module is manufactured. The socket leads are formed so as not to protrude outward from the socket body. There is an advantage that can remove the defects caused by.

Description

Multi socket for testing semiconductor chip package

The present invention relates to a socket for inspecting a semiconductor chip package, and more particularly, to a multi-socket for inspecting a semiconductor chip package having patterns for electrically connecting socket leads to a lower surface of the socket.

Generally, after the semiconductor chip package is manufactured, various tests are performed to confirm the reliability of the product.

The inspection is performed by connecting all the input and output terminals of the semiconductor chip with the test signal generation circuit to check normal operation and disconnection, and by connecting some input and output terminals such as a power input terminal of the semiconductor chip with the test signal generator to operate normally. There is a burn-in test that checks the life of a semiconductor chip and whether a bond occurs by applying stress at a temperature, voltage, and current higher than the condition.

Here, the process of inspecting the electrical characteristics of the semiconductor chip package is performed in the state that the semiconductor chip package is mounted on the inspection socket.

1 and 2 are cross-sectional views showing a state in which a semiconductor chip package according to the prior art is inserted into an inspection socket.

1 and 2, a structure in which electrical characteristics of a semiconductor chip package 10 is inspected using a semiconductor chip package inspection socket 70 (hereinafter, referred to as a socket) according to the related art is a tester (not shown). Socket leads 71 protruding from the lower surface of the socket 70 are inserted into the upper surface of the electrically connected test board 40 to be electrically connected to the circuit patterns on the test board 40, such as the picker 80. In the state in which the semiconductor chip package 10 transferred by the transfer means is inserted into the socket 70 and fixed, the test signal is applied from the tester to test the electrical characteristics of the semiconductor chip package 10.

Here, the socket 70 has a lower surface of which is laminated and fixed on the test substrate 40, and a lower body 75 having an upper surface on which the semiconductor chip package 10 is to be mounted. It is spaced on the lower body 75, is mechanically connected to the lower body 75 by guide bars (not shown) formed in each corner of the lower body 75, along the upper and lower guide bars It has a socket body formed of an upper body 73 that moves.

The upper body 73 has an opening so that the semiconductor chip package 10 may be inserted and mounted on the upper surface of the lower body 75.

In addition, the socket lead 71 is formed integrally with the electrical connection portion 71b protruding from the lower surface of the lower body 75, the electrical connection portion 71b, and an edge of the upper surface of the lower body 75. It is formed integrally with the lead connecting portion 71c in contact with the portion, the electrical connecting portion 71b and the lead connecting portion 71c, and has a fixing portion 71a inserted and fixed to the lower surface of the upper body 73. .

The picker 80 is positioned between the pressing portion 83 and the pressing portion 83 formed to correspond to the upper surface of the upper body 73 of the socket 70, and vacuums the semiconductor chip package 10. It has the adsorption part 85 conveyed by adsorption.

Here, referring to the structure in which the semiconductor chip package 10 is inserted into the socket 70 in more detail, when the picker 80 that has absorbed the semiconductor chip package 10 is lowered, the pressing unit 83 is connected to the socket. The upper surface of the upper body of the 73 is pressed, and the pressing portion 71a of the socket lead fastened to the lower surface of the upper body 73 by the pressing lowers the lead connecting portion 71c Spaced apart from the upper surface of the lower body 75.

In addition, the semiconductor chip package 10 adsorbed by the adsorption part 85 of the picker is dropped on the upper surface of the lower body 75.

Then, when the picker 80 is raised, the upper body 73 is restored to its original shape by the elasticity of the socket lead 71, and the lead connecting portion 71c is connected to the lead of the semiconductor chip package 10. do.

Here, when the mounting of the semiconductor chip package 10 is completed, the test signal sent from the tester is transmitted to the test substrate 40, and the socket lead 71 electrically connected to the test substrate 40 is the semiconductor chip package 10. It is delivered to the lead and the electrical property is checked.

A socket having such a structure has a structure in which a semiconductor chip package is caused by a loss of electrical connection of a socket lead when the socket lead is inserted into or detached from the test board because the socket leads protrude outwardly with respect to the socket body in order to be inserted into the test board. It may cause problems in the electrical property test.

The same type of semiconductor chip package is repeatedly tested in the socket.

Therefore, in the test of a module mounted with several kinds of semiconductor chip packages, the test can be performed in a module state in which the tested semiconductor chip package is mounted one by one. Since repairs must be performed in parallel, there is a problem in terms of yield and reliability.

Accordingly, an object of the present invention is to form a circuit pattern for connecting semiconductor chip packages to a socket, so that the module can be tested before being manufactured as a module, and the socket leads are formed so that they do not protrude outward from the socket body. An object of the present invention is to provide a multi-socket in which a circuit pattern capable of eliminating defects caused by loss is formed.

1 and 2 are cross-sectional views showing a state in which the semiconductor chip package according to the prior art is inserted into the inspection socket.

3 is a perspective view illustrating a state in which a multi-socket for inspecting a semiconductor chip package according to the present invention is inserted into a test socket;

4 is a bottom view illustrating a state in which patterns are formed on a lower surface of the socket for inspecting the semiconductor chip package of FIG. 3.

5 is a cross-sectional view taken along the line AA ′ of FIG. 3.

※ Description of the main parts of the drawings ※

110: semiconductor chip package 140: test socket

145: test pattern 150: tester

160: connection cable 170: multi socket

171: socket lead 172: circuit pattern

173: upper body 175: lower body

In order to achieve the above object, a plurality of semiconductor chip packages, the upper body is formed with a plurality of openings, each of which can be inserted, spaced apart from the upper body, the lower portion connected to the upper body by guides fastened to the corner portion A socket body having a body; A plurality of socket leads fastened to the lower surface of the upper body and electrically connected to the leads of the semiconductor chip package; And a circuit pattern formed on a bottom surface of the lower body, the circuit patterns electrically connecting the socket leads.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

3 is a perspective view illustrating a state in which a multi-socket for inspecting a semiconductor chip package according to the present invention is inserted into a test socket.

4 is a bottom view illustrating a state in which patterns are formed on a bottom surface of the socket for inspecting the semiconductor chip package of FIG. 3.

5 is a cross-sectional view taken along the line AA ′ of FIG. 3.

3 to 5, the multi-socket 170 (hereinafter, referred to as a multi-socket) for inspecting a semiconductor chip package according to the present invention may include a socket body 174 into which a plurality of semiconductor chip packages 110 may be inserted. It is fastened in the socket body 174 and has a socket lead 171 connected to the leads of the semiconductor chip package 110 to transmit an electrical signal, respectively, the socket leads 171 electrically The circuit patterns 172 connected to the test patterns 145 of the external test socket 140 have a structure formed on the bottom surface of the socket body 174.

In more detail, the socket body 174 is spaced apart from the upper body 173 and the upper body 173 having an opening through which the semiconductor chip package 110 can be inserted, and fastened to four corner portions. Has a lower body 175 connected by guide bars 176.

On the bottom surface of the lower body 173, circuit patterns 172 electrically connecting the socket leads 171 and electrically connected to the test patterns 145 of the test socket are formed.

The circuit patterns 172 have a structure in which a part of the circuit patterns 172 are extended to be formed at four neighboring side surfaces of the lower body 175.

Here, in the structure in which the electrical characteristic test of the semiconductor chip package 110 is performed, the multi-socket 170 into which the semiconductor chip packages 110 are inserted is inserted into the test socket 140.

Here, the test socket 140 has an opening in which the multi-socket 170 can be inserted, and has a structure in which test patterns 145 are formed on an inner side of the opening.

Therefore, when the multi-socket 170 is inserted into the test socket 140, the circuit patterns 172 and the test patterns 145 of the test socket are formed on four sides of the lower body 175 of the multi-socket 170. Each is electrically connected by mechanical connection.

The test patterns 145 of the test socket are electrically connected to the tester 150 by the connection cable 160.

Here, when the multi-socket 170 is inserted into the test socket 140, the test signal is applied from the tester 150 through the connection cable 170, and the test signal is transmitted to the test pattern 145 and the circuit pattern. The electrical characteristics of the semiconductor chip packages 110 are transferred to the leads of the semiconductor chip packages 110 through the 172 and the socket leads 171.

In addition, since the socket leads 171 directly connected to the leads of the semiconductor chip packages 110 are also electrically connected by the circuit patterns 172, the interconnections of the semiconductor chip packages 110 may be reduced. Electrical characterization is also possible.

The circuit pattern 172 may be designed according to the interconnection structure of the semiconductor chip packages 110.

In addition, the structure in which the semiconductor chip package 110 is inserted into and electrically connected to the multi-socket 170 has the same structure using the elastic force of the socket leads 171 of the multi-socket using the picker mentioned in the related art. (See Figures 1 and 2)

Here, the difference from the prior art is that the plurality of semiconductor chip package 110 is inserted into the multi-socket 170 at the same time.

Therefore, according to the structure of the present invention, a plurality of semiconductor chip packages can be mounted on the socket body of the multi-socket, and since the circuit patterns connecting the semiconductor chip packages are formed, the module test in the multi-socket before the manufacture of the module It can be, and the socket leads are formed so as not to protrude to the outside relative to the socket body has the advantage that can eliminate the defects caused by the loss of the socket lead (利 點).

Claims (3)

A socket body having an upper body having a plurality of openings into which a plurality of semiconductor chip packages can be inserted, the upper body being spaced apart from the upper body, and having a lower body connected to the upper body by guides fastened to corner portions; A plurality of socket leads fastened to the lower surface of the upper body and electrically connected to the leads of the semiconductor chip package; And And a circuit pattern formed on a lower surface of the lower body, the circuit patterns electrically connecting the socket leads. The multi-socket of claim 1, wherein the socket leads are exposed on a lower surface of the lower body. The semiconductor chip package inspection of claim 1, wherein a portion of the circuit patterns formed on the lower surface of the lower body is extended to four sides adjacent to the lower surface of the lower body. Multi socket.