KR19980020297A - Lead frame and semiconductor package using same - Google Patents

Abstract

The present invention relates to a semiconductor package in which a die pad for removing a die pad portion of a lead frame to which a chip is adhesively fixed and a die pad for adhesively fixing a chip with an extended tie bar is removed, the semiconductor chip having a plurality of bonding pads; A lead frame having leads formed against the bonding pads, a dam bar integrally formed across the leads, and a tie bar integrally extending from an edge portion of the leads; An adhesive for adhesively fixing the extended tie bar to an upper surface of a chip; Bonding wires electrically connecting the bonding pads and the leads and tie bars respectively; And a molding resin containing and encapsulating the chip and the electrical connection portion. Providing a semiconductor package, the die pad is removed, characterized in that it includes the defects such as voids and peeling phenomenon that occurred in the die pad and the adhesive, the wire length is reduced to prevent the defects such as wire bending ( There is 利 點).

Description

Lead frame and semiconductor package using same.

The present invention relates to a lead frame for mounting a semiconductor chip and a semiconductor package using the same, and more particularly, a die pad for removing a die pad portion of a lead frame in which a chip is adhesively fixed and adhesively fixing the chip with an extended tie bar. A semiconductor package is removed.

As the functionality of a chip increases, the number of input / output terminals of the chip increases, so that the number of leads for mounting increases proportionally. As such, packages that can accommodate an increased number of mounting leads include surface mount packages such as ball grid array packages, tape automated bonding (TAB) packages, quad flat packages (QFPs), and the like.

Among the packages, the package is most widely used in a wide range of fields since the 1980s and the present, and a package that is expected to increase in the future is a QFP having external leads in four directions.

Conventional lead frames used in QFPs having four-way surface mount external leads typically have as many internal leads as the number of external leads that are mounted and the die pads to which the chips are adhesively bonded and the tie bars that support them. The inner lead is arranged toward the die pad portion.

The problem of increasing the same number of inner leads as the number of external leads mounted is that the manufacturing limits and manufacturing quality of the inner lead of the lead frame and the resulting package manufacturing process, in particular wire bonding and molding Process quality and process productivity in the process.

Referring to the drawings, FIG. 1 is a plan view illustrating electrical connection between a lead frame for a QFP and a semiconductor chip according to the prior art, and FIG. 2 is an enlarged two-part view of FIG.

1 and 2 show that the chip 10 is adhesively fixed to the upper surface of the die pad 40 of the lead frame 50 with an adhesive (not shown), and the bonding pad 12 and the inner lead 52 are wired. It shows the state which is electrically connected by.

In addition, a tie bar 42 integrally formed to support the dam bar 56 and the die pad 40 integrally formed across the leads formed of the inner lead 52 and the outer lead 54 is formed for the QFP. The lead frame 50 is formed.

Thus, the most difficult problem when manufacturing a lead frame with a large number of leads is the difficulty of processing due to the fine spacing of the inner leads 52. As the number of leads increases and the package mounting density increases, miniaturization between leads becomes inevitable.

However, due to the manufacturing limitations of the lead frame machining punch that can cope with such miniaturization, there is a limit of miniaturization of the lead pitch.

Current lead frame manufacturing technology considers the internal lead pitch interval to be limited to 180㎛ considering production yield and quality.

Further, in a high temperature and high humidity environment, stress generated in the die pad increases, resulting in package cracks or fine peeling, which causes fatal package reliability failure. This shape occurs proportionately as the die pad area of the lead frame increases.

When bonding chips to die pads, liquid conductive or non-conductive adhesives are usually used, so they must be cured at a high temperature using a specially prepared device. Often, micro-delamination between pads occurs and seriously affects the reliability of a semiconductor package.

In addition, excessive amount of adhesive overflows to the upper surface of the chip to which the adhesive is bonded, causing the chip's electrical characteristics to be poor, and if the amount is too small, the adhesive strength with the chip is lowered and it is easily detached from the die pad. There is always a burden to maintain.

The wire used as the electrical connection means between the bonding pads and the inner leads is usually the longest in the inner lead adjacent to the tie bar, and if the wire is long, there is a disadvantage in that a defect such as bending or sagging of the wire generally occurs. .

The object of the present invention is to remove defects such as peeling and package cracks due to moisture absorption and voids generated between the die pad and the adhesive as described above, and to prevent warpage of wires caused by long wire lengths adjacent to tie bars. The present invention provides a lead frame shape for removing defects such as sag and increasing the density of mounting leads of a lead frame, thereby improving reliability of semiconductor products.

1 is a plan view showing the electrical connection of the lead frame and the semiconductor chip for QFP according to the prior art.

2 is an enlarged two-part view of FIG.

3 is a plan view showing a lead frame for a QFP in which the die pad is removed according to the present invention.

4 is an enlarged view of a portion of FIG. 3.

Figure 5 is a cross-sectional view showing the shape of the extended tie bar according to the present invention bonded to the chip upper surface.

Fig. 6 is a partially cutaway perspective view showing a semiconductor package using a lead frame according to the present invention.

Description of the main symbols in the drawings

10 chip 12 bonding pad

20: adhesive 30: wire

40: die pad 42: tie bar

44: extended tie bar 46: chip adhesive tie bar

50: lead frame 52: inner lead

54: external lead 56: dam bar

60: molding resin

A plurality of leads formed against the bonding pads formed on the upper surface of the chip to achieve the above object; A dam bar integrally formed across the lead; A tie bar integrally extending from the edge portion of the lead; Provided is a lead frame from which a die pad has been removed.

In addition, a semiconductor chip having a plurality of bonding pads to achieve the above another object; A lead frame having leads formed against the bonding pads, a dam bar integrally formed across the leads, and a tie bar integrally extending from an edge portion of the leads; An adhesive for adhesively fixing the extended tie bar to an upper surface of a chip; Bonding wires electrically connecting the bonding pads and the leads and tie bars respectively; And a molding resin containing and encapsulating the chip and the electrical connection portion. It provides a semiconductor package, the die pad is removed, characterized in that it comprises a.

Hereinafter, the present invention will be described in more detail with reference to the drawings.

3 is a plan view showing a lead frame for a QFP in which a die pad is removed according to the present invention, FIG. 4 is an enlarged view of a portion of FIG. 3, and FIG. 5 is a view in which an extended tie bar according to the present invention is bonded to a chip upper surface. It is sectional drawing to show.

First, FIG. 3 is formed radially toward the bonding pads 12 of the chip 10 to which the inner leads 52 integrally formed with the outer leads 54 are bonded, and the leads 52 and 54. A dam bar 56 integrally formed across the cross-section and a lead frame 50 extending in the direction of the top surface of the chip 10 integrally with the tie bar 44 at the corner portions of the leads 52 and 54 are shown.

4 and 5, the extended tie bar 44 integrally formed with the leads 52 at the edge portion of the lead frame may have a bonding pad 12 on the upper surface of the semiconductor chip 10. ) Is extended to the margin space of the upper surface of the chip 10, the electrical insulating adhesive 20 is applied to the lower surface of the chip 10 is fixed.

That is, the extended tie bars 44 and 46 serve to adhesively fix the chip to the lead frame 50 for wire bonding, and the extended tie bars 44 are divided into two in parallel. The tie bars 44 divided in parallel form a role of electrically connecting the bonding pads 12 formed at each corner of the chip 10.

As shown in the figure, the tie bar 44 serves to adhesively fix the chip 10 and to serve as a lead that is electrically connected to the bonding pad 12 to transmit an electrical signal.

The adhesive 20 may be adhesively fixed using an electrically insulating adhesive tape, and the adhesive method may be performed by a method similar to the method of adhesively fixing the inner leads to the upper surface of a chip in a general lead on chip package. Can be.

Therefore, the inner lead 52 immediately adjacent to the tie bar 44 according to the present invention is not arranged like other types of lead frame inner leads according to the prior art, and is directly connected to the tie bar 44. As a result of this structure, the total number of internal leads can be reduced to a maximum of eight.

As shown in FIG. 6, the semiconductor package using the lead frame according to the present invention is divided into two parts in parallel, and the tie bars 44 extending to the upper surface of the chip 10 are adhesively fixed to the margin area of the upper surface of the chip. In addition, the wire 30 electrically connects the tie bar 44 and the bonding pad 12, and the molding resin 60 encapsulates the electrical connection portion including the chip.

For example, in the case of a lead frame of a QFP having a package body size of 28 mm x 28 mm and 208 leads, there are 52 external leads and the same number of internal leads on one side of the package.

However, when the inner lead immediately adjacent to the tie bar is directly connected to the tie bar as in the present invention, two inner leads can be used on one side of the package, so that a total of eight inner leads can be connected to the tie bar on the four sides of the package, and thus the actual arrangement. The number of internal leads is 200.

Therefore, the semiconductor package using the lead frame having the tie bar with the die pad removed according to the present invention has the following advantages.

Since the extended tie bar is bonded to the chip top surface and plays an electrical role with the bonding pad, the wire bonding length is reduced to reduce the occurrence of defects such as wire bending, and the stability of the molding process can be improved due to the reduction of the wire bonding length.

By removing the die pad and the adhesive to fix the chip, it is possible to prevent the peeling phenomenon occurring between the die pad and the chip and the defects such as moisture absorption and voids of the adhesive, thereby improving the reliability of the semiconductor package.

As a means of bonding the extended tie bar to the upper surface of the chip, it is possible to use the adhesive tape and the method used in the lead-on chip package, and there is an advantage of using the existing equipment without adding new equipment and processes.

Claims (2)

A plurality of leads formed against a plurality of bonding pads formed on an upper surface of the chip; A dam bar integrally formed across the lead; And A tie bar extending from an edge portion of the lead toward the upper surface of the chip; Lead frame comprising a. The lead frame according to claim 1, wherein the extended tie bars are divided in parallel.