KR102853457B1 - 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들 - Google Patents

인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들

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Publication number
KR102853457B1
KR102853457B1 KR1020247022151A KR20247022151A KR102853457B1 KR 102853457 B1 KR102853457 B1 KR 102853457B1 KR 1020247022151 A KR1020247022151 A KR 1020247022151A KR 20247022151 A KR20247022151 A KR 20247022151A KR 102853457 B1 KR102853457 B1 KR 102853457B1
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node
bus
gateways
arbitration
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KR20240108580A (ko
Inventor
리차드 도미닉 위트펠트
막심 르끌레르
조지 앨런 와일리
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퀄컴 인코포레이티드
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
    • H04L43/0817—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking functioning

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Environmental & Geological Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Small-Scale Networks (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Bus Control (AREA)
KR1020247022151A 2015-09-10 2016-08-12 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들 Active KR102853457B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US14/850,104 2015-09-10
US14/850,104 US20170075843A1 (en) 2015-09-10 2015-09-10 Unified systems and methods for interchip and intrachip node communication
KR1020187009926A KR102704511B1 (ko) 2015-09-10 2016-08-12 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들
PCT/US2016/046728 WO2017044247A1 (en) 2015-09-10 2016-08-12 Unified systems and methods for interchip and intrachip node communication

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
KR1020187009926A Division KR102704511B1 (ko) 2015-09-10 2016-08-12 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들

Publications (2)

Publication Number Publication Date
KR20240108580A KR20240108580A (ko) 2024-07-09
KR102853457B1 true KR102853457B1 (ko) 2025-09-01

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Application Number Title Priority Date Filing Date
KR1020247022151A Active KR102853457B1 (ko) 2015-09-10 2016-08-12 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들
KR1020187009926A Active KR102704511B1 (ko) 2015-09-10 2016-08-12 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020187009926A Active KR102704511B1 (ko) 2015-09-10 2016-08-12 인터칩 및 인트라칩 노드 통신을 위한 통합된 시스템들 및 방법들

Country Status (7)

Country Link
US (2) US20170075843A1 (enExample)
EP (2) EP3347823A1 (enExample)
JP (1) JP6845224B2 (enExample)
KR (2) KR102853457B1 (enExample)
CN (1) CN108027792B (enExample)
BR (1) BR112018004715A2 (enExample)
WO (1) WO2017044247A1 (enExample)

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US20170075843A1 (en) 2015-09-10 2017-03-16 Qualcomm Incorporated Unified systems and methods for interchip and intrachip node communication
US10521392B2 (en) 2017-05-10 2019-12-31 Qualcomm Incorporated Slave master-write/read datagram payload extension
US20190227971A1 (en) * 2018-01-23 2019-07-25 Qualcomm Incorporated Architecture for consolidating multiple sources of low-bandwidth data over a serial bus
US11443713B2 (en) * 2020-01-30 2022-09-13 Apple Inc. Billboard for context information sharing
CN113296479B (zh) * 2020-06-17 2024-07-23 盒马(中国)有限公司 总线入网单元、输送线电气控制系统及部署方法
US11675713B2 (en) * 2021-04-02 2023-06-13 Micron Technology, Inc. Avoiding deadlock with a fabric having multiple systems on chip
JP2024120116A (ja) * 2021-05-10 2024-09-04 日本たばこ産業株式会社 エアロゾル生成装置の回路ユニット及びエアロゾル生成装置
CN115460128B (zh) * 2022-11-09 2023-07-07 之江实验室 一种面向多芯粒组合芯片的片上网络仿真系统

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US20070109015A1 (en) 2005-11-15 2007-05-17 Alcatel Switched integrated circuit connection architectures and techniques
US20070147359A1 (en) 2005-12-22 2007-06-28 Intel Corporation Method and apparatus for configuring at least one port in a switch to be an upstream port or a downstream port
JP2009021939A (ja) 2007-07-13 2009-01-29 Oki Electric Ind Co Ltd ノード情報収集システム、ネットワーク装置及びノード
US20130322462A1 (en) 2012-06-01 2013-12-05 Research In Motion Limited Universal synchronization engine based on probabilistic methods for guarantee of lock in multiformat audio systems
US20140149617A1 (en) 2012-11-27 2014-05-29 Hon Hai Precision Industry Co., Ltd. I2c bus structure and device availability query method

Also Published As

Publication number Publication date
CN108027792A (zh) 2018-05-11
JP2018528540A (ja) 2018-09-27
KR20240108580A (ko) 2024-07-09
US20170075843A1 (en) 2017-03-16
WO2017044247A1 (en) 2017-03-16
JP6845224B2 (ja) 2021-03-17
EP3347823A1 (en) 2018-07-18
EP4195058B1 (en) 2024-07-03
US20210326290A1 (en) 2021-10-21
CN108027792B (zh) 2021-08-20
EP4195058C0 (en) 2024-07-03
KR20180050727A (ko) 2018-05-15
BR112018004715A2 (pt) 2018-09-25
EP4195058A1 (en) 2023-06-14
US11720512B2 (en) 2023-08-08
KR102704511B1 (ko) 2024-09-06

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