KR102681069B1 - 파워-다운 모드들의 관리 - Google Patents

파워-다운 모드들의 관리 Download PDF

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Publication number
KR102681069B1
KR102681069B1 KR1020187010548A KR20187010548A KR102681069B1 KR 102681069 B1 KR102681069 B1 KR 102681069B1 KR 1020187010548 A KR1020187010548 A KR 1020187010548A KR 20187010548 A KR20187010548 A KR 20187010548A KR 102681069 B1 KR102681069 B1 KR 102681069B1
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South Korea
Prior art keywords
power
cores
modes
down modes
inrush current
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KR1020187010548A
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English (en)
Korean (ko)
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KR20180053732A (ko
Inventor
사바타 바네르지
라케시 미스라
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퀄컴 인코포레이티드
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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Power Sources (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
KR1020187010548A 2015-09-16 2016-08-30 파워-다운 모드들의 관리 Active KR102681069B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
IN4955/CHE/2015 2015-09-16
IN4955CH2015 2015-09-16
US15/010,237 2016-01-29
US15/010,237 US9886081B2 (en) 2015-09-16 2016-01-29 Managing power-down modes
PCT/US2016/049504 WO2017048503A2 (en) 2015-09-16 2016-08-30 Managing power-down modes

Publications (2)

Publication Number Publication Date
KR20180053732A KR20180053732A (ko) 2018-05-23
KR102681069B1 true KR102681069B1 (ko) 2024-07-02

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020187010548A Active KR102681069B1 (ko) 2015-09-16 2016-08-30 파워-다운 모드들의 관리

Country Status (6)

Country Link
US (1) US9886081B2 (enExample)
EP (1) EP3350669B1 (enExample)
JP (1) JP6859327B2 (enExample)
KR (1) KR102681069B1 (enExample)
CN (1) CN108027636B (enExample)
WO (1) WO2017048503A2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9568982B1 (en) * 2015-07-31 2017-02-14 International Business Machines Corporation Management of core power state transition in a microprocessor
US10025365B2 (en) * 2016-06-23 2018-07-17 Hewlett Packard Enterprise Development Lp Power courses based on current changes
US10185378B2 (en) * 2016-10-03 2019-01-22 Microsoft Technology Licensing, Llc Prioritized sequencing of device inrush current
JP2018136762A (ja) * 2017-02-22 2018-08-30 富士通株式会社 並列処理装置および並列処理装置の起動方法
US10423215B2 (en) * 2017-05-15 2019-09-24 Cavium, Llc Methods and apparatus for adaptive power profiling in a baseband processing system
US10466766B2 (en) * 2017-11-09 2019-11-05 Qualcomm Incorporated Grouping central processing unit memories based on dynamic clock and voltage scaling timing to improve dynamic/leakage power using array power multiplexers
US10948970B2 (en) * 2018-03-30 2021-03-16 Dialog Semiconductor B.V. Low power microcontroller
US10528292B2 (en) * 2018-05-22 2020-01-07 Luca De Santis Power down/power-loss memory controller
US20230367738A1 (en) * 2022-05-11 2023-11-16 Bae Systems Information And Electronic Systems Integration Inc. Asic power control

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100268917A1 (en) * 2009-04-17 2010-10-21 Lsi Corporation Systems and Methods for Ramped Power State Control in a Semiconductor Device
US20150058650A1 (en) * 2013-08-21 2015-02-26 Ankush Varma Forcing Core Low Power States In A Processor

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3878431B2 (ja) 2000-06-16 2007-02-07 株式会社ルネサステクノロジ 半導体集積回路装置
US7287170B2 (en) 2002-05-14 2007-10-23 Ati Technologies Inc. Method and apparatus for power management using system and request tokens
US7065663B2 (en) 2002-12-19 2006-06-20 Intel Corporation Methods and apparatus to control power state transitions
US7337334B2 (en) 2003-02-14 2008-02-26 International Business Machines Corporation Network processor power management
US7380038B2 (en) 2005-02-04 2008-05-27 Microsoft Corporation Priority registers for biasing access to shared resources
US7962771B2 (en) 2007-12-31 2011-06-14 Intel Corporation Method, system, and apparatus for rerouting interrupts in a multi-core processor
US9235251B2 (en) * 2010-01-11 2016-01-12 Qualcomm Incorporated Dynamic low power mode implementation for computing devices
US9600059B2 (en) 2010-09-20 2017-03-21 Apple Inc. Facilitating power management in a multi-core processor
US20130060555A1 (en) 2011-06-10 2013-03-07 Qualcomm Incorporated System and Apparatus Modeling Processor Workloads Using Virtual Pulse Chains
US8601300B2 (en) * 2011-09-21 2013-12-03 Qualcomm Incorporated System and method for managing thermal energy generation in a heterogeneous multi-core processor
US20130086395A1 (en) 2011-09-30 2013-04-04 Qualcomm Incorporated Multi-Core Microprocessor Reliability Optimization
US8990604B2 (en) 2011-10-14 2015-03-24 Apple Inc. Alternately sensing voltage on supply side or load side of a power gate of an electronic device and modifying feedback input of a power supply controlled by the power gate based on which side of the power gate is currently sensed
JP5786641B2 (ja) 2011-10-25 2015-09-30 富士通株式会社 携帯端末装置の制御方法、制御プログラム及び携帯端末装置
US9009451B2 (en) 2011-10-31 2015-04-14 Apple Inc. Instruction type issue throttling upon reaching threshold by adjusting counter increment amount for issued cycle and decrement amount for not issued cycle
US9411407B2 (en) 2012-12-12 2016-08-09 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Sequential power up of devices in a computing cluster based on relative commonality
EP2954385A1 (en) 2013-02-05 2015-12-16 Qualcomm Incorporated System and method for controlling central processing unit power with guaranteed transient deadlines
US9286223B2 (en) 2013-04-17 2016-03-15 Advanced Micro Devices, Inc. Merging demand load requests with prefetch load requests
KR102063716B1 (ko) * 2013-05-14 2020-02-11 삼성전자주식회사 데이터를 기반으로 전력을 관리하는 프로세싱 장치 및 그 장치를 이용한 방법
US9007122B2 (en) * 2013-06-05 2015-04-14 Via Technologies, Inc. Digital power gating with state retention
US9471088B2 (en) 2013-06-25 2016-10-18 Intel Corporation Restricting clock signal delivery in a processor
US20150149800A1 (en) 2013-11-27 2015-05-28 Alexander Gendler Performing an operating frequency change using a dynamic clock control technique
US20150169363A1 (en) 2013-12-18 2015-06-18 Qualcomm Incorporated Runtime Optimization of Multi-core System Designs for Increased Operating Life and Maximized Performance
US10114435B2 (en) 2013-12-23 2018-10-30 Intel Corporation Method and apparatus to control current transients in a processor
US9606605B2 (en) 2014-03-07 2017-03-28 Apple Inc. Dynamic voltage margin recovery

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100268917A1 (en) * 2009-04-17 2010-10-21 Lsi Corporation Systems and Methods for Ramped Power State Control in a Semiconductor Device
US20150058650A1 (en) * 2013-08-21 2015-02-26 Ankush Varma Forcing Core Low Power States In A Processor

Also Published As

Publication number Publication date
JP2018530824A (ja) 2018-10-18
KR20180053732A (ko) 2018-05-23
EP3350669B1 (en) 2025-04-09
CN108027636B (zh) 2021-01-05
US9886081B2 (en) 2018-02-06
US20170075408A1 (en) 2017-03-16
JP6859327B2 (ja) 2021-04-14
WO2017048503A2 (en) 2017-03-23
EP3350669A2 (en) 2018-07-25
WO2017048503A3 (en) 2017-06-22
CN108027636A (zh) 2018-05-11

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