KR102440270B1 - 고밀도 팬 아웃 패키지 구조 - Google Patents

고밀도 팬 아웃 패키지 구조 Download PDF

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KR102440270B1
KR102440270B1 KR1020177011236A KR20177011236A KR102440270B1 KR 102440270 B1 KR102440270 B1 KR 102440270B1 KR 1020177011236 A KR1020177011236 A KR 1020177011236A KR 20177011236 A KR20177011236 A KR 20177011236A KR 102440270 B1 KR102440270 B1 KR 102440270B1
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conductive
layer
conductive interconnect
barrier liner
package structure
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KR20170077133A (ko
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동욱 김
홍복 위
재식 이
시쿤 구
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퀄컴 인코포레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/09—Structure, shape, material or disposition of the bonding areas after the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Linear Motors (AREA)
  • Packages (AREA)
KR1020177011236A 2014-10-31 2015-09-04 고밀도 팬 아웃 패키지 구조 Active KR102440270B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201462073804P 2014-10-31 2014-10-31
US62/073,804 2014-10-31
US14/693,820 US10157823B2 (en) 2014-10-31 2015-04-22 High density fan out package structure
US14/693,820 2015-04-22
PCT/US2015/048514 WO2016069112A1 (en) 2014-10-31 2015-09-04 High density fan out package structure

Publications (2)

Publication Number Publication Date
KR20170077133A KR20170077133A (ko) 2017-07-05
KR102440270B1 true KR102440270B1 (ko) 2022-09-02

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Country Link
US (1) US10157823B2 (enExample)
EP (1) EP3213345B1 (enExample)
JP (1) JP6672285B2 (enExample)
KR (1) KR102440270B1 (enExample)
CN (1) CN107078119B (enExample)
BR (1) BR112017008727B1 (enExample)
SG (1) SG11201701990SA (enExample)
WO (1) WO2016069112A1 (enExample)

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US9728507B2 (en) * 2011-07-19 2017-08-08 Pfg Ip Llc Cap chip and reroute layer for stacked microelectronic module
US20170047276A1 (en) * 2015-08-13 2017-02-16 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US9761509B2 (en) * 2015-12-29 2017-09-12 United Microelectronics Corp. Semiconductor device with throgh-substrate via and method for fabrication the semiconductor device
US10141198B2 (en) * 2016-07-08 2018-11-27 Dyi-chung Hu Electronic package and manufacturing method thereof
KR102596788B1 (ko) 2016-12-30 2023-10-31 인텔 코포레이션 팬 아웃 스케일링을 위한 필러 및 비아 접속부를 구비한 고밀도 상호접속 층을 가진 패키지 기판
US10050021B1 (en) * 2017-02-16 2018-08-14 Nanya Technology Corporation Die device, semiconductor device and method for making the same
US11699651B2 (en) * 2017-10-23 2023-07-11 Applied Materials, Inc. Fan-out interconnect integration processes and structures
US10700207B2 (en) * 2017-11-30 2020-06-30 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device integrating backside power grid and related integrated circuit and fabrication method
DE102018127448B4 (de) 2017-11-30 2023-06-22 Taiwan Semiconductor Manufacturing Co. Ltd. Metallschienenleiter für nicht-planare Halbleiter-Bauelemente
US10804254B2 (en) 2018-06-29 2020-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out package with cavity substrate
US20200212536A1 (en) * 2018-12-31 2020-07-02 Texas Instruments Incorporated Wireless communication device with antenna on package
JP7335036B2 (ja) * 2019-03-29 2023-08-29 ラピスセミコンダクタ株式会社 半導体パッケージの製造方法
KR102615198B1 (ko) 2019-10-15 2023-12-18 삼성전자주식회사 반도체 패키지
KR102765303B1 (ko) 2019-12-31 2025-02-07 삼성전자주식회사 반도체 패키지
US12166003B2 (en) * 2020-04-03 2024-12-10 Macom Technology Solutions Holdings, Inc. RF amplifier devices including top side contacts and methods of manufacturing
US12500562B2 (en) 2020-04-03 2025-12-16 Macom Technology Solutions Holdings, Inc. RF amplifier devices and methods of manufacturing including modularized designs with flip chip interconnections
US11356070B2 (en) 2020-06-01 2022-06-07 Wolfspeed, Inc. RF amplifiers having shielded transmission line structures
US11302662B2 (en) * 2020-05-01 2022-04-12 Nanya Technology Corporation Semiconductor package with air gap and manufacturing method thereof
CN114743942A (zh) * 2021-01-07 2022-07-12 联华电子股份有限公司 混合式接合结构及其制作方法
US11682607B2 (en) * 2021-02-01 2023-06-20 Qualcomm Incorporated Package having a substrate comprising surface interconnects aligned with a surface of the substrate
KR20220126850A (ko) 2021-03-09 2022-09-19 삼성전자주식회사 반도체 패키지
CN117546291A (zh) * 2021-06-11 2024-02-09 株式会社村田制作所 半导体装置
US12148688B2 (en) 2023-02-13 2024-11-19 Dyi-chung Hu Semiconductor substrate and manufacturing method thereof
TWI884561B (zh) * 2023-02-13 2025-05-21 胡迪群 半導體基板及其製造方法

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Also Published As

Publication number Publication date
JP2017534177A (ja) 2017-11-16
CN107078119A (zh) 2017-08-18
BR112017008727A2 (pt) 2017-12-19
BR112017008727B1 (pt) 2022-06-28
CN107078119B (zh) 2021-05-14
EP3213345A1 (en) 2017-09-06
SG11201701990SA (en) 2017-05-30
US20160126173A1 (en) 2016-05-05
US10157823B2 (en) 2018-12-18
EP3213345B1 (en) 2021-01-13
KR20170077133A (ko) 2017-07-05
JP6672285B2 (ja) 2020-03-25
WO2016069112A1 (en) 2016-05-06

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