KR102404269B1 - Semiconductor device - Google Patents

Abstract

An embodiment includes a substrate; a buffer layer disposed on the substrate; and a semiconductor structure including a first conductivity type semiconductor layer disposed on the buffer layer, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, The buffer layer includes a plurality of insulating particles, the insulating particles include oxygen and nitrogen, and a ratio of the thickness of the buffer layer to the thickness of the insulating particles is 1:0.12 to 1:0.8.

Description

Semiconductor device {SEMICONDUCTOR DEVICE}

The embodiment relates to a semiconductor device.

A semiconductor device including a compound such as GaN or AlGaN has many advantages, such as having a wide and easily adjustable band gap energy, and thus can be used in various ways as a light emitting device, a light receiving device, and various diodes.

In particular, light emitting devices such as light emitting diodes or laser diodes using group 3-5 or group 2-6 compound semiconductor materials of semiconductors have developed red, green, and Various colors such as blue and ultraviolet light can be implemented, and efficient white light can be realized by using fluorescent materials or combining colors. , safety, and environmental friendliness.

In addition, when a light receiving device such as a photodetector or a solar cell is manufactured using a semiconductor group 3-5 or group 2-6 compound semiconductor material, it absorbs light in various wavelength ranges and generates a photocurrent. By doing so, light of various wavelength ranges from gamma rays to radio wavelength ranges can be used. In addition, it has the advantages of fast response speed, safety, environmental friendliness, and easy adjustment of device materials, so it can be easily used for power control or ultra-high frequency circuits or communication modules.

Therefore, the semiconductor device can replace a light emitting diode backlight, a fluorescent lamp or an incandescent light bulb that replaces a cold cathode fluorescence lamp (CCFL) constituting a transmission module of an optical communication means and a backlight of a liquid crystal display (LCD) display device. The application is expanding to include white light emitting diode lighting devices, automobile headlights and traffic lights, and sensors that detect gas or fire. In addition, the application of the semiconductor device may be extended to high-frequency application circuits, other power control devices, and communication modules.

A general semiconductor device uses a buffer layer to suppress the generation of dislocations due to a difference in lattice constant between a substrate and a semiconductor structure. However, when the buffer layer is grown, oxygen may be coupled to the Ga vacancy to form nanopipes. However, the nanopipe may deteriorate crystallinity and cause problems such as leakage current and electrostatic discharge (ESD).

The embodiment provides a semiconductor device with improved crystallinity.

In addition, there is provided a semiconductor device in which nanopipes are suppressed.

The problem to be solved in the embodiment is not limited thereto, and it will be said that the purpose or effect that can be grasped from the solving means or embodiment of the problem described below is also included.

A semiconductor device according to an embodiment of the present invention includes: a substrate; a buffer layer disposed on the substrate; and a semiconductor structure including a first conductivity type semiconductor layer disposed on the buffer layer, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, The buffer layer includes a plurality of insulating particles, and the insulating particles include oxygen and nitrogen.

The insulating particles may be disposed at an interface between the substrate and the buffer layer.

The insulating particles may be randomly dispersed in the buffer layer.

The insulating particles may include first insulating particles disposed at an interface between the substrate and the buffer layer, and second insulating particles randomly dispersed in the buffer layer.

The concentration of the first insulating particles may be higher than the concentration of the second insulating particles.

A ratio of the concentration of the second insulating particle to the concentration of the first insulating particle may be 1:10 to 1:100.

The insulating particles may include at least one of SiON, AlON, TiON, and MgON.

According to the embodiment, the crystallinity of the semiconductor device may be improved.

In addition, it is possible to suppress the nanopipes generated between the substrate and the semiconductor structure.

Various and advantageous advantages and effects of the present invention are not limited to the above, and will be more easily understood in the course of describing specific embodiments of the present invention.

1 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention;
Figure 2 is a TEM photograph of part A of Figure 1,
3 is a conceptual diagram of a semiconductor device according to another embodiment of the present invention;
4 is a conceptual diagram of a semiconductor device according to another embodiment of the present invention;
5A to 5E are diagrams illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention.

The present embodiments may be modified in other forms or various embodiments may be combined with each other, and the scope of the present invention is not limited to each of the embodiments described below.

Even if a matter described in a specific embodiment is not described in another embodiment, it may be understood as a description related to another embodiment unless a description contradicts or contradicts the matter in another embodiment.

For example, if a characteristic of configuration A is described in a specific embodiment and a feature of configuration B is described in another embodiment, the opposite or contradictory description is provided even if an embodiment in which configuration A and configuration B are combined is not explicitly described. Unless otherwise stated, it should be understood as belonging to the scope of the present invention.

In the description of the embodiment, in the case where one element is described as being formed in "on or under" of another element, on (above) or below (on) or under) includes both elements in which two elements are in direct contact with each other or one or more other elements are disposed between the two elements indirectly. In addition, when expressed as "up (up) or down (on or under)", it may include the meaning of not only an upward direction but also a downward direction based on one element.

Hereinafter, with reference to the accompanying drawings, embodiments of the present invention will be described in detail so that those of ordinary skill in the art to which the present invention pertains can easily implement them.

1 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a TEM photograph of a portion A of FIG. 1 .

Referring to FIG. 1 , a semiconductor device according to an embodiment of the present invention includes a substrate 101 , a buffer layer 102 disposed on the substrate 101 , and a semiconductor structure 110 disposed on the buffer layer 102 . includes

The substrate 101 includes a conductive substrate or an insulating substrate. The substrate 101 may be a carrier wafer or a material suitable for semiconductor material growth. The substrate 101 may be formed of a material selected from among sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto. The substrate may be removed as needed.

The buffer layer 102 may be disposed on the substrate 101 . The buffer layer 102 may relieve a lattice mismatch between the semiconductor structure 110 and the substrate 101 .

The buffer layer 102 may be a combination of Group III and Group V elements or may include any one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. The buffer layer 102 may be doped with a dopant, but is not limited thereto.

The buffer layer 102 may be grown as a single crystal on the substrate 101 , and the buffer layer 102 grown as a single crystal may improve crystallinity of the first conductivity type semiconductor layer 111 .

The insulating particles 103 may be formed between the substrate 101 and the buffer layer 102 . The insulating particles 103 may include at least one of SiON, AlON, TiON, and MgON. Since the insulating particles 103 have a relatively stable energy state, it is possible to suppress the occurrence of defects.

In the case of forming the GaN or AlGaN buffer layer, the nanopipe may be generated by bonding oxygen to the empty space of Ga. Oxygen may be supplied from the sapphire substrate. In the case of forming the insulating particles 103, since oxygen capable of binding to the empty space of Ga is used to form the insulating particles 103, the nanopipe may be reduced.

The size of the insulating particles 103 is not particularly limited. Illustratively, the average diameter (D50) of the insulating particles 103 may be 0.1 μm to 10 μm. The shape of the insulating particles 103 is not particularly limited. Illustratively, the insulating particles 103 may have at least one shape among clusters, irregularities, and embossing because Si, O, and N are combined in a complex form, and the surface may be irregular.

The insulating particles 103 may be formed at the interface between the substrate 101 and the buffer layer 102 . The insulating particles 103 may be formed at the initial stage of formation of the buffer layer 102 in order to remove residual oxygen. The insulating particles 103 may grow in a cluster form on the upper surface of the substrate 101 .

A ratio (d1:d2) of the thickness d1 of the buffer layer 102 to the thickness d2 of the insulating particles 103 may be 1:0.12 to 1:0.8. When the thickness ratio is smaller than 1:0.12, the size and concentration of the insulating particles 103 are small, so there is a problem that the nanopipe cannot be sufficiently suppressed. When the thickness ratio is larger than 1:0.8, the insulating particles 103 form a layer. Therefore, the growth of the buffer layer 102 may not be smooth. For example, the thickness of the buffer layer 102 may be 25 nm to 40 nm, and the thickness of the insulating particles 103 may be 5 nm to 20 nm.

A sub-buffer layer 105 may be further disposed on the buffer layer 102 . The sub-buffer layer 105 may be a combination of Group III and V elements or may include any one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. The sub-buffer layer 105 may not be doped with a dopant.

The semiconductor structure 110 includes a first conductivity type semiconductor layer 111 , a second conductivity type semiconductor layer 113 , and is disposed between the first conductivity type semiconductor layer 111 and the second conductivity type semiconductor layer 113 . and an active layer 112 .

The first conductivity-type semiconductor layer 111 may be implemented as a group III-V or group II-VI compound semiconductor, and may be doped with a first dopant. The first conductivity type semiconductor layer 111 is a semiconductor material having a composition formula of In _x1 Al _y1 Ga ₁ -x1 _-y1 N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1), e.g. For example, it may be selected from GaN, AlGaN, InGaN, InAlGaN, and the like. In addition, the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first conductivity-type semiconductor layer 111 doped with the first dopant may be an n-type semiconductor layer.

The active layer 112 is disposed between the first conductivity type semiconductor layer 111 and the second conductivity type semiconductor layer 113 . The active layer 112 is a layer in which electrons (or holes) injected through the first conductivity type semiconductor layer 111 and holes (or electrons) injected through the second conductivity type semiconductor layer 113 meet. The active layer 112 may transition to a low energy level as electrons and holes recombine, and may generate light having a wavelength of visible light or ultraviolet light.

The active layer 112 may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the active layer 112 may have a structure. ) structure is not limited thereto.

The second conductivity-type semiconductor layer 113 is formed on the active layer 112 , and may be implemented as a compound semiconductor such as III-V group or II-VI group, and is formed on the second conductivity-type semiconductor layer 113 with the second conductivity type semiconductor layer 113 . A dopant may be doped. The second conductivity type semiconductor layer 113 is a semiconductor material having a composition formula of In _x5 Al _y2 Ga _{1 -x5- y2} N (0≤x5≤1, 0≤y2≤1, 0≤x5+y2≤1) or AlInN , AlGaAs, GaP, GaAs, GaAsP, may be formed of a material selected from AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second conductivity-type semiconductor layer 113 doped with the second dopant may be a p-type semiconductor layer.

The electron blocking layer 114 is a semiconductor material having a composition formula of In _x1 Al _y1 Ga _{1 -x1- y1} N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1), for example, AlGaN , InGaN, InAlGaN, etc., but is not limited thereto. In the electron blocking layer 114 , a layer having a high aluminum composition and a layer having a low aluminum composition may be alternately disposed.

3 is a conceptual diagram of a semiconductor device according to another embodiment of the present invention, and FIG. 4 is a conceptual diagram of a semiconductor device according to another embodiment of the present invention.

Referring to FIG. 3 , the insulating particles 104 may be randomly dispersed in the buffer layer 102 . According to the embodiment, instead of forming insulating particles on the surface of the substrate 101 , oxygen generated from the surface of the substrate 101 diffuses into the buffer layer 102 when Ga and N are supplied to form the buffer layer 102 . can be In order to form the insulating particles, Ga and Si may be alternately supplied when the buffer layer is formed, but the present invention is not limited thereto.

Referring to FIG. 4 , the insulating particles 103 and 104 are first insulating particles 103 disposed at the interface between the substrate 101 and the buffer layer 102 , and second insulating particles randomly dispersed in the buffer layer 102 . particles 104 . In this case, the first insulating particles 103 may be formed by supplying a dopant at the initial stage of the formation of the buffer layer 102 . In addition, the second insulating particles 104 may be formed by diffusion of oxygen on the surface of the substrate 101 into the buffer layer 102 .

The concentration of the first insulating particles 103 may be higher than the concentration of the second insulating particles 104 . A ratio of the concentration of the second insulating particle 104 to the concentration of the first insulating particle 103 may be 1:10 to 1:100. When the concentration ratio is smaller than 1:10, the concentration of the first insulating particles 103 is reduced, and there is a problem in that oxygen bonded to the vacant site of Ga cannot be sufficiently removed. In addition, when the concentration ratio is greater than 1:100, the growth of the buffer layer 102 may be difficult because the concentration of the first insulating particles 103 is increased to form a layer.

The composition of the first insulating particle 103 and the composition of the second insulating particle 104 may be different. Exemplarily, the first insulating particles 103 may include Si supplied to remove oxygen, and the second insulating particles 104 may include Al supplied to form the buffer layer 102 . Exemplarily, the first insulating particle 103 may be SiON and the second insulating particle 104 may be AlON. However, the present invention is not necessarily limited thereto, and the types of the first insulating particles 103 and the second insulating particles 104 may be variously modified. In addition, the type of the first insulating particle 103 and the second insulating particle 104 may be the same.

The size of the first insulating particle 103 and the size of the second insulating particle 104 may be different. Exemplarily, at the initial stage of formation of the buffer layer 102 , a large amount of Si supplied to remove oxygen and a large amount of oxygen remaining on the surface of the substrate 101 combine to form a cluster, so the size of the first insulating particles 103 . may be relatively larger than the size of the second insulating particle 104 . However, the present invention is not necessarily limited thereto.

5A to 5E are views illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 5A , GaN clusters may be formed by supplying Ga and N on the substrate 101 first. The GaN cluster may be the seed forming the buffer layer 102 .

The substrate 101 includes a conductive substrate 101 or an insulating substrate 101 . The substrate 101 may be a carrier wafer or a material suitable for semiconductor material growth. The substrate 101 may be formed of a material selected from among sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto. If necessary, the substrate 101 may be removed.

Referring to FIG. 5B , the supply of Ga may be stopped and the dopant may be supplied. The dopant may be at least one of Si, Al, Ti, and Mg. At this time, N can be continuously supplied.

The supplied dopant and N may combine with oxygen to form the insulating particles 103 . The insulating particles 103 may include at least one of SiON, AlON, TiON, and MgON. Since the insulating particles 103 have a relatively stable energy state, it is possible to suppress the occurrence of defects such as nanopipes.

The insulating particles 103 may be formed at the interface between the substrate 101 and the buffer layer 102 . The insulating particles 103 may be formed at the initial stage of the formation of the buffer layer 102 in order to remove oxygen binding to the Ga vacancy. The insulating particles 103 may grow in a cluster form on the upper surface of the substrate 101 .

Referring to FIG. 5C , Ga may be supplied again to form the buffer layer 102 . The thickness of the buffer layer 102 is not particularly limited. In this case, the second insulating particles 104 may be further formed on the buffer layer 102 as shown in FIG. 5D . This is because oxygen remaining on the surface of the substrate 101 has diffused into the buffer layer 102 .

The second insulating particles 104 may be formed intentionally or may be formed unintentionally. When the second insulating particles are intentionally formed, Ga and a dopant may be alternately supplied. The supplied dopant may react with oxygen diffused into the buffer layer 102 to form the second insulating particles 104 .

If the buffer layer 102 is AlGaN, the second insulating particles 104 having a composition of AlON may be formed by combining Al with oxygen even without separately adding a dopant.

Thereafter, as shown in FIG. 5E , the sub-buffer layer 105 , the first conductivity type semiconductor layer 111 , the active layer 112 , the electron blocking layer 114 , and the second conductivity type semiconductor layer 113 on the buffer layer 102 . can be grown sequentially.

As described above, since the growth of the nanopipe is suppressed by the insulating particles 103 formed inside the buffer layer 102 , the crystallinity of the semiconductor structure 110 growing on the buffer layer 102 may be improved.

The semiconductor device may be used as a light source of a lighting system, or may be used as a light source of an image display device or a light source of a lighting device. That is, the semiconductor element may be applied to various electronic devices that are disposed in a case and provide light. For example, when a semiconductor device and RGB phosphor are mixed and used, white light having excellent color rendering properties (CRI) may be realized.

The above-described semiconductor device may be configured as a light emitting device package and may be used as a light source of a lighting system, for example, may be used as a light source of an image display device or a light source of a lighting device.

When used as a backlight unit of an image display device, it can be used as an edge-type backlight unit or as a direct-type backlight unit. may be

The light emitting device includes a laser diode in addition to the light emitting diode described above.

The laser diode may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer having the above-described structure in the same manner as the light emitting device. And, it uses the electro-lminescence phenomenon in which light is emitted when a current flows after bonding a p-type first conductivity type semiconductor and an n-type second conductivity type semiconductor. There is a difference in the direction and phase of light. That is, the laser diode uses a phenomenon called stimulated emission and constructive interference, so that light having one specific wavelength (monochromatic beam) can be emitted with the same phase and in the same direction. Therefore, it can be used for optical communication, medical equipment, and semiconductor processing equipment.

As the light receiving element, a photodetector, which is a kind of transducer that detects light and converts its intensity into an electrical signal, may be exemplified. As such a photodetector, a photovoltaic cell (silicon, selenium), an optical output device (cadmium sulfide, cadmium selenide), a photodiode (for example, a PD having a peak wavelength in a visible blind spectral region or a true blind spectral region), a photo A transistor, a photomultiplier tube, a phototube (vacuum, gas-filled), an IR (Infra-Red) detector, etc., but the embodiment is not limited thereto.

In addition, a semiconductor device such as a photodetector may be generally manufactured using a direct bandgap semiconductor having excellent light conversion efficiency. Alternatively, the photodetectors have various structures, and the most common structures include a pin-type photodetector using a p-n junction, a Schottky-type photodetector using a Schottky junction, and a Metal Semiconductor Metal (MSM) photodetector. have.

A photodiode may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer having the above-described structure in the same way as the light emitting device, and has a pn junction or pin structure. The photodiode operates by applying a reverse bias or zero bias, and when light is incident on the photodiode, electrons and holes are generated and a current flows. In this case, the magnitude of the current may be substantially proportional to the intensity of light incident on the photodiode.

A photovoltaic cell or solar cell is a type of photodiode, and may convert light into electric current. The solar cell may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer having the above-described structure, similarly to the light emitting device.

In addition, it may be used as a rectifier of an electronic circuit through the rectification characteristics of a general diode using a p-n junction, and may be applied to an oscillation circuit by being applied to a very high frequency circuit.

In addition, the above-described semiconductor device is not necessarily implemented only as a semiconductor, and may further include a metal material in some cases. For example, a semiconductor device such as a light-receiving device may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, and may be formed using a p-type or n-type dopant. It may be implemented using a doped semiconductor material or an intrinsic semiconductor material.

In the above, the embodiment has been mainly described, but this is only an example and does not limit the present invention, and those of ordinary skill in the art to which the present invention pertains are not exemplified above in the range that does not depart from the essential characteristics of the present embodiment. It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiment can be implemented by modification. And differences related to such modifications and applications should be construed as being included in the scope of the present invention defined in the appended claims.

Claims (7)

Board;
a buffer layer disposed on the substrate; and
A semiconductor structure comprising a first conductivity type semiconductor layer disposed on the buffer layer, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer,
The buffer layer includes a plurality of insulating particles,
The insulating particles contain oxygen and nitrogen,
The ratio of the thickness of the buffer layer to the thickness of the insulating particles is 1:0.12 to 1:0.8,
The insulating particle is a semiconductor device comprising a first insulating particle disposed at an interface between the substrate and the buffer layer, and second insulating particles randomly dispersed in the buffer layer.
delete delete delete The method of claim 1,
A semiconductor device wherein the concentration of the first insulating particles is higher than the concentration of the second insulating particles.
delete delete

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