KR102371134B1 - Printed wiring board and method for manufacturing same - Google Patents

Abstract

An object of the present invention is to provide a printed wiring board capable of reducing the generation of waste (a large amount of waste liquid) in the manufacturing process and shortening the manufacturing time. The printed wiring board 100 is formed by filling an insulating substrate 10, a through hole 11a formed through the insulating substrate 10, and a first conductive paste 1 in the through hole 11a. a first via 11 to be used, and a first wiring 21 provided on the insulating substrate 10 and connected to the first via 11 , wherein the first wiring 21 is the first via 11 . ) and a first seed layer 21a formed of a second conductive paste 2 as a base film of the first wiring 21 and a first electroless plating layer covering the first seed layer 21a (21b).

Description

A printed wiring board and its manufacturing method

The present invention relates to a printed wiring board (PWB) and a method for manufacturing the same, and more particularly, to a double-sided printed wiring board and a multilayer printed wiring board, and a method for manufacturing the same.

A printed wiring board is manufactured by the subtractive (subtractive) method of etching (corrosion) and patterning the copper foil of a board|substrate over a long time of more than 60 years, and it is calculating a very large amount of waste.

In addition, the design rule of the line width in the circuit of a printed wiring board differs with components, such as a semiconductor and a capacitor to be mounted, and there exist from the cutting-edge product of 20 micrometers or less to the general-purpose product of about 0.3 mm. Naturally, the printed wiring board has a wider line width and the larger the board, the greater the amount of waste liquid used in the developing process, the etching process and the peeling process. Currently, products with a line width of 0.1 mm or more occupy 80% of the market.

Moreover, there are many wastes in the manufacturing process of a printed wiring board not only the waste liquid of the etched copper, but the developing solution and stripping solution of the mask (resist) of the organic material for forming a pattern.

On the other hand, about 20 years ago, printed wiring boards were mass-produced by the Full Additive method, but circuits are formed by electroless plating, and since they are formed in a thickness of 1 µm per hour, plating growth rate was slow, and 20 hours or more of time was required for manufacture of a printed wiring board.

For example, in a conventional method for manufacturing a multilayer printed circuit board, an insulating layer is formed on the surface of an inner circuit board having an inner layer circuit, and a blind hole reaching the inner circuit is formed at a location connected to the inner circuit, The blind hole is filled with a conductive paste to form a via hole, an electroless plating layer is formed on the surface of the insulating layer in which the via hole is formed, a plating resist is formed thereon, and a conductor circuit is formed by electrolytic plating. The parts of are piled up, the plating resist is peeled, the electroless plating which existed under the plating resist is removed by etching (for example, refer patent document 1).

Further, the conventional method for manufacturing a wiring board includes a step of forming a via hole in an electrically insulating base material containing a thermosetting resin, a step of filling the via hole with a conductive paste made of conductive particles and a thermosetting resin, a hot pressing step of curing the electrically insulating substrate and the conductive paste by heating and pressing, and a step of forming a wiring electrically connected to the conductive paste, wherein in the step of forming the wiring, the electrically insulating substrate to form at least one plating wiring attached to and bonding to the conductive particles in the conductive paste (for example, refer to Patent Document 2).

Patent Document 1: Japanese Patent Application Laid-Open No. 2000-244126 Patent Document 2: Japanese Patent Application Laid-Open No. 2001-308534

The conventional manufacturing method of a multilayer printed wiring board has the subject that waste liquid arises in each process of formation and peeling of a plating resist, and etching removal of electroless plating.

In addition, the conventional method for manufacturing a wiring board includes a step of applying a photosensitive palladium catalyst to both sides of an electrically insulating substrate, a step of irradiating UV light through a photomask to activate the photosensitive palladium catalyst on the portion irradiated with UV light, , the process of removing the photosensitive palladium catalyst of the part which is not activated is required, and there exists a subject that manufacture of a wiring board requires a long time.

The present invention has been made to solve the problems described above, and there is no developing process, etching process and peeling process, and compared with a conventional printed wiring board, the generation of waste (a large amount of waste liquid) in the manufacturing process is reduced and Another object of the present invention is to provide a printed wiring board capable of reducing manufacturing time.

In the printed wiring board according to the present invention, an insulating substrate, a through hole formed through the insulating substrate, a first via formed by filling the through hole with a conductive paste, and provided on the insulating substrate, the first via a first wiring connected to the , the first wiring connected to the first via, a first seed layer formed of a conductive paste as a base film of the first wiring, and covering the first seed layer a first electroless plating layer of the first wiring, wherein the first seed layer of the first wiring is provided only on a peripheral edge portion on the first via, and the first electroless plating layer of the first wiring comprises: It contacts the first via in the central region.

Compared with the conventional printed wiring board, the disclosed printed wiring board can reduce generation|occurrence|production of the waste liquid in a manufacturing process, and can acquire the effect that manufacturing time can be shortened.

Fig. 1 (a) is a perspective view showing an example of a schematic configuration of a printed wiring board according to the first embodiment, and Fig. 1 (b) is an arrow AA' of the printed wiring board shown in Fig. 1 (a). It is a cross section of a line.
Fig. 2 is a cross-sectional view corresponding to Fig. 1 (b) for explaining the method for manufacturing a printed wiring board according to the first embodiment, Fig. 2 (a) is a cross-sectional view showing an insulating substrate, Fig. 2 (b) ) is a cross-sectional view illustrating a state in which a through-hole is formed, FIG. 2C is a cross-sectional view illustrating a state in which the first conductive paste is filled, and FIG. 2D is a first seed layer formed on the surface of the insulating substrate. It is a cross-sectional view showing the formed state, and FIG. 2E is a cross-sectional view showing a state in which the first seed layer is formed on the back surface of the insulating substrate.
Fig. 3 is a cross-sectional view for explaining a conventional method for manufacturing a printed wiring board, Fig. 3 (a) is a cross-sectional view showing an insulating substrate, Fig. 3 (b) is a cross-sectional view showing a through-hole forming process, Fig. 3 (c) is a cross-sectional view illustrating the electroless plating process, FIG. 3(d) is a cross-sectional view illustrating the electrolytic plating process, and FIG. 3(e) is a cross-sectional view illustrating the mask bonding process.
Fig. 4 is a cross-sectional view for explaining the continuation of the conventional method for manufacturing a printed wiring board shown in Fig. 3, Fig. 4 (a) is a cross-sectional view showing the double-sided exposure process, Fig. 4 (b) is a developing process It is a cross-sectional view, FIG. 4(c) is a cross-sectional view showing an etching process, and FIG. 4(d) is a cross-sectional view showing a mask peeling process.
Fig. 5 (a) is a plan view showing another example of the vicinity of a first buyer according to the first embodiment, and Fig. 5 (b) is a print corresponding to the vicinity of the first buyer shown in Fig. 5 (a). It is a cross-sectional view of a state in which a first seed layer is formed on a wiring board, and Fig. 5 (c) is a first electroless plating layer formed on a printed wiring board corresponding to the vicinity of the first via shown in Fig. 5 (a). It is a cross-sectional view of the state.
Fig. 6 is a cross-sectional view for explaining a method for manufacturing a printed wiring board according to the second embodiment, Fig. 6 (a) is a cross-sectional view showing an insulating substrate, and Fig. 6 (b) is a state in which a through hole is formed. 6(c) is a cross-sectional view illustrating a state in which the first conductive paste is filled, and FIG. 6(d) is a cross-sectional view illustrating a state in which a first seed layer is formed on both surfaces of an insulating substrate, FIG. 6(e) is a cross-sectional view illustrating a state in which the second electroless plating layer is formed on the first seed layer.
Fig. 7 is a cross-sectional view for explaining the continuation of the method for manufacturing a printed wiring board shown in Fig. 6, Fig. 7 (a) is a cross-sectional view showing a state in which an insulating layer is formed on the surface of an insulating base material, Fig. 7 (b) ) is a cross-sectional view showing a state in which an insulating layer is formed on the back surface of an insulating substrate, (c) of FIG. d) is a cross-sectional view showing a state in which the third conductive paste is filled in the opening on the back side of the insulating substrate.
Fig. 8 is a cross-sectional view for explaining the continuation of the method for manufacturing the printed wiring board shown in Fig. 7, Fig. 8 (a) is a cross-sectional view showing a state in which a second seed layer is formed on the surface side of the insulating substrate (b) is a cross-sectional view illustrating a state in which the second seed layer is formed on the back side of the insulating substrate, and (c) is a cross-sectional view illustrating a state in which a second electroless plating layer is formed on the second seed layer. .
Fig. 9A is a cross-sectional view showing another example of the schematic configuration of the printed wiring board according to the second embodiment, and Fig. 9B is another schematic configuration of the printed wiring board according to the third embodiment. It is a cross-sectional view showing an example.
Fig. 10 is a cross-sectional view for explaining a method of manufacturing a printed wiring board according to the third embodiment, and Fig. 10 (a) is a cross-sectional view showing a state in which a third seed layer is formed on the surface side of an insulating substrate; (b) is a cross-sectional view illustrating a state in which a third seed layer is formed on the back side of the insulating substrate, and (c) of FIG. 10 is a third electroless plating layer formed on the third seed layer and the first electroless plating layer It is a cross-sectional view showing a state.

(First embodiment of the present invention)

The printed wiring board 100 according to the present embodiment is a double-sided printed wiring board (double-sided board), and broadly divided, as shown in FIG. 1 , an insulating substrate 10 and a penetration formed by penetrating the insulating substrate 10 . A hole 11a, a via (hereinafter referred to as the first via 11) formed by filling the through hole 11a with a conductive paste (hereinafter, referred to as the first conductive paste 1), and an insulating substrate A wiring (hereinafter referred to as a first wiring 21 ) provided on the 10 and connected to the first via 11 is included.

Further, the first wiring 21 is connected to the first via 11 and is applied to a conductive paste (hereinafter referred to as a second conductive paste 2) as a base film (plating catalyst layer) of the first wiring 21 . a seed layer (hereinafter, referred to as a first seed layer 21a) formed by .

Incidentally, the insulating substrate 10 according to the present embodiment uses a substrate made of a glass epoxy resin. However, as long as it is an insulating material, it is not limited to a glass epoxy resin. For example, polyimide or ceramics is used as a material. It may be a board|substrate.

In addition, although an epoxy resin is used as a resin component in the 1st electrically conductive paste 1 and 2nd electrically conductive paste 2 which concern on this embodiment, 1 or more types of an acrylate resin, an alkyd resin, a melamine resin, or a xylene resin. may be mixed with an epoxy resin.

Further, the first conductive paste 1 and the second conductive paste 2 are conductive particles of one type of metal powder (eg, gold (Au), silver (Ag), copper (Cu) or nickel (Ni)). For example, only copper and silver), a compound (alloy) that combines two or more metals, or a mixture of two or more kinds of metal powder [e.g., a mixture of copper and silver, copper and silver and other Blending of metals, blending of copper and silver with solder particles (eg, tin/silver-based, tin/bismuth-based, etc.)] or metal powder coated with one type of metal with another type of metal.

In particular, in the case of mixing copper and silver with solder particles, it is referred to as a metallized paste, and is alloyed with copper foil at a low temperature (near 160°C) to express stable conductivity. Further, in the case of mixing copper and silver with solder particles, the bulky portion is alloyed, the melting point shifts to the high temperature side (260° C. or higher), and the heat resistance reliability is improved.

In the first conductive paste 1 and the second conductive paste 2, a phenol-based curing agent, an imidazole-based curing agent, a cationic curing agent, or a radical-based curing agent is used as a curing agent, and an antifoaming agent is used as an additive.劑), a thickener (增粘劑) or an adhesive may be added.

And in the present embodiment, the first conductive paste 1 and the second conductive paste 2 are provided with a metal filler manufactured by TATSUTA ELECTRIC WIRE & CABLE CO., LTD. ( A mixture of conductive particles and an insulating material such as an epoxy resin), copper metal powder is used as the conductive particles of the first conductive paste 1 of the first via 11, and the first seed layer 21a ) as the conductive particles of the second conductive paste 2, silver metal powder is used.

In particular, the conductive particles of the first conductive paste 1 of the first via 11 and the conductive particles of the second conductive paste 2 of the first seed layer 21a have one or more metal compositions. ), a plurality of types of metal blending, or a combination of a metal composition and a metal blending is preferably approximately the same. As a result, the affinity between the first conductive paste 1 and the second conductive paste 2 is increased, the bond between the first via 11 and the first seed layer 21a is strengthened, and the first wiring 21 . Due to the anchor function of the first via 11 to , peeling of the first wiring 21 from the insulating base 10 can be prevented.

In addition, the average particle diameter of the conductive particles in the second conductive paste 2 needs to be 20 μm or less in order to make the first seed layer 21a a low film thickness of 20 μm or less. , The average particle diameter of the conductive particles in the first conductive paste 1 is not required to be 20 µm or less since the diameter of the first via 11 is about 0.2 mm to 0.3 mm.

That is, in the printed wiring board 100 according to the present embodiment, the average particle diameter of the conductive particles in the second conductive paste 2 of the first seed layer 21a is the first of the first vias 11 . It is also characterized by being smaller than the average particle diameter of the electroconductive particle in the electrically conductive paste 1 .

Further, since the first conductive paste 1 is filled in the through-holes 11a, only the conductive particles having a large particle diameter increase the distance between the adjacent conductive particles, and the conduction state of the first via 11 . may become insufficient. Therefore, in the first conductive paste 1, in addition to conductive particles having a large particle diameter, conductive particles having a small particle diameter are mixed, thereby allowing conductive particles having a small particle diameter to enter between the conductive particles having a large particle diameter, so that the first buyer ( 11), while ensuring the conduction state, it is also possible to adjust the overall viscosity.

That is, in the printed wiring board 100 according to the present embodiment, the uniformity of the particle diameter of the conductive particles in the first conductive paste 1 of the first via 11 is the first of the first seed layer 21a. It is also characterized by being lower than the uniformity of the particle diameter of the electroconductive particle in 2 electrically conductive paste 2 .

In addition, the first conductive paste 1 and the second conductive paste 2 include, for example, a conductive polymer (conductive polymer) such as polyacetylene, polyaniline, polypyrrole or polythiophene instead of the conductive metal paste described above. You may use it.

In particular, the conductive polymer is an organic material close to the glass epoxy resin, which is the material of the insulating substrate 10 , and has substantially the same thermal properties and approximates the coefficient of thermal expansion. Therefore, as the first conductive paste 1 , the conductive polymer is By using , the elongation rate of the insulating base material 10 and the first via 11 is approximated even under a high temperature generated when components are mounted on the printed wiring board 100, and the printed wiring board 100 due to distortion. problems can be prevented.

In addition, the 1st electroless plating layer 21b which concerns on this embodiment consists of electroless copper plating, and the OKUNO CHEMICAL INDUSTRIES CO., LTD. electroless for independent circuit boards is made. Copper plating solution "OPC kappa-NCA" is used for electroless plating process.

In addition, the electroless copper plating solution for independent circuit board "OPC Kappa-NCA" can grow a copper plating film thickness of about 6.0 μm per hour, and compared with the conventional electroless copper plating solution, the silver paste of the electroless plating solution It is possible to significantly improve the precipitation rate for

In particular, as the first wiring 21 constituting the circuit, a thickness of 20 μm or more is required, and by using the electroless copper plating solution “OPC Kappa-NCA” for independent circuit boards, the first electroless copper plating solution of 15 μm or more within 3 hours The plating layer 21b can be formed, which is useful.

Next, the manufacturing method of the printed wiring board 100 is demonstrated with reference to FIG.

First, a through-hole 11a of about 0.2 mm to 0.3 mm is formed in the insulating base 10 by drilling, punching, or laser processing (refer to Fig. 2(b), through-hole forming step).

Then, a screen printing plate (not shown) opened with an oil agent in accordance with the formation position of the through-hole 11a on the surface of the insulating substrate 10 is disposed opposite to the insulating substrate 10, and conductive ink [First conductive paste (1)] is applied on a screen printing plate.

A screen printing machine (not shown) slides a squeegee on the surface of the screen printing plate, presses the screen printing plate against the insulating substrate 10, and through the opening of the screen printing plate, conductive ink (first conductive paste 1) ] is discharged, and the through hole 11a of the insulating substrate 10 is filled.

In the screen printing according to the present embodiment, high-strength screen mesh "HS-D500 mesh" manufactured by ASADA MESH CO., LTD. (the number of meshes: 500 mesh, wire diameter: 19 µm) is applied to In contrast, a screen printing plate opened with an oil agent is used.

Then, after thermosetting (drying) the first conductive paste 1 in a curing furnace of 100 to 200 for 30 minutes to 120 minutes, the cured product protruding from both surfaces (front and back surfaces) of the insulating substrate 10 is subjected to polishing. removed to form the first via 11 (refer to Fig. 2(c), first via formation step).

Then, a screen printing plate (not shown) formed with an oil agent to match the formation position of the first wiring 21 (first seed layer 21a) on the surface of the insulating substrate 10 is applied to the insulating substrate 10 . They are arranged to face each other, and a conductive ink (second conductive paste 2) is applied on a screen printing plate.

A screen printing machine (not shown) slides a squeegee on the surface of the screen printing plate, presses the screen printing plate against the insulating substrate 10, and discharges conductive ink (second conductive paste 2) through the opening of the screen printing plate. and applied to the surface of the insulating substrate 10 in a line shape.

In the screen printing according to the present embodiment, a high-strength screen mesh "HS-D500 mesh" manufactured by Asada Mesh Co., Ltd. (Number of meshes: 500 mesh, wire diameter: 19 µm) is opened with an oil agent for a screen printing plate. is using The high-strength screen mesh "HS-D500 mesh" has a high strength of the screen mesh that contributes to dimensional stability in pattern formation, and can form the first seed layer 21a having a line width of about 0.1 mm.

Then, the second conductive paste 2 is thermally cured (dried) in a curing furnace at 100° C. to 200° C. for 30 minutes to 120 minutes, and a first seed layer 21a is formed as a base film of the first wiring 21 . (refer to FIG. 2(d), first seed layer forming process).

Then, in the first seed layer forming step, after the first seed layer 21a is formed on the surface side of the insulating substrate 10 , the insulating substrate 10 is turned over to produce the same as on the surface side of the insulating substrate 10 . According to the process, the first seed layer 21a is formed on the back side of the insulating substrate 10 (refer to Fig. 2(e)).

Then, for example, the first seed layer is subjected to an electroless plating process including a degreasing process, a pre-dip process, a palladium (Pd) substitution process, a palladium residue removal process, and an electroless copper plating process. A first electroless plating layer 21b is grown on (21a) (see Fig. 1(b), first electroless plating layer forming step).

In the degreasing step according to the present embodiment, using a chemical "OIC cleaner" manufactured by Okuno Seiyaku Kogyo Co., Ltd., immersed in a chemical solution at 25° C. for 3 minutes, and both surfaces (front and back surfaces) of the insulating substrate 10 ) is cleaned.

In the pre-dip process according to the present embodiment, using the chemical "OIC pre-dip" manufactured by Okuno Seiyaku Kogyo Co., Ltd., it is immersed in a chemical solution at 25° C. for 30 seconds, and the insulating substrate 10 (first seed) The affinity between the layer 21a] and palladium is increased.

In addition, the palladium substitution treatment process which concerns on this embodiment is immersed in the chemical|medical solution at 25 degreeC for 3 minutes using the chemical|medical solution "OIC Accera" manufactured by Okuno Seiyaku Kogyo Co., Ltd., and palladium on the insulating base material 10 to adsorb

In the palladium residue removal step according to the present embodiment, the chemical solution “OIC Postdip” manufactured by Okuno Seiyaku Kogyo Co., Ltd. is used and immersed in a chemical solution at 25° C. for 1 minute, 1 Palladium is removed from the base portion other than the seed layer 21a.

In the electroless copper plating process according to the present embodiment, using the chemical "OPC Kappa-NCA (high-speed type") manufactured by Okuno Seiyaku Kogyo Co., Ltd., immersed in a chemical solution at 55° C. for 180 minutes, and added to the plating solution Copper (first electroless plating layer 21b) is deposited on the palladium catalyst particles adsorbed to the surface of the first seed layer 21a by a reduction reaction of copper ions by a reducing agent to form the first wiring 21 do.

Then, in order to form an electrode (not shown) connected to the first wiring 21 , a resist mask is placed on the insulating substrate 10 (first wiring 21 ) except for the electrode formation position. Then, electroless nickel/gold plating is performed using the first electroless plating layer 21b of the first wiring 21 as a base film to form an electroless nickel/gold plating layer (electrode).

Through the above process, the printed wiring board 100 which concerns on this embodiment is completed.

Here, in the conventional printed wiring board 200 using the subtractive method, the copper foil 201a is adhered to the entire surface of both surfaces (front and back) of the insulating substrate 201 (see Fig. 3 (a)). It is formed by the known manufacturing process shown in FIGS. 3 and 4 using . 3 and 4, reference numeral "202" denotes a through hole, reference numeral "203" denotes an electroless plating layer, reference numeral "204" denotes an electrolytic plating layer, reference numeral "205" denotes a resist, and reference numeral "206" is a mask

In the conventional manufacturing method of the printed wiring board 200, for example, the processing time of the electroless plating process (FIG. 3(c)) is 40 minutes, and the processing time of the electrolytic plating process (FIG. 3(d)) is, for example, 60 minutes, the processing time of the mask bonding process [FIG. 3(e)] is 20 minutes, the processing time of the exposure (double-sided) process [FIG. 4(a)] is 30 minutes, the developing process [FIG. b)] processing time is 10 minutes, the processing time of the etching process (FIG. 4(c)] is 10 minutes, and the processing time of the mask peeling process (FIG. 4(d)) is 10 minutes.

That is, in the original method of manufacturing the printed wiring board 200, the manufacturing time (excluding the through-hole forming process (FIG. 3(b))) is 180 minutes, and there are a developing process, an etching process, and a mask removing process. , waste fluid is generated.

On the other hand, in the manufacturing method of the printed wiring board 100 which concerns on this embodiment, the 1st conductive paste 1 is printed, the through-hole 11a is filled, and the 1st conductive paste 1 is dried and the 1st buyer The processing time of the first via formation step (hole filling printing/drying, Fig. 2(c)) for forming (11) is 30 minutes. In addition, a first seed layer (face) forming process (seed layer (face) printing and drying) of printing and drying the second conductive paste 2 on the surface of the insulating substrate 10 to form the first seed layer 21a , FIG. 2(d)], the processing time is 30 minutes, and the first seed layer for forming the first seed layer 21a by printing and drying the second conductive paste 2 on the back surface of the insulating substrate 10 . (Plan) The processing time of the formation process (seed layer (plan) printing and drying, FIG.2(e)] is 30 minutes. Further, a first electroless plating layer forming step (electroless plating, in FIG. 1 ) of performing electroless copper plating on the insulating substrate 10 and forming a first electroless plating layer 21b on the first seed layer 21a The processing time of (b)] is 80 minutes.

That is, in the manufacturing method of the printed wiring board 100 which concerns on this embodiment, the manufacturing time (excluding a through-hole formation process (FIG.2(b))) is 170 minutes, and the conventional print using a subtractive construction method It is shorter than the manufacturing time of the wiring board 200, and there is no development process, etching process, and mask removal process, so that waste liquid is not generated.

As described above, the printed wiring board 100 according to the present embodiment includes the first conductive paste 1 serving as the first via 11 and the first conductive paste 1 serving as the first seed layer 21a of the first wiring 21 . 2 By forming the conductive paste 2 by screen printing and forming the first electroless plating layer 21b of the first wiring 21 by electroless plating, the process associated with the etching process can be eliminated, so that a simple production process can be realized.

Moreover, the manufacturing method of the printed wiring board 100 which concerns on this embodiment can reduce the waste liquid compared with the manufacturing method of the conventional printed wiring board, improve copper utilization, and also a developing process, an etching process, and Since the manufacturing apparatus used for a peeling process becomes unnecessary, an equipment cost and a production space can be reduced.

And as shown in FIG. 1, the printed wiring board 100 which concerns on this embodiment is on the 1st via 11 (through hole 11a) on the front surface and the back surface of the insulating base material 10, The second conductive paste 2 serving as the first seed layer 21a is applied to the entire surface, and the first electroless plating layer 21b indirectly contacts the first via 11 through the first seed layer 21a. However, it is not limited to the said layer structure.

For example, the printed wiring board 100 is, as shown in FIGS. 5A and 5B , on the first via 11 on the front and back surfaces of the insulating base 10, The second conductive paste 2 serving as the first seed layer 21a may be applied only to the peripheral edge portions except for the central region of the first via 11 .

In this case, as shown in FIG. 5C , in the central region on the first via 11 on the front and back surfaces of the insulating substrate 10 , the first conductive paste 1 is coated with the first electroless As a base film of the plating layer 21b, the first electroless plating layer 21b is in direct contact with the first via 11 .

(Second embodiment of the present invention)

Fig. 6 is a cross-sectional view for explaining a method for manufacturing a printed wiring board according to the second embodiment, Fig. 6 (a) is a cross-sectional view showing an insulating substrate, Fig. 6 (b) is a state in which a through hole is formed 6 (c) is a cross-sectional view illustrating a state in which the first conductive paste is filled, and FIG. 6 (d) is a cross-sectional view illustrating a state in which a first seed layer is formed on both surfaces of an insulating substrate, and FIG. (e) is a cross-sectional view illustrating a state in which the second electroless plating layer is formed on the first seed layer. Fig. 7 is a cross-sectional view for explaining the continuation of the method for manufacturing a printed wiring board shown in Fig. 6, Fig. 7 (a) is a cross-sectional view showing a state in which an insulating layer is formed on the surface of an insulating base material, Fig. 7 (b) is a cross-sectional view showing a state in which an insulating layer is formed on the back surface of an insulating substrate, (c) is a cross-sectional view showing a state in which an opening on the surface side of the insulating substrate is filled with a third conductive paste, ) is a cross-sectional view showing a state in which the third conductive paste is filled in the opening on the back side of the insulating substrate. 8 is a cross-sectional view for explaining the continuation of the method for manufacturing the printed wiring board shown in FIG. (b) is a cross-sectional view illustrating a state in which the second seed layer is formed on the back side of the insulating substrate, and FIG. 8(c) is a cross-sectional view illustrating a state in which a second electroless plating layer is formed on the second seed layer. Fig. 9(a) is a cross-sectional view showing another example of the schematic configuration of the printed wiring board according to the second embodiment. In Figs. 6 to 9 (a), the same reference numerals as in Figs. 1 to 5 denote the same or equivalent parts, and the description thereof is omitted.

A printed wiring board 100 according to the present embodiment is a multilayer printed wiring board, as shown in Fig. 8(c), and a printed wiring board 100 according to the first embodiment (hereinafter referred to as a double-sided printed wiring board 101). ], an insulating layer 10a laminated on the insulating substrate 10 (double-sided printed wiring board 101), and a portion of the insulating layer 10a connected to the first wiring 21 formed The opening 12a, a via (hereinafter referred to as the second via 12) formed by filling the opening 12a with a conductive paste (hereinafter referred to as the third conductive paste 3), and the insulating layer 10a ) and further includes a wiring (hereinafter referred to as a second wiring 22 ) connected to the second via 12 .

Further, the second wiring 22 is connected to the second via 12 , and a seed formed of a conductive paste (hereinafter referred to as a fourth conductive paste 4 ) as a base film of the second wiring 22 . layer (hereinafter referred to as the second seed layer 22a) and an electroless plating layer (hereinafter referred to as the second electroless plating layer 22b) covering the second seed layer 22a.

And in the present embodiment, the third conductive paste 3 corresponds to the first conductive paste 1, the fourth conductive paste 4 corresponds to the second conductive paste 2, and the first embodiment Since the material of the first conductive paste 1 or the second conductive paste 2 described above can be applied in the form, the description of the material of the third conductive paste 3 and the fourth conductive paste 4 is omitted.

In addition, the 2nd electroless plating layer 22b consists of electroless copper plating similarly to the 1st electroless plating layer 21b, and Okuno Seiyaku Kogyo Co., Ltd. electroless copper plating liquid for independent circuit boards "OPC" Kappa-NCA” is used for electroless plating.

Next, the manufacturing method of the printed wiring board 100 which concerns on this embodiment is demonstrated with reference to FIGS. 6-8.

And in the manufacturing method of the printed wiring board 100 which concerns on this embodiment, after forming the through-hole 11a in the insulating base material 10, the 1st wiring 21 (1st electroless plating layer 21b) is formed. Since the manufacturing process (refer FIG. 6) until it is a manufacturing process similar to the manufacturing method of the double-sided printed wiring board 101 which concerns on 1st Embodiment, description is abbreviate|omitted.

A screen printing plate (not shown) formed with an oil agent except for the opening 12a formed in the portion connected to the first wiring 21 is placed opposite the insulating substrate 10 (double-sided printed wiring board 101). Then, ink (insulating resin) is applied on the screen printing plate.

A screen printing machine (not shown) slides a squeegee on the surface of the screen printing plate, presses the screen printing plate against the insulating substrate 10 (double-sided printed wiring board 101), and ink (insulating resin) through the opening of the screen printing plate is discharged, and an insulating resin is applied to the surface of the insulating base 10 (double-sided printed wiring board 101) except for the opening 12a.

Then, the insulating resin is thermally cured (dried) in a curing furnace at 120° C. to 130° C. for 30 minutes, and an insulating layer ( 10a) is formed (refer to Fig. 7(a), insulating layer lamination process).

In the insulating layer lamination step, after the insulating layer 10a on the surface side of the insulating substrate 10 (double-sided printed wiring board 101) is formed, the insulating substrate 10 is turned over and the insulating substrate 10 (double-sided printed wiring board 101) is formed. The insulating layer 10a is formed on the back side of the insulating base material 10 (double-sided printed wiring board 101) by the same manufacturing process as on the front side of the printed wiring board 101 (refer to Fig. 7(b)). .

In addition, the insulating layer lamination|stacking process may be a manufacturing process of laminating|stacking the insulating layer 10a on the insulating base material 10 (double-sided printed wiring board 101) except the opening part 12a by press molding.

In the press molding, a semi-hardened reinforced plastic molding material (prepreg) in which the portion forming the opening 12a is cut out by a press molding machine is laminated on the insulating substrate 10 (double-sided printed wiring board 101), and the prepreg is formed. The leg is heated and melted, and the insulating layer 10a is formed on the insulating substrate 10 (double-sided printed wiring board 101) by hardening it in close contact with the insulating substrate 10 and the first wiring 21 [Fig. 7(a) and 7(b), insulating layer lamination process].

Then, a screen printing plate (not shown) formed with an oil agent to match the formation position of the opening 12a on the surface of the insulating layer 10a on the insulating substrate 10 (double-sided printed wiring board 101) was applied to the insulating substrate ( 10), and a conductive ink (third conductive paste 3) is applied on the screen printing plate.

In addition, a screen printing machine (not shown) slides a squeegee on the surface of the screen printing plate to press the screen printing plate to the insulating layer 10a on the insulating base 10 (double-sided printed wiring board 101), The conductive ink (third conductive paste 3) is discharged through the opening, and the opening 12a of the insulating layer 10a is filled.

Then, after thermosetting (drying) the third conductive paste 3 in a curing furnace at 100° C. to 200° C. for 30 minutes to 120 minutes, the cured product protruding from the surface of the insulating layer 10a is removed by polishing. , the second via 12 is formed (refer to FIG. 7(c), the second via forming step).

Then, in the second via forming step, after forming the second via 12 on the surface side of the insulating substrate 10 (double-sided printed wiring board 101 ), the insulating substrate 10 is turned over to the insulating substrate 10 . The second via 12 is formed on the back side of the insulating base 10 (double-sided printed wiring board 101) by the same manufacturing process as on the front side of the [double-sided printed wiring board 101] (Fig. 7(d)). ) Reference].

Then, a screen printing plate (not shown) formed with an oil opening in accordance with the formation position of the second wiring 22 (the second seed layer 22a) on the surface of the insulating layer 10a is applied to the insulating substrate 10 . They are arranged to face each other, and a conductive ink (fourth conductive paste 4) is applied on a screen printing plate.

In addition, a screen printing machine (not shown) slides a squeegee on the surface of the screen printing plate to press the screen printing plate to the insulating layer 10a on the insulating base 10 (double-sided printed wiring board 101), A conductive ink (fourth conductive paste 4) is discharged through the opening, and is applied to the surface of the insulating layer 10a in a line shape.

Then, the fourth conductive paste 4 is thermally cured (dried) in a curing furnace at 100° C. to 120° C. for 30 minutes to 120 minutes, and a second seed layer 22a is formed as a base film of the second wiring 22 . (refer to FIG. 8(a), second seed layer forming process).

Then, in the second seed layer forming step, after the second seed layer 22a is formed on the surface side of the insulating substrate 10 (double-sided printed wiring board 101), the insulating substrate 10 is turned over and the insulating substrate ( 10) A second seed layer 22a is formed on the back side of the insulating base 10 (double-sided printed wiring board 101) by the same manufacturing process as on the front side of the [double-sided printed wiring board 101] (Fig. 8). (b) see].

Then, the second electroless plating process including, for example, a degreasing process, a pre-dip process, a palladium substitution process, a palladium residue removal process, and an electroless copper plating process, is performed on the second seed layer 22a. The electroless plating layer 22b is grown (see Fig. 8(c), second electroless plating layer forming step).

In addition, since the electroless plating process (electroless copper plating) which concerns on this embodiment is a manufacturing process similar to the electroless plating process (electroless copper plating) of 1st Embodiment, detailed description is abbreviate|omitted.

Then, in order to form an electrode (not shown) connected to the second wiring 22, a resist mask is placed on the insulating layer 10a (second wiring 22) except for the electrode formation position. formed, and electroless nickel/gold plating is performed using the second electroless plating layer 22b of the second wiring 22 as a base film to form an electroless nickel/gold plating layer (electrode).

Through the above steps, the printed wiring board 100 according to the present embodiment is completed.

In addition, in this embodiment, it differs from 1st Embodiment only that the printed wiring board 100 is a multilayer printed wiring board, Except the effect by the multilayer printed wiring board and its manufacturing method, the same effect as that of 1st Embodiment. can get

In addition, although the printed wiring board 100 according to this embodiment has been described using a four-layer multilayer printed wiring board as an example, the manufacturing process of the via and seed layers using conductive paste and the manufacturing process of the wiring upper layer by electroless plating are applied. Thereby, multilayer printed wiring boards other than four layers can be formed.

And as shown in FIG.8(c), the printed wiring board 100 which concerns on this embodiment is on the 1st via 11 (through hole 11a) in the front surface and the back surface of the insulating base material 10. In the above, the second conductive paste 2 serving as the first seed layer 21a is applied to the entire surface, and the first electroless plating layer 21b is passed through the first seed layer 21a to the first via 11 is in indirect contact with

Further, as shown in Fig. 8(c), the printed wiring board 100 according to the present embodiment is on the second via 12 (opening portion 12a) on the surface of the insulating layer 10a, The fourth conductive paste 4 serving as the second seed layer 22a is applied to the entire surface, and the second electroless plating layer 22b is indirectly connected to the second via 12 through the second seed layer 22a. are in contact

However, the printed wiring board 100 which concerns on this embodiment is not limited to the said layer structure.

For example, the printed wiring board 100 is, as shown in FIG. On the via 11 , the second conductive paste 2 serving as the first seed layer 21a may be applied only to the peripheral edge portions except for the central region of the first via 11 .

In this case, as shown in Fig. 9(a) (Fig. 5(c)), in the central region on the first via 11 on the front and back surfaces of the insulating substrate 10, the first conductive paste (1) becomes the base film of the first electroless plating layer 21b, so that the first electroless plating layer 21b is in direct contact with the first via 11.

Similarly, the printed wiring board 100 is on the second via 12 on the surface of the insulating layer 10a, except for the central region of the second via 12, as shown in FIG. 9A. The fourth conductive paste 4 serving as the second seed layer 22a may be applied only to the peripheral edge portion.

In this case, as shown in Fig. 9A, in the central region on the second via 12 on the surface of the insulating layer 10a, the third conductive paste 3 is applied to the second electroless plating layer ( 22b), the second electroless plating layer 22b is in direct contact with the second via 12 .

By setting it as the above-mentioned layer structure, the printed wiring board 100 is a part of a via (for example, the 1st via 11) WHEREIN: Conductive paste (here, 1st conductive paste 1)/electroless plating As [here, the first electroless plating layer 21b]/conductive paste (here, the third conductive paste 3)/electroless plating (here, the second electroless plating layer 22b), the conductive paste and the electroless As a repeating layer of sea plating, the reliability of bonding can be improved.

(Third embodiment of the present invention)

Fig. 9B is a cross-sectional view showing another example of the schematic configuration of the printed wiring board according to the third embodiment. Fig. 10 is a cross-sectional view for explaining a method for manufacturing a printed wiring board according to a third embodiment, and Fig. 10 (a) is a cross-sectional view showing a state in which a third seed layer is formed on the surface side of an insulating substrate. (b) is a cross-sectional view showing a state in which a third seed layer is formed on the back side of the insulating substrate, and (c) of FIG. 10 is a third electroless plating layer formed on the third seed layer and the first electroless plating layer It is a cross-sectional view showing the state. In FIG.9(b) and FIG.10, the same code|symbol as FIG.1-9(a) shows the same or an equivalent part, and the description is abbreviate|omitted.

A printed wiring board 100 according to the present embodiment is a multilayer printed wiring board, as shown in FIG. 10(c) , and in addition to the components of the double-sided printed wiring board 101 according to the first embodiment, an insulating substrate 10 An insulating layer 10a laminated on the [Double-Sided Printed Wiring Board 101], an opening 12a formed in a portion of the insulating layer 10a connected to the first wiring 21, and an insulating layer 10a It further includes a wiring (hereinafter, referred to as a third wiring 23 ) provided on the surface and connected to the first electroless plating layer 21b.

Further, the third wiring 23 is provided at the peripheral edge portion of the opening 12a on the insulating layer 10a and at a position where wiring extending from the peripheral edge portion is formed, and the base film of the third wiring 23 is A seed layer (hereinafter, referred to as a third seed layer 23a) formed by a conductive paste (hereinafter referred to as the fifth conductive paste 5) as and an electroless plating layer (hereinafter referred to as a third electroless plating layer 23b) covering the plating layer 21b and the third seed layer 23a.

In addition, in this embodiment, since the 5th electrically conductive paste 5 respond|corresponds to the 2nd electrically conductive paste 2, and the material of the 2nd electrically conductive paste 2 mentioned above in 1st Embodiment can be applied, Description of the material of the 5th conductive paste 5 is abbreviate|omitted.

In addition, the 3rd electroless plating layer 23b consists of electroless copper plating similarly to the 1st electroless plating layer 21b, and Okuno Seiyaku Kogyo Co., Ltd. electroless copper plating liquid for independent circuit boards "OPC" Kappa-NCA" is used for electroless plating.

Next, the manufacturing method of the printed wiring board 100 which concerns on this embodiment is demonstrated with reference to FIG.

And in the manufacturing method of the printed wiring board 100 which concerns on this embodiment, the manufacturing process from forming the through-hole 11a in the insulating base material 10 until forming the insulating layer 10a [FIG. 6, FIG. 7(a) and FIG. 7(b)], since it is the same manufacturing process as the manufacturing method of the printed wiring board 100 which concerns on 2nd Embodiment, description is abbreviate|omitted.

A screen printing plate (not shown) formed with an oil agent in accordance with the formation position of the peripheral edge portion of the opening portion 12a on the surface of the insulating layer 10a and the wiring extending from the peripheral edge portion is applied to the insulating substrate 10 . They are arranged to face each other, and a conductive ink (fifth conductive paste 5) is applied on a screen printing plate.

A screen printing machine (not shown) slides a squeegee on the surface of the screen printing plate, and presses the screen printing plate against the insulating layer 10a on the insulating substrate 10 (double-sided printed wiring board 101) to close the opening of the screen printing plate. A conductive ink (fifth conductive paste 5) is discharged through the surface of the insulating layer 10a in an annular shape (corresponding to the peripheral edge portion of the opening 12a) and a line (corresponding to the peripheral edge portion of the opening portion 12a) and a wiring portion extending from the peripheral edge portion corresponding).

Then, the fifth conductive paste 5 is thermally cured (dried) in a curing furnace at 100°C to 200°C for 30 minutes to 120 minutes, and a third seed layer 23a is formed as a base film of the third wiring 23 . (refer to Fig. 10(a), the third seed layer forming process).

Then, in the third seed layer forming step, after the third seed layer 23a is formed on the surface side of the insulating substrate 10 (double-sided printed wiring board 101), the insulating substrate 10 is turned over and the insulating substrate ( 10) A third seed layer 23a is formed on the back side of the insulating base 10 (double-sided printed wiring board 101) by the same manufacturing process as on the front side of the [double-sided printed wiring board 101] (Fig. 10). of (b)].

Then, the third seed layer 23a and the first electroless plating process including, for example, a degreasing process, a pre-dip process, a palladium substitution process, a palladium residue removal process, and an electroless copper plating process, are performed. A third electroless plating layer 23b is grown on the plating layer 21b (refer to FIG. 10C, third electroless plating layer forming step).

And, growing the third electroless plating layer 23b on the first electroless plating layer 21b is filling the opening 12a with the third electroless plating layer 23b, and the insulating layer 10a is to form buyers.

In the electroless plating treatment (electroless copper plating) according to the present embodiment, immersion in the electroless copper plating solution is longer than the electroless plating treatment (electroless copper plating) of the first embodiment, except that , Since it is the same manufacturing process as the electroless plating process (electroless copper plating) of 1st Embodiment, detailed description is abbreviate|omitted.

Then, in order to form an electrode (not shown) connected to the third wiring 23, a resist mask is placed on the insulating layer 10a (third wiring 23) except for the electrode formation position. is formed, and electroless nickel/gold plating is performed using the third electroless plating layer 23b of the third wiring 23 as a base film to form an electroless nickel/gold plating layer (electrode).

Through the above steps, the printed wiring board 100 according to the present embodiment is completed.

Incidentally, in the present embodiment, it is different from the second embodiment only in that the step of filling the opening portion 12a with the third conductive paste 3 is omitted. The same effects as those of the second embodiment can be obtained.

In addition, although the printed wiring board 100 which concerns on this embodiment was demonstrated taking the multilayer printed wiring board of 4 layers as an example, the manufacturing process of a via and a seed layer with an electrically conductive paste, and manufacturing of a via|via and wiring upper layer by electroless plating By applying the process, a multilayer printed wiring board other than four layers can be formed.

And as shown in FIG.10(c), the printed wiring board 100 which concerns on this embodiment is on the 1st via 11 (through hole 11a) in the front surface and the back surface of the insulating base material 10. In the method, the second conductive paste 2 serving as the first seed layer 21a is applied to the entire surface, and the first electroless plating layer 21b is passed through the first seed layer 21a to the first via 11 Although indirectly in contact with, it is not limited to the said layer structure.

For example, as shown in FIG. 9(b) (FIG. 5(a), FIG. 5(b)), the printed wiring board 100 is the first in the front and back surfaces of the insulating base material 10. On the via 11 , the second conductive paste 2 serving as the first seed layer 21a may be applied only to the peripheral edge portions except for the central region of the first via 11 .

In this case, as shown in Fig. 9B (Fig. 5C), in the central region on the first via 11 on the front and back surfaces of the insulating substrate 10, the first conductive paste (1) becomes the base film of the first electroless plating layer 21b, so that the first electroless plating layer 21b is in direct contact with the first via 11.

Then, as shown in FIG. 9B , the printed wiring board 100 is formed by the third seed layer forming process and the third electroless plating layer forming process according to the present embodiment, as shown in FIG. A third electroless plating layer 23b is grown using the first electroless plating layer 21b and the third seed layer 23a of also be

1: first conductive paste
2: second conductive paste
3: third conductive paste
4: fourth conductive paste
5: fifth conductive paste
10: insulating substrate
10a: insulating layer
11: First Buyer
11a: through hole
12: 2nd buyer
12a: opening
21: first wiring
21a: first seed layer
21b: first electroless plating layer
22: second wiring
22a: second seed layer
22b: second electroless plating layer
23: third wiring
23a: third seed layer
23b: third electroless plating layer
100: printed wiring board
101: double-sided printed wiring board
200: printed wiring board
201: insulating substrate
201a: copper foil
202: through hole
203: electroless plating layer
204: electrolytic plating layer
205: resist
206: mask

Claims (8)

an insulating substrate, a through hole formed through the insulating substrate, a first via formed by filling the through hole with a conductive paste, and a first wiring provided on the insulating substrate and connected to the first via As a printed wiring board to say,
The first wiring is
a first seed layer connected to the first via and formed of a conductive paste as a base film of the first wiring;
A first electroless plating layer covering the first seed layer
including,
a first seed layer of the first wiring is provided only on a peripheral edge portion on the first via;
a first electroless plating layer of the first wiring contacts the first via in a central region of the first via;
printed wiring board. According to claim 1,
The printed wiring board, wherein the uniformity of the particle diameter of the conductive particles in the conductive paste of the first buyer is lower than the uniformity of the particle diameter of the conductive particles in the conductive paste of the first seed layer. According to claim 1,
The conductive particles of the conductive paste of the first buyer and the conductive particles of the conductive paste of the first seed layer have substantially the same composition of one or more metals, a combination of a plurality of types of metals, or a combination of metal compositions and metals. and
The printed wiring board, wherein the average particle diameter of the conductive particles in the conductive paste of the first seed layer is smaller than the average particle diameter of the conductive particles in the conductive paste of the first buyer. 4. The method according to any one of claims 1 to 3,
an insulating layer laminated on the insulating substrate;
an opening formed in a portion of the insulating layer connected to the first wiring;
a second via formed by filling the opening with a conductive paste; and
a second wiring provided on the insulating layer and connected to the second via
including,
the second wiring,
a second seed layer connected to the second via and formed of a conductive paste as a base film of the second wiring;
a second electroless plating layer covering the second seed layer
including,
a second seed layer of the second wiring is provided only on a peripheral edge portion on the second via;
a second electroless plating layer of the second wiring contacts the second via in a central region of the second via;
printed wiring board. insulating substrate,
a through hole formed through the insulating substrate;
a first via formed by filling the through hole with a conductive paste;
a first wiring provided on the insulating substrate and connected to the first via;
an insulating layer laminated on the insulating substrate;
an opening formed in a portion of the insulating layer connected to the first wiring; and
A third wiring provided on the insulating layer and connected to the first electroless plating layer
including,
The first wiring is
a first seed layer connected to the first via and formed of a conductive paste as a base film of the first wiring;
A first electroless plating layer covering the first seed layer
including,
the third wire,
a third seed layer formed of a conductive paste as a base film of the third wiring provided at the peripheral edge portion of the opening on the insulating layer and at a position for forming wiring extending from the peripheral edge portion;
A third electroless plating layer filled in the opening and covering the first electroless plating layer and the third seed layer
A printed wiring board comprising a. an insulating substrate, a through hole formed through the insulating substrate, a first via formed by filling the through hole with a conductive paste, and a first wiring provided on the insulating substrate and connected to the first via A method for manufacturing a printed wiring board comprising:
a through-hole forming step of forming the through-hole in the insulating substrate;
a first via forming process of forming a first via by filling the through hole with the conductive paste by screen printing;
a first seed layer forming step of applying a conductive paste on the insulating substrate by screen printing and forming a first seed layer as a base film of the first wiring;
A first electroless plating layer forming process of growing a first electroless plating layer on the first seed layer by electroless plating treatment
including,
a first seed layer of the first wiring is provided only on a peripheral edge portion on the first via;
a first electroless plating layer of the first wiring contacts the first via in a central region of the first via;
A method for manufacturing a printed wiring board. 7. The method of claim 6,
an insulating layer lamination step of laminating an insulating layer on the insulating substrate by screen printing or press molding, except for an opening formed in a portion connected to the first wiring;
a second via forming step of forming a second via by filling the opening with the conductive paste by screen printing;
a second seed layer forming step of applying a conductive paste on the insulating layer by screen printing and forming a second seed layer as a base film for a second wiring connected to the second via;
A second electroless plating layer forming step of growing a second electroless plating layer constituting the second wiring on the second seed layer by electroless plating treatment
including,
a second seed layer of the second wiring is provided only on a peripheral edge portion on the second via;
a second electroless plating layer of the second wiring contacts the second via in a central region of the second via;
A method for manufacturing a printed wiring board. an insulating substrate, a through hole formed through the insulating substrate, a first via formed by filling the through hole with a conductive paste, and a first wiring provided on the insulating substrate and connected to the first via A method for manufacturing a printed wiring board comprising:
a through-hole forming step of forming the through-hole in the insulating substrate;
a first via forming process of forming a first via by filling the through hole with the conductive paste by screen printing;
a first seed layer forming step of applying a conductive paste on the insulating substrate by screen printing and forming a first seed layer as a base film of the first wiring;
a first electroless plating layer forming step of growing a first electroless plating layer on the first seed layer by electroless plating;
an insulating layer lamination step of laminating an insulating layer on the insulating substrate by screen printing or press molding, except for an opening formed in a portion connected to the first wiring;
By screen printing, a conductive paste is applied on the insulating layer to the peripheral edge portion of the opening portion and to the formation position of the wiring extending from the peripheral edge portion, and the base film of the third wiring connected to the first electroless plating layer. a third seed layer forming process of forming a third seed layer as
A third electroless plating layer forming step of growing a third electroless plating layer constituting the third wiring on the first electroless plating layer and the third seed layer by electroless plating treatment
A method for manufacturing a printed wiring board, comprising:

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