KR102276243B1 - Display Device and Driving Method thereof - Google Patents

Abstract

The present invention provides a display device including a display panel, a driving unit, a timing control unit, and a power supply unit. The display panel displays an image. The driving unit drives the display panel. The timing control unit controls the driving unit. The power supply unit outputs power to be supplied to the display panel, and when a voltage drop of the power occurs, a discharge operation is performed during a blank period in which an image is not displayed on the display panel.

Description

Display Device and Driving Method thereof

The present invention relates to a display device and a driving method thereof.

As information technology develops, the market for display devices, which is a connection medium between users and information, is growing. Accordingly, a liquid crystal display (LCD), an organic light emitting diode display (OLED), an electrophoretic display (EPD), and a plasma liquid crystal panel (PDP) ) and the like, the use of display devices is increasing.

Some of the display devices described above, for example, a liquid crystal display device or an organic light emitting display device, include a display panel including a plurality of sub-pixels arranged in a matrix form and a driving unit for driving the display panel. The driver includes a scan driver that supplies a scan signal (or a gate signal) to the display panel and a data driver that supplies a data signal to the display panel.

The above display device displays a specific image as the display panel emits or transmits light based on the power output from the power supply unit and the scan signal and data signal output from the scan driver and the data driver.

The conventionally proposed display device varies the voltage level in order to compensate the power output from the power supply unit according to temperature or other environmental conditions. However, the conventionally proposed method of varying the voltage level has a problem in that the level change is recognized in the form of a flicker on the screen when the voltage is changed, so improvement is required.

The present invention for solving the problems of the above-described background technology improves the display quality and reliability by improving the problem that the level change is recognized in the form of a change in a screen or a flicker according to a change in voltage - such as a transient characteristic will do

As a means for solving the above problems, the present invention provides a display device including a display panel, a driving unit, a timing control unit, and a power supply unit. The display panel displays an image. The driving unit drives the display panel. The timing control unit controls the driving unit. The power supply unit outputs power to be supplied to the display panel, and when a voltage drop of the power occurs, a discharge operation is performed during a blank period in which an image is not displayed on the display panel.

The power supply unit compares the voltage level with respect to the previous frame and the change of the voltage level for the current frame, determines whether the voltage level of the power to be output to the current frame is a rising phase or a falling phase, and if it corresponds to the falling phase, discharges during the blank period can do.

The power supply unit compares the voltage level for the previous frame with the change of the voltage level for the current frame in response to the power control signal supplied from the timing controller, and determines whether the voltage level of the power to be output to the current frame is in the rising or falling phase can do.

The power supply unit may include a power control circuit unit for discharging the charge of the output capacitor located at its output terminal so that the dipping phenomenon according to the voltage drop in the blank section is terminated when the voltage drop of the power source occurs.

When the voltage drop of the power source occurs, the power control circuit unit extracts an offset value according to the difference between the voltage level for the previous frame and the voltage level for the current frame, and discharges the charge of the output capacitor by the amount of current corresponding to the offset value. .

The power supply unit compares the change in voltage level due to the power control signal for the previous frame supplied from the timing controller and the power control signal for the current frame supplied from the timing controller, and the voltage level of the first power to be output to the current frame is It may include an offset calculating unit for determining whether it is a rising phase or a falling phase, and a power control circuit unit for discharging the charge of the output capacitor located at the output terminal of the power supply unit based on the offset signal extracted by interlocking the offset calculation unit and the internal lookup table. have.

When the temperature information is transmitted from the sensor unit interworking with the timing control unit, the timing control unit may supply a power control signal to the power supply unit so that the power supply unit outputs the first power in response to the temperature information.

In another aspect, the present invention provides a method of driving a display device. A method of driving a display device includes comparing a voltage level with respect to a previous frame and a change of a voltage level with respect to a current frame, and determining whether a voltage level of power to be output through a power supply unit during the current frame is in a rising phase or a falling phase; and discharging the charge of the output capacitor located at the output terminal of the power supply when the voltage level of the power to be output through the power supply is in the falling phase.

The discharging of the charge of the output capacitor located at the output terminal of the power supply may be performed during a blank period in which an image is not displayed on the display panel.

If the step of discharging the charge of the output capacitor located at the output terminal of the power supply is a descending period, an offset value according to the voltage level difference between the previous frame and the current frame is extracted, and power is supplied by the amount of current corresponding to the offset value. It is possible to discharge the charge of the output capacitor located at the output terminal of the supply unit.

The present invention has the effect of improving the display quality by improving the problem of recognizing a change in a screen according to a change in voltage or a change in a level in the form of flicker. In addition, the present invention has the effect of improving display quality and reliability by improving the problem of voltage change due to temperature compensation - such as transient characteristics.

1 is a block diagram schematically illustrating an organic light emitting display device.
FIG. 2 is a configuration diagram schematically illustrating the sub-pixel shown in FIG. 1;
3 is a partial block diagram of a display device according to an experimental example;
Figure 4 is a waveform diagram for explaining the problems of the experimental example.
5 is a partial block diagram of a display device according to an embodiment of the present invention;
6 is a flowchart for explaining a method of driving the display device shown in FIG. 5;
7 is a waveform diagram for explaining an improvement point according to an embodiment of the present invention.
8 and 9 are diagrams illustrating the configuration of the power control circuit of FIG. 5 .
10 is a view showing screen characteristics according to a change in voltage level of a display device according to an experimental example and an embodiment of the present invention;

Hereinafter, specific details for carrying out the present invention will be described with reference to the accompanying drawings.

The display device according to the present invention is implemented as a TV, a set-top box, a navigation system, an image player, a Blu-ray player, a personal computer (PC), a home theater, a mobile phone, and the like. The display panel of the display device may be a liquid crystal display panel, an organic light emitting display panel, an electrophoretic display panel, a plasma display panel, or the like, but is not limited thereto. However, in the following description, an organic light emitting display device will be described as an example for convenience of description.

1 is a block diagram schematically illustrating an organic light emitting display device, and FIG. 2 is a configuration diagram schematically illustrating a sub-pixel illustrated in FIG. 1 .

As shown in FIG. 1 , the organic light emitting display device includes an image supply unit 110 , a timing control unit 120 , a sensor unit 125 , a scan driver 130 , a data driver 140 , a display panel 150 and A power supply unit 180 is included.

The display panel 150 displays an image corresponding to the scan signal and the data signal DATA outputted from the driver including the scan driver 130 and the data driver 140 . The display panel 150 is implemented in a top-emission method, a bottom-emission method, or a dual-emission method. The display panel 150 is implemented in a flat panel type, a curved shape, or a flexible shape depending on the material of the substrate. In the display panel 150 , the sub-pixels SP positioned between the two substrates emit light by themselves in response to the driving current.

As shown in FIG. 2 , in one sub-pixel, a switching transistor SW connected to (or formed at the intersection of) the scan line GL1 and the data line DL1 and data supplied through the switching transistor SW A pixel circuit PC operating in response to the signal DATA is included. The pixel circuit PC includes circuits such as a driving transistor, a storage capacitor, and an organic light emitting diode, and a compensation circuit for compensating the same.

In the sub-pixel, when the driving transistor is turned on in response to the data voltage stored in the storage capacitor, a driving current is supplied to the organic light emitting diode positioned between the first power line VDDEL and the second power line VSSEL. The organic light emitting diode emits light in response to a driving current.

The compensation circuit is a circuit for compensating the threshold voltage of the driving transistor. The compensation circuit is composed of one or more thin film transistors and capacitors. The configuration of the compensation circuit varies greatly depending on the compensation method, and detailed examples and descriptions thereof will be omitted. The thin film transistor is implemented based on a low-temperature polysilicon (LTPS), amorphous silicon (a-Si), oxide, or organic semiconductor layer.

The image supply unit 110 image-processes the data signal and outputs it together with a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a clock signal. The image supply unit 110 supplies a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, a clock signal, and a data signal to the timing control unit 120 .

The timing control unit 120 receives a data signal from the image supply unit 110 , and controls the gate timing control signal GDC for controlling the operation timing of the scan driver 130 and the operation timing of the data driver 140 . A data timing control signal DDC for The timing controller 120 supplies the data signal DATA together with the data timing control signal DDC to the data driver 140 .

The sensor unit 125 serves to sense internal, external, or internal and external environmental conditions (eg, temperature, etc.) of the device and transmit the sensed data to the timing controller 120 . For example, the sensor unit 125 may sense a temperature and output sensed temperature information so that the timing controller 120 may perform a compensation operation for a specific device in response to a change in temperature.

The scan driver 130 outputs a scan signal while shifting the level of the gate voltage in response to the gate timing control signal GDC supplied from the timing controller 120 . The scan driver 130 includes a level shifter and a shift register. The scan driver 130 supplies a scan signal to the sub-pixels SP included in the display panel 150 through the scan lines GL1 to GLm. The scan driver 130 may be formed on the display panel 150 in the form of a gate-in-panel method or an integrated circuit (IC) type. A portion of the scan driver 130 formed in the gate-in-panel method is a shift register.

The data driver 140 samples and latches the data signal DATA in response to the data timing control signal DDC supplied from the timing controller 120 , and converts the digital signal into an analog signal in response to the gamma reference voltage and outputs it . The data driver 140 supplies the data signal DATA to the sub-pixels SP included in the display panel 150 through the data lines DL1 to DLn. The data driver 140 may be formed in the form of an integrated circuit (IC).

The display device as described above is the display panel 150 based on the power VDDEL and VSSEL output from the power supply unit 180 and the scan signal and data signal DATA output from the scan driver 130 and the data driver 140 . As this light is emitted or transmitted, a specific image is displayed.

On the other hand, the conventionally proposed display device varies the voltage level in order to compensate the power output from the power supply unit according to temperature or other environmental conditions. However, the conventionally proposed method of varying the voltage level has a problem in that the level change is recognized in the form of a flicker on the screen when the voltage is changed, so improvement is required.

Hereinafter, the present invention will be embodied in comparison with Experimental Examples.

[Experimental example]

3 is a partial block diagram of a display device according to an experimental example, and FIG. 4 is a waveform diagram for explaining a problem of the experimental example.

As shown in FIG. 3 , the display device according to the experimental example includes a timing control unit 120 , a sensor unit 125 , a display panel 150 , and a power supply unit 180 . In FIG. 4, SWIRE shows a state in which the power control signal ES output from the timing controller 120 is transmitted to the power supply unit 180 in a communication method (eg, Single Wire Protocol).

When the temperature information is transmitted from the sensor unit 125 , the timing control unit 120 outputs a power control signal ES so that the power supply unit 180 can output the first power VDDEL corresponding to the temperature based thereon. do. The timing control unit 120 transmits the power control signal ES to the power supply unit 180 through data communication, serial communication, or wire communication method. The power control signal ES may be configured in the form of data.

The power supply unit 180 converts the input power Vin supplied from the outside into the first power VDDEL and outputs it. The power supply unit 180 is composed of a DC-DC converter that converts direct current into direct current. The power supply unit 180 includes an inductor L1 , a diode D1 , resistors R1 and R2 , a boost transistor TB, a boost control unit 185 , and the like. In the drawings, the main configuration of the power supply unit 180 is merely schematically illustrated, but the present invention is not limited thereto.

The power supply unit 180 supplies the input power Vin to the first power source (Vin) in response to the operations of the inductor L1, the diode D1, the resistors R1 and R2, the boost transistor TB, and the boost control unit 185. VDDEL) and output it. The power supply unit 180 determines a variable amount of a voltage level for the first power VDDEL output from the power supply unit 180 in response to the power control signal ES supplied from the timing control unit 120 .

3 and 4, in the experimental example, the power control signal ES output from the timing controller 120 is transmitted in synchronization with a vertical blank interval (VBI). Therefore, in the display device of the experimental example, the first power VDDEL output from the power supply unit 180 varies during the blank period VBI. The blank section VBI corresponds to a section in which an image is not displayed on the display panel.

However, it was confirmed that the following problem occurs when the first power VDDEL output from the power supply unit 180 varies during the blank section VBI as in the experimental example.

1. When the voltage level is higher than that of the existing frame, charging by changing the switching duty of the boost transistor TB of the power supply unit 180 and forcibly charging the charge of the output capacitor CL speed is fast

2. However, when the voltage level is lowered, the time consumed in the voltage dropper T2 is longer than in the voltage riser T1 because the voltage is lowered even though the charge overcharged in the previous frame must be discharged.

3. If the time is consumed until the image display section DSP of the display panel 150 when the voltage is lowered, the level change is recognized in the form of flicker on the screen due to the dipping phenomenon according to the voltage drop.

[Example]

5 is a partial block diagram of a display device according to an embodiment of the present invention, FIG. 6 is a flowchart for explaining a method of driving the display device shown in FIG. 5 , and FIG. 7 is a block diagram of the display device according to an embodiment of the present invention. It is a waveform diagram for explaining an improvement point, FIGS. 8 and 9 are diagrams illustrating the configuration of the power control circuit of FIG. 5 , and FIG. 10 is an experimental example and a change in voltage level of a display device according to an embodiment of the present invention It is a drawing showing the screen characteristics.

5 to 7 , the display device according to the embodiment includes a timing control unit 120 , a sensor unit 125 , a display panel 150 , and a power supply unit 180 . In FIG. 7, SWIRE shows a state in which the power control signal ES output from the timing control unit 120 is transmitted to the power supply unit 180 in a communication method (eg, Single Wire Protocol).

When the temperature information is transmitted from the sensor unit 125 , the timing control unit 120 outputs a power control signal ES so that the power supply unit 180 can output the first power VDDEL corresponding to the temperature based thereon. do. The timing control unit 120 transmits the power control signal ES to the power supply unit 180 through data communication, serial communication, or wire communication method. The power control signal ES may be configured in the form of data.

The power supply unit 180 converts the input power Vin supplied from the outside into the first power VDDEL and outputs it. The power supply unit 180 is composed of a DC-DC converter that converts direct current into direct current. The power supply unit 180 includes an inductor L1, a diode D1, resistors R1 and R2, a boost transistor TB, a boost control unit 185, a power control circuit unit 183, an offset operation unit 187, and the like. do. In the drawings, the main configuration of the power supply unit 180 is merely schematically illustrated, but the present invention is not limited thereto.

The power supply unit 180 operates the inductor L1, the diode D1, the resistors R1 and R2, the boost transistor TB, the boost control unit 185, the power control circuit unit 183, the offset operation unit 187, etc. In response, the input power Vin is converted into the first power VDDEL and output. The power supply unit 180 determines a variable amount of a voltage level for the first power VDDEL output from the power supply unit 180 in response to the power control signal ES supplied from the timing control unit 120 .

The main components included in the power supply unit 180 will be described as follows.

The boost control unit 185 varies the gate signal in response to the power control signal ES supplied from the timing control unit 120 and controls the switching duty of the boost transistor TB. The boost controller 185 receives the first power VDDEL output from the voltage divider resistors R1 and R2 positioned at the rear end of the diode D1 as feedback and adjusts the voltage based on the feedback.

The boost transistor TB performs a switching operation in response to the gate signal output from the boost controller 185 and varies the voltage level of the first power VDDEL supplied through the inductor L1 . For example, the boost transistor TB raises or lowers the voltage level of the first power source VDDEL under the control of the boost controller 185 .

The offset calculating unit 187 calculates an offset value when the voltage of the first power source VDDEL is lowered. The offset calculating unit 187 compares the change in voltage level due to the power control signal for the previous frame and the power control signal for the current frame, and whether the voltage level of the first power VDDEL to be output in the current frame is in a rising phase or a falling phase judge cognition.

When it is determined that the voltage level of the first power source VDDEL is in the falling phase, the offset calculating unit 187 calculates an offset value when the voltage of the first power source VDDEL falls, and outputs an offset signal corresponding to the calculated value to the power control circuit unit 183 . forward to

For example, when it is determined that the voltage level of the first power source VDDEL is in the falling phase, the offset calculating unit 187 calculates the amount of charge in the output capacitor CL stored in the previous frame based on an equation such as “Q_1 = C x V_1”. save And, the offset calculating unit 187 calculates the amount of charge of the output capacitor CL with respect to the voltage to be set in the current frame based on an equation such as “Q_2 = C x V_2”. And, the offset calculating unit 187 obtains an offset value based on a difference between the amount of charge of the previous frame and the amount of charge of the current frame based on an expression such as "ΔQ = Q_1 - Q_2". And, the offset calculating unit 187 calculates the amount of current to be forced to flow (discharge) during the blank period VBI based on an equation such as "I = ΔQ / T_blank".

The offset calculating unit 187 may directly calculate the offset value in the above manner or may extract an offset signal corresponding to the offset value from the lookup table 184 and transmit it to the power control circuit unit 183 .

If the lookup table 184 is used, the voltage (minimum to maximum range of voltage, such as 8V to 13V, etc.), offset (minimum to maximum range of offset), current Time loss due to calculation can be reduced because it is only necessary to extract without calculating the amount of charge (minimum to maximum range of charge amount) for the output capacitor of the previous frame. However, when the offset calculator 187 directly calculates the offset value, the lookup table 184 may be omitted. However, in the following description, the offset calculating unit 187 using the lookup table 184 will be described as an example.

The power control circuit unit 183 varies the voltage level of the first power VDDEL output from the power supply unit 180 . The power control circuit unit 183 discharges the voltage level of the first power VDDEL output from the power supply unit 180 based on the offset signal extracted by the interworking of the offset operation unit 187 and the lookup table 184 .

The power control circuit unit 183 discharges the charge of the output capacitor CL located at the output terminal of the power supply unit 180 in response to the offset signal. Since the voltage output from the power supply 180 is determined according to the amount of charge stored in the output capacitor CL, the time delay occurring when the voltage falls is solved by forcibly subtracting the amount of charge. Therefore, the power control circuit unit 183 serves as a discharge control circuit for forcibly discharging the charge of the output capacitor CL located at the output terminal of the power supply unit 180 when the voltage is lowered.

The display device according to the embodiment of the present invention operates in the following flow.

When external power is supplied to the display device, the image supply unit 110, the timing control unit 120, the sensor unit 125, the scan driving unit 130, the data driving unit 140, the display panel 150, and the power supply unit 180 are Each starts driving according to the supplied signal, power, etc. sequence.

The display panel 150 displays an image corresponding to the scan signal, the data signal, and the first power VDDEL supplied from the scan driver 130 , the data driver 140 , and the power supply unit 180 .

A change may occur in the voltage level of the first power VDDEL output to the power supply unit 180 for reasons such as a sudden change in the image of the display panel 150 in response to a specific data signal. perform the action

It is determined whether a device such as the power supply unit 180 is activated (S110).

When a device such as the power supply 180 is activated (Y), the power supply 180 outputs a voltage corresponding to the basic level of the first power VDDEL according to a setting (S120).

When the power control signal ES is supplied from the timing control unit 120 (S130), the offset calculating unit 187 compares the change in voltage level by the power control signal for the previous frame and the power control signal for the current frame, It is determined whether the voltage level of the first power source VDDEL to be output in the current frame is in a rising phase or a falling phase ( S140 ).

As a result of the determination of the offset calculating unit 187, if the voltage level is not in the falling phase (N) of the first power supply (VDDEL) but in the voltage level rising phase (S150), the power control signal and the present The change in voltage level by the power control signal for the frame is compared.

If it is determined by the offset calculator 187 that the voltage level is falling (Y) rather than the rising phase of the first power source VDDEL, the voltage difference between the first power source VDDEL output from the previous frame and the current frame is calculated (S160) .

The voltage drop timing of the first power source VDDEL is sensed so that the voltage dipping phenomenon according to the voltage drop of the first power source VDDEL is completed within the blank period VBI ( S170 ).

An offset signal corresponding to the offset value is extracted with reference to the lookup table 184 , and the extracted offset signal is transmitted to the power control circuit unit 183 , and the charge of the output capacitor CL located at the output terminal of the power supply unit 180 . to discharge (S180). Discharge with respect to the charge of the output capacitor CL is completed within the blank period VBI.

By this flow, the power control circuit unit 183 changes the voltage level of the first power VDDEL output from the power supply unit 180 . At this time, the voltage level of the first power VDDEL output from the power supply unit 180 is discharged based on the offset signal extracted by interworking between the offset calculating unit 187 and the lookup table 184 .

Due to the above driving characteristics, the charge of the output capacitor CL located at the output terminal of the power supply unit 180 is discharged in the blank section VBI in response to the offset signal. Due to this, in the present invention, even if the time consumption of the voltage dropper T2 is longer than that of the voltage riser T1, the charge overcharged in the previous frame is rapidly discharged during the blank period VBI, so that the dipping phenomenon caused by the voltage drop is prevented. It ends in the voltage dropper T2 before the image display period DSP (or ends in the blank period).

As shown in FIG. 8 , the power control circuit unit 183 may include a discharge switch unit DSW and a variable resistor RV. The power control circuit unit 183 adjusts the number of turns on/off of the discharge switch unit DSW based on the offset signal transmitted from the lookup table 183 and changes the resistance value of the variable resistor RV.

As a result, the voltage level of the first power source VDDEL output from the switching converter SC including the boost control unit and the boost transistor changes the number of turns on/off the discharge switch unit DSW and the resistance value of the variable resistor RV. is discharged in response to Since the circuit shown in FIG. 8 uses a variable resistor RV, it is possible to quickly respond to a change in voltage level.

As shown in FIG. 9 , the power control circuit unit 183 may include a discharge switch unit DSW and a fixed resistor Rf. The power control circuit unit 183 adjusts the number of turns on/off of the discharge switch unit DSW based on the offset signal transmitted from the lookup table 183 .

As a result, the voltage level of the first power VDDEL output from the switching converter SC including the boost control unit and the boost transistor is discharged according to the number of turns on/off of the discharge switch unit DSW. Since the circuit shown in FIG. 9 uses the fixed resistor Rf, the design cost can be reduced.

As shown in (a) of FIG. 10 , in the experimental example, when the voltage is lowered, the discharge time is consumed until the image display section of the display panel 150, and the level change (A1) in the form of flicker on the screen. ≠ A2) is recognized.

As shown in (b) of FIG. 10 , in the embodiment, the discharge time is not consumed until the image display section of the display panel 150 when the voltage is lowered, so that the same shape as before is recognized on the screen. That is, a change in the level in the form of a screen change or flicker according to a change in voltage was not recognized.

As described above, the present invention has the effect of improving the display quality by improving the problem of recognizing a change in a screen according to a change in voltage or a change in a level in the form of flicker. In addition, the present invention has the effect of improving display quality and reliability by improving the problem of voltage change due to temperature compensation - such as transient characteristics.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the technical configuration of the present invention can be changed to other specific forms by those skilled in the art to which the present invention pertains without changing the technical spirit or essential features of the present invention. It will be appreciated that this may be practiced. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. In addition, the scope of the present invention is indicated by the claims to be described later rather than the above detailed description. In addition, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention.

110: image supply unit 120: timing control unit
125: sensor unit 130: scan driving unit
140: data driver 150: display panel
180: power supply TB: boost transistor
185: boost control unit 183: power control circuit unit
187: offset operation unit

Claims (11)

display panel;
a driving unit for driving the display panel;
a timing control unit for controlling the driving unit; and
and a power supply unit for outputting power to be supplied to the display panel;
The power supply unit performs a discharging operation to partially discharge the output power so that, when a temporary voltage drop of the power occurs, a dipping phenomenon according to the voltage drop in a blank section in which an image is not displayed on the display panel is terminated. According to claim 1,
The power supply unit
Compares the voltage level for the previous frame and the voltage level for the current frame, determines whether the voltage level of the power to be output to the current frame is in a rising phase or a falling phase, and if it corresponds to the falling phase, discharge operation during the blank period A display device, characterized in that. 3. The method of claim 2,
The power supply unit
A voltage level for the previous frame and a change in a voltage level for the current frame are compared in response to the power control signal supplied from the timing controller, and whether the voltage level of the power to be output to the current frame is the riser or the faller A display device for determining recognition. According to claim 1,
The power supply unit
and a power control circuit unit configured to discharge charges of an output capacitor positioned at an output terminal thereof so that a dipping phenomenon according to a voltage drop in the blank section is terminated when a temporary voltage drop of the power source occurs. 5. The method of claim 4,
The power control circuit unit
When a temporary voltage drop of the power source occurs, an offset value according to a difference between a voltage level for a previous frame and a voltage level for a current frame is extracted, and the charge of the output capacitor is discharged by an amount of a current corresponding to the offset value display device with According to claim 1,
The power supply unit
The voltage level of the first power to be output to the current frame is increased by comparing the change in voltage level due to the power control signal for the previous frame supplied from the timing controller and the power control signal for the current frame supplied from the timing controller. an offset calculating unit for determining whether it is a recognition or a descending period;
and a power control circuit unit configured to discharge charges of an output capacitor located at an output terminal of the power supply unit based on an offset signal extracted by interlocking the offset operation unit and an internal lookup table. According to claim 1,
The timing control unit
When temperature information is transmitted from the sensor unit interworking with the timing controller, the power supply unit supplies a power control signal to the power supply unit to output first power in response to the temperature information. comparing the voltage level with respect to the previous frame and the change of the voltage level with respect to the current frame, and determining whether a voltage level of power to be output through a power supply unit during the current frame is in a rising phase or a falling phase; and
and discharging a charge of an output capacitor positioned at an output terminal of the power supply unit when the voltage level of the power to be output through the power supply unit is in the descending period. 9. The method of claim 8,
The method of claim 1, wherein the step of discharging the charge of the output capacitor located at the output terminal of the power supply unit is performed during a blank period in which an image is not displayed on the display panel. 10. The method of claim 9,
When the step of discharging the charge of the output capacitor located at the output terminal of the power supply unit is the descending period, an offset value according to the voltage level difference between the voltage level for the previous frame and the voltage level for the current frame is extracted,
and discharging a charge of an output capacitor positioned at an output terminal of the power supply unit by an amount of current corresponding to the offset value. 5. The method of claim 4,
The power control circuit unit
connected to an output terminal of the power supply unit and one end of the output capacitor;
A display device comprising: a discharge switch unit configured to perform a switching operation to discharge charges of the output capacitor; and a variable resistor or a fixed resistor connected to the discharge switch unit.

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