KR102219795B1 - Solar cell - Google Patents

Abstract

The solar cell according to the present embodiment includes: a semiconductor substrate; A first conductivity type region formed on or on the semiconductor substrate; A second conductivity type region formed on or on the semiconductor substrate and formed locally; A first electrode connected to the first conductivity type region; And a second electrode including a connection portion connected to the second conductivity type region, and an electrode portion connected to the second conductivity type region through the connection portion and having a pattern.

Description

Solar cell {SOLAR CELL}

The present invention relates to a solar cell, and more particularly, to a solar cell with improved electrode structure.

Recently, as existing energy resources such as oil and coal are expected to be depleted, interest in alternative energy to replace them is increasing. Among them, solar cells are in the spotlight as next-generation cells that convert solar energy into electric energy.

In such a solar cell, it can be manufactured by forming various layers and electrodes according to design. However, solar cell efficiency can be determined according to the design of these various layers and electrodes. In order to commercialize a solar cell, it is necessary to overcome low efficiency, and various layers and electrodes are required to be designed to maximize the efficiency of the solar cell.

An object of the present invention is to provide a solar cell capable of improving efficiency.

A solar cell according to an embodiment of the present invention includes a semiconductor substrate; A first conductivity type region formed on or on the semiconductor substrate; A second conductivity type region formed on or on the semiconductor substrate and formed locally; A first electrode connected to the first conductivity type region; And a second electrode including a connection portion connected to the second conductivity type region, and an electrode portion connected to the second conductivity type region through the connection portion and having a pattern.

A solar cell according to another embodiment of the present invention includes a semiconductor substrate; A first conductivity type region formed on or on the semiconductor substrate; A second conductivity type region formed on or on the semiconductor substrate and formed locally; A first electrode connected to the first conductivity type region; And a second electrode including a connection portion connected to the second conductivity type region, and an electrode portion connected to the connection portion and spaced apart from the second conductivity type region and having a different material or composition from the connection portion.

In the solar cell according to the present embodiment, the second electrode connected to the second conductivity-type region having a local structure includes an island-shaped connection portion and an electrode portion having a pattern. Accordingly, the area of the connection portion connected to the second conductivity type region or the area of the opening formed corresponding thereto may be minimized to improve passivation characteristics and improve open-circuit voltage characteristics. In addition, it is possible to reduce material cost by making the composition of the electrode part different from that of the connection part (for example, by making the ratio of the conductive material smaller than the connection part).

1 is a cross-sectional view showing a solar cell according to an embodiment of the present invention.
2 is a front plan view of the solar cell shown in FIG. 1.
3 is a rear plan view of the solar cell shown in FIG. 1.
4 is a cross-sectional view taken along line IV-IV of FIG. 3.
5 is a flowchart showing a method of manufacturing a solar cell according to an embodiment of the present invention.
6A to 6F are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment of the present invention.
7 is a solar cell according to another embodiment of the present invention.
8 is a graph showing a result of measuring an open circuit voltage of a solar cell according to Examples and Comparative Examples.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, it goes without saying that the present invention is not limited to these embodiments and may be modified in various forms.

In the drawings, in order to clearly and briefly describe the present invention, portions not related to the description are omitted, and the same reference numerals are used for identical or extremely similar portions throughout the specification. In addition, in the drawings, the thickness and width are enlarged or reduced in order to clarify the description. However, the thickness and width of the present invention are not limited to those shown in the drawings.

In addition, when a certain part "includes" another part throughout the specification, the other part is not excluded, and other parts may be further included unless specifically stated to the contrary. In addition, when a part such as a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the case where the other part is "directly above", but also the case where the other part is located in the middle. When a part such as a layer, a film, a region, or a plate is "directly over" another part, it means that no other part is located in the middle.

Hereinafter, a solar cell and a manufacturing method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view showing a solar cell according to an embodiment of the present invention. For reference, FIG. 1 is a cross-sectional view taken along line I-I of FIG. 2.

Referring to FIG. 1, the solar cell 100 according to the present embodiment includes a semiconductor substrate 110 including a base region 10, a first conductivity type region 20 and a second conductivity type region having a first conductivity type. A second conductivity type region 30 having a conductivity type, a first electrode 42 connected to the first conductivity type region 20, and a second electrode 44 connected to the second conductivity type region 30 Includes. Here, the second electrode 44 includes a connection portion 442 connected to the second conductivity type region 30 and an electrode portion connected to the second conductivity type region 30 through the connection portion 442 and having a pattern ( 444). In addition, the solar cell 100 may further include a first passivation layer 22, an antireflection layer 24, and a second passivation layer 32. This will be described in more detail.

The semiconductor substrate 110 may be formed of a crystalline semiconductor. For example, the semiconductor substrate 110 may be formed of a single crystal or polycrystalline semiconductor (for example, single crystal or polycrystalline silicon). In particular, the semiconductor substrate 110 may be composed of a single crystal semiconductor (eg, a single crystal semiconductor wafer, more specifically, a single crystal silicon wafer). In this way, when the semiconductor substrate 110 is made of a single crystal semiconductor (eg, single crystal silicon), the solar cell 100 constitutes a single crystal semiconductor solar cell (eg, a single crystal silicon solar cell). As such, the solar cell 100 based on the semiconductor substrate 110 made of a crystalline semiconductor having high crystallinity and low defects may have excellent electrical characteristics.

The front and rear surfaces of the semiconductor substrate 110 may be textured to have irregularities. The irregularities are, for example, composed of the (111) surface of the semiconductor substrate 110 and may have a pyramid shape having an irregular size. When unevenness is formed on the front and rear surfaces of the semiconductor substrate 110 by such texturing to increase the surface roughness, reflectance of light incident through the front and rear surfaces of the semiconductor substrate 110 may be lowered. Accordingly, the amount of light reaching the pn junction formed by the base region 10 and the first conductivity type region 20 can be increased, thereby minimizing light loss.

In the drawings, it is illustrated that irregularities are formed on at least a portion of the front and rear surfaces of the semiconductor substrate 110, respectively. More specifically, in a portion where the electrodes 42 and 44 and the semiconductor substrate 110 are not connected, the above-described irregularities are located. In the portion where the electrodes 42 and 44 and the semiconductor substrate 110 are connected (that is, the portion where the connection portion 442 is located), the unevenness is removed or the unevenness is etched or deformed to have a smaller surface roughness than other portions, or a different portion It can have a different shape than For example, in the portion where the connection portion 442 is located, the unevenness is removed so that the semiconductor substrate 110 has a (110) surface, or the surface of the semiconductor substrate 110 in the portion where the connection portion 442 is located is It may be located to be recessed into the interior of the substrate 110. Other variations are possible. However, the present invention is not limited thereto, and the arrangement, shape, size, etc. of the irregularities may be variously modified.

The semiconductor substrate 110 may include a base region 10 having a second conductivity type by including a second conductivity type dopant at a relatively low doping concentration. For example, the base region 10 may be located farther from the front surface or closer to the rear surface of the semiconductor substrate 110 than the first conductivity type region 20. In addition, the base region 10 may be located closer to the front surface of the semiconductor substrate 110 and further away from the rear surface than the second conductivity type region 30. However, the present invention is not limited thereto, and of course, the position of the base region 10 may be changed.

Here, the base region 10 may be formed of a crystalline semiconductor including a second conductivity type dopant. For example, the base region 10 may be formed of a single crystal or polycrystalline semiconductor (for example, single crystal or polycrystalline silicon) including a second conductivity type dopant. In particular, the base region 10 may be formed of a single crystal semiconductor (eg, a single crystal semiconductor wafer, more specifically, a single crystal silicon wafer) including a second conductivity type dopant.

The second conductivity type may be n-type or p-type. When the base region 10 has an n-type, the base region 10 is a single crystal or polycrystalline semiconductor doped with Group 5 elements such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb). Can be done. When the base region 10 has a p-type, the base region 10 is a single crystal or polycrystalline semiconductor doped with Group III elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In). Can be done.

However, the present invention is not limited thereto, and the base region 10 and the second conductivity type dopant may be formed of various materials.

For example, the base region 10 may be n-type. Then, the first conductivity type region 20 forming the pn junction with the base region 10 has a p-type. When light is irradiated to the pn junction, electrons generated by the photoelectric effect move toward the second surface (hereinafter "rear surface") of the semiconductor substrate 110 and are collected by the second electrode 44, and holes are collected by the semiconductor substrate ( It moves toward the front side of 110) and is collected by the first electrode 42. This generates electrical energy. Then, holes having a slower moving speed than electrons move to the front surface of the semiconductor substrate 110 rather than the rear surface, thereby improving conversion efficiency. However, the present invention is not limited thereto, and the base region 10 and the second conductivity-type region 30 may have a p-type and the first conductivity-type region 20 may have an n-type.

A first conductivity type region 20 having a first conductivity type opposite to the base region 10 may be formed on the front side of the semiconductor substrate 110. The first conductivity type region 20 forms an emitter region that generates a carrier by photoelectric conversion by forming a pn junction with the base region 10.

In this embodiment, the first conductivity type region 20 may be formed of a doped region constituting a part of the semiconductor substrate 110. Accordingly, the first conductivity type region 20 may be formed of a crystalline semiconductor including the first conductivity type dopant. For example, the first conductivity type region 20 may be formed of a single crystal or polycrystalline semiconductor (eg, single crystal or polycrystalline silicon) including a first conductivity type dopant. In particular, the first conductivity type region 20 may be formed of a single crystal semiconductor (eg, a single crystal semiconductor wafer, more specifically, a single crystal silicon wafer) including a first conductivity type dopant. In this way, when the first conductivity type region 20 forms a part of the semiconductor substrate 110, the bonding property with the base region 10 may be improved.

However, the present invention is not limited thereto, and the first conductivity type region 20 may be formed on the semiconductor substrate 110 separately from the semiconductor substrate 110. In this case, the first conductivity type region 20 may be formed of a semiconductor layer having a crystal structure different from that of the semiconductor substrate 110 so that it can be easily formed on the semiconductor substrate 110. For example, the first conductivity type region 20 is an amorphous semiconductor, a microcrystalline semiconductor, or a polycrystalline semiconductor (for example, amorphous silicon, microcrystalline silicon, or polycrystalline silicon) that can be easily manufactured by various methods such as deposition. It may be formed by doping a first conductivity type dopant on the back. Other variations are possible.

The first conductivity type may be p-type or n-type. When the first conductivity-type region 20 has a p-type, the first conductivity-type region 20 is doped with Group III elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In). It may be made of single crystal or polycrystalline semiconductor. When the first conductivity-type region 20 has n-type, the first conductivity-type region 20 is doped with group 5 elements such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb). It may be made of single crystal or polycrystalline semiconductor. However, the present invention is not limited thereto, and various materials may be used as the first conductivity type dopant.

In the drawings, it is illustrated that the first conductivity type region 20 has a homogeneous structure having a uniform doping concentration as a whole. However, the present invention is not limited thereto. Accordingly, in another embodiment, the first conductivity type region 20 may have a selective structure. In the selective structure, a portion of the first conductivity type region 20 adjacent to the first electrode 42 has a high doping concentration, a large junction depth, and a low resistance, and a low doping concentration, a small junction depth, and a high resistance in other portions. Can have. Various structures other than this may be applied as the structure of the first conductivity type region 20.

On the rear side of the semiconductor substrate 110, a second conductivity type region 30 having the same second conductivity type as the base region 10, but including a second conductivity type dopant at a higher doping concentration than the base region 10 Can be formed. The second conductivity type region 30 forms a back surface field to prevent loss of carriers due to recombination on the surface of the semiconductor substrate 110 (more precisely, the rear surface of the semiconductor substrate 110). It constitutes the rear electric field area.

In this embodiment, the second conductivity type region 30 may be formed of a doped region constituting a part of the semiconductor substrate 110. Accordingly, the second conductivity type region 30 may be formed of a crystalline semiconductor including the second conductivity type dopant. As an example, the second conductivity type region 30 may be formed of a single crystal or polycrystalline semiconductor (for example, single crystal or polycrystalline silicon) including a second conductivity type dopant. In particular, the second conductivity type region 30 may be formed of a single crystal semiconductor (eg, a single crystal semiconductor wafer, more specifically, a single crystal silicon wafer) including a second conductivity type dopant. In this way, when the second conductivity type region 30 forms a part of the semiconductor substrate 110, the bonding property with the base region 10 may be improved.

However, the present invention is not limited thereto, and the second conductivity type region 30 may be formed on the semiconductor substrate 110 separately from the semiconductor substrate 110. In this case, the second conductivity type region 30 may be formed of a semiconductor layer having a crystal structure different from that of the semiconductor substrate 110 so that it can be easily formed on the semiconductor substrate 110. For example, the second conductivity type region 30 is an amorphous semiconductor, a microcrystalline semiconductor, or a polycrystalline semiconductor (eg, amorphous silicon, microcrystalline silicon, or polycrystalline silicon) that can be easily manufactured by various methods such as deposition. It may be formed by doping a second conductivity type dopant on the back. Other variations are possible.

The second conductivity type may be n-type or p-type. When the second conductivity-type region 30 has n-type, the second conductivity-type region 30 is doped with group 5 elements such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb). It may be made of single crystal or polycrystalline semiconductor. When the second conductivity-type region 30 has a p-type, the second conductivity-type region 30 is doped with Group III elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In). It may be made of single crystal or polycrystalline semiconductor. However, the present invention is not limited thereto, and various materials may be used as the second conductivity type dopant. In addition, the second conductivity type dopant of the second conductivity type region 30 may be the same material as the second conductivity type dopant of the base region 10, or may be a different material.

In this embodiment, the second conductivity type region 30 may be formed locally to have a local structure at a portion connected to the second electrode 44. More specifically, the second conductivity-type region 30 may include a plurality of regions 30a having an island shape spaced apart from each other.

Then, in the portion connected to the second electrode 44, the second conductivity type region 30 is located to reduce the contact resistance with the second electrode 44 to maintain excellent fill factor (FF) characteristics. Can be. In addition, in a portion not connected to the second electrode 44, the second conductivity type region 30 constituted by the doped region is not formed, thereby reducing recombination that may occur in the doped region, thereby reducing the short-circuit current (Jsc). ) And open-circuit voltage can be improved. In addition, since the internal quantum efficiency (IQE) has an excellent value in the portion where the second conductivity type region 30 is not formed, the characteristics for long wavelength light are very good. Compared to the formed homogeneous structure and the selective structure, it is possible to greatly improve the characteristics of light of a long wavelength. As described above, the second conductivity type region 30 of the localized structure is The efficiency of the solar cell 100 can be improved by maintaining excellent charging density, short-circuit current density, and open-circuit voltage related to efficiency.

A passivation film 22 and an antireflection film 24 are sequentially formed on the front surface of the semiconductor substrate 110, more precisely, on the first conductivity type region 20 formed on or on the semiconductor substrate 110, and the first The electrode 42 is formed by penetrating the passivation film 22 and the antireflection film 24 (ie, through the opening 102) and in contact with the first conductivity type region 20.

The passivation layer 22 and the antireflection layer 24 may be formed substantially over the entire surface of the semiconductor substrate 110 except for the opening 102 corresponding to the first electrode 42.

The passivation layer 22 is formed in contact with the first conductivity type region 20 to passivate defects present in the surface or bulk of the first conductivity type region 20. Accordingly, the open-circuit voltage (Voc) of the solar cell 100 may be increased by removing the recombination sites of minority carriers. The antireflection layer 24 reduces reflectance of light incident on the front surface of the semiconductor substrate 110. Accordingly, the reflectance of light incident through the front surface of the semiconductor substrate 110 is lowered, thereby increasing the amount of light reaching the pn junction formed by the base region 10 and the first conductivity type region 20. Accordingly, it is possible to increase the short-circuit current Isc of the solar cell 100. As described above, the open-circuit voltage and short-circuit current of the solar cell 100 may be increased by the passivation layer 22 and the anti-reflection layer 24, thereby improving the efficiency of the solar cell 100.

The passivation layer 22 may be formed of various materials. As an example, the passivation film 22 is a silicon nitride film, a silicon nitride film containing hydrogen, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, MgF ₂ , ZnS, TiO ₂ and any one single film selected from the group consisting of _{CeO 2 or} Two or more films may have a combined multilayer structure. As an example, the passivation layer 22 may include a silicon oxide layer, a silicon nitride layer, etc. having a fixed positive charge when the first conductivity type region 20 has an n-type, and the first conductivity type region 20 In the case of p-type, an aluminum oxide film or the like having a fixed negative charge may be included.

The anti-reflection film 24 may be formed of various materials. As an example, the antireflection film 24 is a silicon nitride film, a silicon nitride film containing hydrogen, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, MgF ₂ , ZnS, TiO ₂ and any one single film selected from the group consisting of _{CeO 2 or 2} It may have a multilayer structure in which two or more films are combined. As an example, the antireflection layer 24 may include silicon nitride.

However, the present invention is not limited thereto, and it goes without saying that the passivation layer 22 and the antireflection layer 24 may include various materials. In addition, it is possible that one of the passivation layer 22 and the antireflection layer 24 performs the antireflection role and the passivation role together so that the other is not provided. Alternatively, various films other than the passivation film 22 and the antireflection film 24 may be formed on the semiconductor substrate 110. Other variations are possible.

The first electrode 42 passes through the opening 102 formed in the passivation film 22 and the antireflection film 24 (that is, through the passivation film 22 and the antireflection film 24). 20) is electrically connected. The first electrode 42 may be formed of various materials to have various shapes. The planar shape of the first electrode 42 will be described with reference to FIG. 2.

2 is a front plan view of the solar cell shown in FIG. 1. In FIG. 2, the semiconductor substrate 110 and the first electrode 42 are mainly illustrated.

Referring to FIG. 2, the first electrode 42 may include a plurality of finger electrodes 42a spaced apart from each other while having a constant first pitch P1. In the drawings, the finger electrodes 42a are parallel to each other and parallel to the edge of the semiconductor substrate 110, but the present invention is not limited thereto. In addition, the first electrode 42 may include a bus bar electrode 42b formed in a direction crossing the finger electrodes 42a to connect the finger electrodes 42a. Only one bus electrode 42b may be provided, or a plurality of bus electrodes 42b may be provided while having a larger pitch than the first pitch P1 of the finger electrode 42a, as shown in FIG. 2. In this case, the width of the busbar electrode 42b may be larger than the width of the finger electrode 42a, but the present invention is not limited thereto. Accordingly, the width of the busbar electrode 42b may be equal to or smaller than the width of the finger electrode 42a. However, the present invention is not limited thereto, and it is also possible not to include the busbar electrode 42b.

Referring to FIGS. 1 and 2 together, when viewed in cross section, both the finger electrode 42a and the busbar electrode 42b of the first electrode 42 penetrate through the passivation layer 22 and the antireflection layer 24 It can also be formed. That is, the opening 102 may be formed to correspond to both the finger electrode 42a and the busbar electrode 42b of the first electrode 42. As another example, the finger electrode 42a of the first electrode 42 is formed through the passivation film 22 and the antireflection film 24, and the busbar electrode 42b is formed by the passivation film 22 and the antireflection film 24. ) Can be formed on. In this case, the opening 102 may be formed in a shape corresponding to the finger electrode 42a, and may not be formed in a portion where only the busbar electrode 42b is located.

As described above, in this embodiment, the first electrode 42 may be formed so that the finger electrode 42a and/or the bus bar electrode 42b contact the first conductivity type region 20 as a whole. Accordingly, a portion constituting the finger electrode 42a may be in continuous contact with the first conductivity type region 20 to be in line contact, and a portion constituting the busbar electrode 42b selectively is the first The conductive region 30 may be in continuous contact and line contact. As described above, in the first electrode 42, since the finger electrode 42a and/or the bus bar electrode 42b as a whole contact the first conductivity type region 20, the contact resistance is reduced to reduce the packing density of the solar cell 100. Can improve.

Referring back to FIG. 1, a passivation film 32 is formed on the rear surface of the semiconductor substrate 110, more precisely, on the second conductivity type region 30 formed in the semiconductor substrate 110, and the second electrode 44 It is connected to the second conductivity type region 30 through the passivation film 32 (ie, through the opening 104 ).

The passivation layer 32 may be formed substantially over the entire rear surface of the semiconductor substrate 110 except for the opening 104 corresponding to the second electrode 44.

The passivation film 32 is formed in contact with the second conductivity type region 30 to passivate defects existing in the surface or bulk of the second conductivity type region 30. Accordingly, the open-circuit voltage (Voc) of the solar cell 100 may be increased by removing the recombination sites of minority carriers.

The passivation layer 32 may be formed of various materials. As an example, the passivation film 32 is a silicon nitride film, a silicon nitride film containing hydrogen, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, MgF ₂ , ZnS, TiO ₂ and any one single film selected from the group consisting of _{CeO 2 or 2} It may have a multilayer structure in which two or more films are combined. For example, when the second conductivity type region 30 has an n-type, the passivation layer 32 may include a silicon oxide layer, a silicon nitride layer, etc. having a fixed positive charge, and the second conductivity type region 30 In the case of p-type, an aluminum oxide film or the like having a fixed negative charge may be included.

However, the present invention is not limited thereto, and it goes without saying that the passivation layer 32 may include various materials. Alternatively, various films other than the passivation film 32 may be formed on the rear surface of the semiconductor substrate 110. Other variations are possible.

The second electrode 44 is electrically connected to the second conductivity type region 30 through the opening 104 formed in the passivation layer 32. The second electrode 44 may be formed of various materials to have various shapes. The second conductivity type region 30 and the second electrode 44 will be described in detail with reference to FIGS. 3 and 4 along with FIG. 1.

3 is a rear plan view of the solar cell shown in FIG. 1, and FIG. 4 is a cross-sectional view taken along line IV-IV of FIG. 3.

As described above, in this embodiment, the second conductivity-type regions 30 include a plurality of island-shaped regions 30a spaced apart from each other. In the drawings, it is illustrated that each of the plurality of regions 30a has a circular shape, but the present invention is not limited thereto. The plurality of regions 30a may have various shapes such as polygons such as triangles, squares, and hexagons, ovals, or irregular shapes. Further, the plurality of regions 30a may be arranged in various shapes, for example, such that a plurality of adjacent regions 30a form a triangle, a square, a hexagon, or an irregular shape. In the drawing, as an example, a plurality of adjacent regions 30a are arranged to form a square.

The second electrode 44 according to the present embodiment is spaced apart from the connection portion 442 connected to the second conductivity type region 30 and the second conductivity type region 30 and conducts a second conductivity through the connection portion 442. An electrode part 444 connected to the mold region 30 may be included. In this case, the electrode part 444 may be formed of a material different from the connection part 442 and may be formed while having a certain pattern, and a plurality of the connection parts 442 may be disposed to partially correspond to the electrode part 444. That is, a plurality of connection portions 442 spaced apart from each other are positioned on one electrode portion 444 so that the electrode portion 444 and the connection portion 442 are evenly connected, while reducing the total area of the connection portion 442. The electrode part 444 will be described first, and then the connection part 442 will be described.

Referring to FIG. 3, the electrode portion 444 of the second electrode 44 may include a plurality of finger electrodes 444a spaced apart from each other while having a constant second pitch P2. Here, the second pitch P2 of the finger electrode 444a of the second electrode 44 may be smaller than the first pitch P1 of the finger electrode 42a of the first electrode 42. Accordingly, the number of finger electrodes 444a of the second electrode 44 may be greater than the number of finger electrodes 42a of the first electrode 42. This increases the incident amount of light by relatively reducing the number of finger electrodes 42a located on the front surface of the semiconductor substrate 110 to which light is incident relatively, and the rear surface of the semiconductor substrate 110 to which light is incident relatively less. Current collection efficiency can be improved by relatively increasing the number of finger electrodes 444a located at. In particular, when the area of the connection part 442 connected to the second conductivity type region 30 is smaller than the area of the first electrode 42 connected to the first conductivity type region 20 as in the present embodiment, 2 By increasing the number of finger electrodes 444a of the electrode 44, current collection efficiency can be improved to compensate for a small area.

In the drawings, the finger electrodes 444a are parallel to each other and parallel to the edge of the semiconductor substrate 110, but the present invention is not limited thereto. In addition, the electrode portion 444 of the second electrode 44 may include a bus bar electrode 444b formed in a direction crossing the finger electrodes 444a to connect the finger electrodes 444a. Only one bus electrode 44b may be provided, or a plurality of bus electrodes 44b may be provided while having a larger pitch than the second pitch P2 of the finger electrode 444a, as shown in FIG. 3. In this case, the width of the busbar electrode 444b may be larger than that of the finger electrode 444a, but the present invention is not limited thereto. Accordingly, the width of the busbar electrode 444b may have a width equal to or smaller than that of the finger electrode 444a. However, the present invention is not limited thereto, and it is also possible not to include the bus bar electrode 444b.

In the drawing, it is illustrated that the electrode portions 444 of the first electrode 42 and the second electrode 44 have the same planar shape. However, the present invention is not limited thereto. Accordingly, the first electrode 42 and the electrode portion 444 of the second electrode 44 may have different planar shapes, and various other modifications are possible.

In this embodiment, the electrode part 444 is connected to the second conductivity type region 30 through the connection part 442, and in a portion where the connection part 442 is not provided, the electrode part 444 forms the passivation film 32. It is positioned above the second conductivity type region 30 with the gap between. As a result, the electrode part 444 is positioned to be spaced apart from the second conductivity type region 30 by the passivation film 32 which is a kind of insulating film. That is, the finger electrode 444a and the bus bar electrode 444b constituting the electrode part 444 (the finger electrode 444a when the bus bar electrode 444b is not provided) are formed by the passivation film 32. It is located apart from the 2 conductivity type region 30 and does not contact the second conductivity type region 30.

The connection portion 442 connecting (for example, contacting and connecting them) between the second conductivity type region 30 and the electrode portion 444 is localized to correspond to the second conductivity type region 30 having a local structure. It can be formed as More specifically, the connection part 442 may include a plurality of connection portions 442a that correspond one-to-one to the plurality of regions 30a constituting the second conductivity type region 30.

Accordingly, the connection portion 442 (or each of the plurality of connection portions 442a) may have an island shape spaced apart from each other. The connection portion 442a may have various shapes such as polygons such as triangles, squares, and hexagons, circles, ovals, or irregular shapes. At this time, the size of the connecting portion 442a is equal to or smaller than each of the plurality of areas 30a of the second conductivity type area 30, so that the connecting portion 442a is entirely inside each of the plurality of areas 30a. Can be located. Here, the size of the connection portion 442a and the plurality of regions 30a may mean the length of the largest among diameters and widths. If the size of the connecting portion 442a is smaller than that of the plurality of regions 30a, the connecting portion 442a is formed even when an alignment-miss occurs due to a process error or the like when forming the connecting portion 442a. It may be connected to the plurality of regions 30a of the second conductivity type region 30.

At least a part of the connection part 442 may be located in the opening 104 of the passivation layer 32 and may be connected to the second conductivity type region 30 through the opening 104. Accordingly, the opening 104 of the passivation layer 32 may be disposed to have a shape corresponding to a portion of the connection portion 442 connected to the second conductivity type region 30. That is, a plurality of openings 104 may be provided to correspond to the plurality of regions 30a constituting the second conductivity type region 30 one-to-one, and the plurality of openings 104 may have an island shape in which each is spaced apart from each other. . Each of the plurality of openings 104 may have various shapes such as polygons such as triangles, squares, and hexagons, circles, ovals, or irregular shapes. Since the opening 104 is formed at the same position as the connection part 442, it may be arranged to have a shape such as a triangle, a square, or a hexagon. In this way, the connection portion 442 having a plurality of connection portions 442a is a second conductivity type region 30 (more precisely, a plurality of regions 30a) by an opening 104 having a shape and arrangement corresponding thereto. (Or, the semiconductor substrate 110 may be in point contact.

In this way, when the connection part 442 is formed locally to make point contact with the second conductivity type region 30, the area of the connection part 442 can be minimized. The passivation characteristic of the semiconductor substrate 110 may be deteriorated in the portion where the second electrode 44 is connected (that is, the portion where the connection portion 442 is located) from the rear surface of the semiconductor substrate 110. In this embodiment, the connection portion By minimizing the area of the 442, it is possible to improve the passivation characteristics at the rear surface of the semiconductor substrate 110. That is, when the opening 104 is formed in the passivation layer 32 to connect the second conductivity type region 30 and the second electrode 42 on the rear surface of the semiconductor substrate 110, the rear surface of the semiconductor substrate 110 This can be damaged. For example, when the opening 104 is formed in the passivation layer 32 by a process such as etching or fire-through, a part of the rear surface of the semiconductor substrate 110 may also be etched or deformed. Accordingly, the rear portion of the semiconductor substrate 110 in which the opening 104 or the connecting portion 442 is located has at least a portion of the unevenness removed or the unevenness is deformed to have a smaller surface roughness than other portions, or a depression (or retreat) than other portions. ) Can be located. During this process, the rear surface of the semiconductor substrate 110 may be damaged. Accordingly, if the area of the portion connected between the second conductivity type region 30 and the second electrode 44 increases, the area of the portion of the semiconductor substrate 110 where the passivation characteristic is degraded increases, and the passivation characteristic may be significantly reduced. have. In the present exemplary embodiment, since the second conductivity type region 30 and the second electrode 44 are connected only at the portion corresponding to the connection part 442, a decrease in passivation characteristics at the rear surface of the semiconductor substrate 110 can be minimized.

In such a structure, the ratio of the total area of the connecting portion 442 to the total area of the semiconductor substrate 110 (that is, the sum of the areas of the plurality of connecting portions 442a) is the electrode to the total area of the semiconductor substrate 110 It is smaller than the ratio of the total area of the portion 444 (that is, the sum of the areas of the plurality of finger electrodes 444a and the bus bar electrodes 444b). For example, the ratio of the total area of the connection unit 442 to the total area of the semiconductor substrate 110 may be 2% to 8%, and the total area of the electrode unit 444 to the total area of the semiconductor substrate 110 The ratio may be 6% to 18%. If the total area ratio of the connection part 442 is less than 2%, the connection with the second conductivity type region 30 may not be made in a sufficient area, and if it exceeds 8%, the effect of improving the passivation characteristics may not be sufficient. have. If the total area ratio of the electrode unit 444 is less than 6%, the resistance may increase and electrical characteristics may be deteriorated. If it exceeds 18%, the amount of light incident due to shading loss may be reduced. However, the present invention is not limited thereto.

For example, in this embodiment, the connection portion 442a includes a first portion 4241 formed parallel to the extension direction of the finger electrode 444a, and a first portion 4241 protruding in a direction crossing the extension direction of the finger electrode 444a. It may include two parts 4242. The first portion 4241 is formed parallel to the extension direction of the finger electrode 444a to sufficiently secure a contact area with the finger electrode 444a in the longitudinal direction. In addition, the second portion 4242 is formed in a direction crossing the second portion 4242 so that the width W of the connection portion 442a in the corresponding portion has a sufficient length. Accordingly, even when an alignment misalignment occurs due to a process error or the like during formation of the finger electrode 444a, the finger electrode 444a may be connected to the second portion 4242.

In the portion where the second portion 4242 is formed, the second portion 4242 may be positioned one on each side of the first portion 4241 to sufficiently secure the second width W2 of the connection portion 442a. have. In addition, when the alignment misalignment of the finger electrode 444a is shifted in the width direction by being located at positions corresponding to each other in the first part 4241, it is connected even when the finger electrode 444a is rotated by a certain angle to be inclined. It is possible to sufficiently secure a connection area between the portion 442a and the finger electrode 444a. The second portion 4242 may be positioned to correspond to a central portion of the first portion 4241 so as to cope with various types of misalignment. Accordingly, each connection portion 442a may be formed while having an approximate cross shape. Accordingly, the opening 104 corresponding to each connection portion 442a may also be formed while having a cross shape.

As described above, when the connecting portion 442a has a shape including the first portion 4241 and the second portion 4242, the area of the connecting portion 442a can be reduced while effectively responding to an alignment miss. That is, when the connecting portion 442a is formed in a circular shape having the above-described second width W2, the area of the connecting portion 442a may be relatively large. In this embodiment, some portions of the connecting portion 442a The bay may have the second width W2 so as to cope with various misalignments while reducing the area of the connecting portion 442a. However, the present invention is not limited thereto, and the connection portion 442a may have various shapes such as a circle, a polygon, and an irregular shape.

In this case, the first width W1 of the first part 4241 is smaller than the width W3 of the finger electrode 444a, and the second width W2 of the connection part 442a at the part where the second part 4242 is located. ) May be larger than the width W3 of the finger electrode 444a. Accordingly, in a plan view, at least a portion of the second portion 4242 may be positioned to protrude to the outside of the finger electrode 444a. By reducing the first width W1 of the first part 4241 in this way, the area of the connection part 442a can be reduced, and the second part 4242 has a relatively large second width W2. Thus, it is possible to effectively respond to misalignment. At the same time, the width W2 of the connection portion 442a in the second portion 4242 is smaller than the width W4 (for example, diameter) of the plurality of regions 30a of the second conductivity type region 30 The 442a may be entirely located inside the plurality of regions 30a.

For example, by making the pitch (substantially the same as the second pitch P2) of the plurality of regions 30a larger than the width W4 of the plurality of regions 30a, the second conductivity type region 30 The area of can be minimized. For example, the width W4 of each of the plurality of regions 30a may be 150um to 500um, and the pitch of the plurality of regions 30a may be 0.5mm to 1mm. This is determined in consideration of the number, total area, and open-circuit voltage characteristics of the plurality of regions 30a, but the present invention is limited thereto.

In addition, the second width W2 of the connection portion 442a where the second portion 4242 is located may be 140um to 450um, and the first width W1 of the connection portion 442a in the first portion 4241 is It may be 70um to 300um, and the width W3 of the finger electrode 444a may be 60um to 250um. This is a range to have excellent characteristics in consideration of the width W2 and the pitch P2 of the plurality of regions 30a. However, the present invention is not limited thereto.

As described above, in the present embodiment, the connection part 442 is located in the second conductivity type region 30 through the opening 104 of the passivation film 32 (that is, through the passivation film 32), and the electrode part The 444 may be positioned on the passivation layer 32 without penetrating it. Accordingly, the connection portion 442 may have a material or composition capable of penetrating the passivation layer 32, and the electrode unit 444 may have a material or composition that does not need to penetrate the passivation layer 32.

For example, the connection portion 442 and the electrode portion 444 having a certain pattern may be formed by printing a paste. Then, the connection portion 442 and the electrode portion 444 having a pattern can be easily formed by a simple process. In this case, the first paste for forming the connection portion 442 may have a material, composition, etc. capable of forming the opening 104 in the passivation layer 32, and a second paste for forming the electrode portion 444 May have a material, composition, etc. that do not form the opening 104 in the passivation layer 32. Then, the opening 104 may be formed by firing a paste for forming the connection portion 442 without performing a separate process of forming the opening 104. Specific compositions of the first and second pastes will be described in more detail later in the manufacturing method.

The connection portion 442 and the electrode portion 444 formed by the first and second pastes may have different compositions.

In addition, the amount of lead (Pb) or bismuth (Bi) in the connection portion 442 may be greater than the amount of lead or bismuth (Bi) in the electrode portion 444. Here, lead or bismuth is added in the form of lead oxide or bismuth oxide as part of the glass frit in the first or second paste. The lead oxide or bismuth oxide is a material that contributes to forming the opening 104 by penetrating the passivation layer 32 by fire-through during firing of the first paste. Accordingly, a large amount of lead oxide or bismuth oxide is included in the first paste forming the connection portion 442 to be formed of the opening 104 so that fire-through is smoothly achieved, and the opening 104 is not required. The amount of the second paste lead oxide or bismuth oxide forming the electrode part 444 may be relatively small. Accordingly, the amount of lead or bismuth in the connection part 442 is greater than the amount of lead or bismuth in the electrode part 444. However, the present invention is not limited thereto, and the amount of glass frit, lead, etc. may vary.

In this embodiment, the connecting portion 442 and the electrode portion 444 are formed by a printing process, and the opening 104 is formed by fire-through, so that the connecting portion 442 and the opening 104 are formed with a suitable material or composition. I have illustrated having. Accordingly, the process of forming the connecting portion 442 and the electrode portion 444 having a pattern and the process of forming the connecting portion 442 and the second conductivity type region 30 may be simplified, thereby improving productivity.

In this case, the content of the conductive material of the electrode part 444 may be smaller than the content of the conductive material of the connection part 442. The connection part 442 is a portion that directly contacts the second conductivity type region 30 and is formed in a relatively small area, so that the content of the conductive material can be relatively increased to secure electrical properties. In addition, since the electrode part 444 is formed in a relatively large area, the burden due to the increase in resistance is not large, and thus the content of the conductive material is relatively small, thereby reducing material cost.

However, the present invention is not limited thereto, and the connection portion 442 and the electrode portion 444 may be formed by different processes. Accordingly, the connection part 442 may be formed by a printing process, and the electrode part 444 may be formed in a plating process, a sputtering process, a deposition process, or the like. Then, the amount of the conductive material of the electrode part 444 made of a pure conductive material may be greater than the amount of the conductive material of the connection part 442 formed by firing the first paste including a glass frit, an organic vehicle, etc. . In addition, it is also possible to form the opening 104 by a separate process other than fire-through. Then, since the connection portion 442 does not have to contain a large amount of a material required for fire-through, the amount of lead or bismuth in the connection portion 442 and the electrode portion 444 may not be particularly limited. Other various modifications are possible, and accordingly, materials and compositions of the connection part 442 and the electrode part 444 may be variously modified.

As described above, in this embodiment, the first and second electrodes 42 and 44 of the solar cell 100 have a constant pattern, so that the solar cell 100 can enter the front and rear surfaces of the semiconductor substrate 110. It has a bi-facial structure. Accordingly, the amount of light used in the solar cell 100 may be increased, thereby contributing to the improvement of the efficiency of the solar cell 100. However, the present invention is not limited thereto, and it is also possible to have a structure in which the second electrode 44 is formed entirely on the rear side of the semiconductor substrate 110.

In addition, since the second conductivity type region 30 has a local structure, characteristics of the solar cell 100 may be improved. In this case, the second electrode 44 is formed locally so as to correspond to the second conductivity type region 30 and includes a plurality of connection portions 442a that are in point contact with the second conductivity type region 30. ), and an electrode part 444 connected to the second conductivity type region 30 by a connection part 442 and having a predetermined pattern.

Accordingly, by minimizing the area of the connection part 442 connected to the second conductivity type region 30 or the area of the opening 104 formed corresponding thereto, the passivation characteristic can be improved, and the open-circuit voltage characteristic can be improved. . In addition, by making the composition of the electrode part 444 different from that of the connection part 442 (for example, by making the ratio of the conductive material smaller than that of the connection part 442), material cost can be reduced.

The manufacturing method of the solar cell 100 described above will be described in detail with reference to FIGS. 5 and 6A to 6F. Hereinafter, detailed descriptions of the contents described above are omitted, and only different parts will be described in detail.

5 is a flowchart illustrating a method of manufacturing a solar cell according to an exemplary embodiment of the present invention, and FIGS. 6A to 6F are cross-sectional views illustrating a method of manufacturing a solar cell according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the method of manufacturing the solar cell 100 according to the present embodiment includes the steps of texturing a semiconductor substrate (ST10), forming a conductivity type region (ST20), and forming an insulating film (ST30). , Forming a connection part (ST40), forming an electrode part (ST50), and firing (ST60). This will be described in more detail together with FIGS. 6A to 6F.

Subsequently, as illustrated in FIG. 6A, in the texturing step ST10 of the semiconductor substrate, the semiconductor substrate 110 is textured.

At this time, at least one of the front and rear surfaces of the semiconductor substrate 110 may be textured to have irregularities. As the texturing of the surface of the semiconductor substrate 110, wet or dry texturing may be used. Wet texturing may be performed by immersing the semiconductor substrate 110 in a texturing solution, and has an advantage of short processing time. Dry texturing is to cut the surface of the semiconductor substrate 110 by using a diamond grill or a laser, etc., and while the unevenness can be uniformly formed, the process time is long and damage to the semiconductor substrate 110 may occur. In addition, the semiconductor substrate 110 may be textured by reactive ion etching (RIE). As described above, in the present invention, the semiconductor substrate 110 may be textured in various ways.

In this embodiment, both sides of the semiconductor substrate 110 are textured to minimize light loss in the solar cell 110 having a double-sided light-receiving structure. At this time, the process can be simplified by using wet texturing. However, the present invention is not limited thereto, and only one of the front and rear surfaces of the semiconductor substrate 110 may be textured.

Subsequently, as shown in FIG. 6B, in the step ST20 of forming a conductivity type region, the conductivity type regions 20 and 30 are formed on the semiconductor substrate 110. For example, the first conductivity type region 20 may be formed on the front surface of the semiconductor substrate 110 and/or the second conductivity type region 30 may be formed on the rear surface of the semiconductor substrate 110. The first conductivity type region 20 and the second conductivity type region 30 may be formed by doping with a dopant by various methods such as an ion implantation method, a thermal diffusion method, and a laser doping method.

In this embodiment, for example, the conductive regions 20 and 30 may be formed by an ion implantation method. When the first and second conductivity-type dopants are implanted by the ion implantation method to form the conductivity-type regions 20 and 30, activation heat treatment may be performed after ion implantation. That is, when the first and second conductivity-type dopants are ion-implanted into the semiconductor substrate 110, the implanted first and second conductivity-type dopants are located at positions other than the lattice position and are not activated. When the semiconductor substrate 110 in this state is activated and heat treated, the first and second conductivity type dopants are moved to the lattice position and activated. In addition, since the first and second conductivity type dopants are diffused by the activation heat treatment, the implantation depth is greater than before the activation heat treatment. In this embodiment, defects in the semiconductor substrate 110 that may occur during reactive ion etching during such activation heat treatment may be cured. However, the present invention is not limited thereto.

In this case, the second conductivity type region 30 may be doped using the mask 200 having a plurality of island-shaped openings 210 spaced apart from each other. As described above, the mask 200 having a plurality of island-shaped openings 210 is easier to manufacture than a mask having a line shape. In addition, since the formation area of the opening 210 is small, it is possible to effectively prevent sagging of the mask 200 and thus have a long life.

Subsequently, as shown in FIG. 6C, in the step ST30 of forming an insulating film, insulating films 22, 24, and 32 are formed on the conductive regions 20 and 30.

More specifically, a passivation film 22 and an antireflection film 24 are formed on the first conductivity type region 20 and a passivation film 32 and a capping film 34 are formed on the second conductivity type region 30. . The passivation layers 22 and 32 and the antireflection layer 24 may be formed by various methods such as vacuum deposition, chemical vapor deposition, spin coating, screen printing, or spray coating. In addition, the order of formation of the passivation layers 22 and 32 and the antireflection layer 24 may be variously modified.

Subsequently, as shown in FIG. 6D, in the step ST40 of forming the connection part, a first paste 4420 for forming a connection part (reference numeral 442 in FIG. 6F, hereinafter the same) or for forming the connection part 442 is formed. It is applied on the passivation film 32. The first paste 4420 may be applied by printing or the like, but the present invention is not limited thereto.

The first paste 4420 may include a conductive powder (more specifically, a metal powder, for example, silver (Ag) powder), a glass frit, an organic binder, a solvent, and the like. After the first paste 4420 is applied on the passivation film 32, it has to pass through the passivation film 32 and be connected to the second conductivity type region 30 by fire-through during the firing process, so it has a composition capable of fire-through. I can. For example, the amount of lead oxide or bismuth oxide that enables fire through in the glass frit can be made relatively high. In addition, the first paste 4420 may further include various additives such as a dispersant and a thixotropic agent.

At this time, in this embodiment, the paste 420 for forming the first electrode 42 may be applied together. The paste 420 for forming the first electrode 42 may have the same composition as the first paste 4420. Then, the paste 420 of the first electrode 42 and the first paste 4420 may include the same composition, thereby simplifying the process.

Next, as shown in FIG. 6E, in the step ST50 of forming an electrode part, a second paste for forming an electrode part (reference numeral 444 in FIG. 6F, the same hereinafter) or forming the electrode part 444 ( 4440) is applied on the first paste 4420. More specifically, it may be applied on the first paste 4420 and on the passivation layer 32 adjacent to the first paste 4420. The second paste 4440 may be applied by printing or the like, but the present invention is not limited thereto.

The second paste 4440 may include a conductive powder (more specifically, a metal powder, for example, silver (Ag) powder), a glass frit, an organic binder, a solvent, and the like. Since the second paste 4440 does not need to be fired through after it is applied on the passivation layer 32, it may have a composition in which fire-through is not possible. For example, the amount of lead oxide or bismuth oxide in the second paste 4440 may be smaller than the amount of lead oxide or bismuth oxide in the first paste 4420. In addition, the second paste 4440 may further include various additives such as a dispersant and a thixotropic agent.

If necessary, the content of the conductive powder in the second paste 4440 may be smaller than the content of the conductive powder in the first paste 4420. This is because, compared to the first paste 4420 formed with a relatively small area, the second paste 4440 formed with a relatively large area does not have a large burden of increasing resistance even if the content of the conductive powder is relatively small. . As described above, if the content of the conductive material in the second paste 4440 is relatively small, the total amount of the conductive material used in the widely formed second paste 4440 can be reduced, thereby reducing material cost.

Subsequently, as shown in FIG. 6F, in the firing step ST60, the first and second pastes 4420 and 4440, and the paste 420 are fired. Then, a fire-through phenomenon occurs due to the first paste 4420 so that the first paste 4420 penetrates the passivation layer 32 located below. Accordingly, the first paste 4420 is fired while being connected to the second conductivity type region 30 to form the connection part 422. In this case, the unevenness may be removed from the rear surface of the semiconductor substrate 110 to which the connection part 422 is connected, or the size of the unevenness may be reduced. Accordingly, in the portion where the connection portion 422 is located, the rear surface of the semiconductor substrate 110 may have a (100) surface or may have a smaller surface roughness than other portions. The second paste 4420 is fired on the connection portion 422 and the passivation layer 32 to constitute the electrode portion 444.

Further, a fire-through phenomenon occurs due to the paste 420 so that the paste 420 penetrates the passivation layer 22 and the antireflection layer 24 located below. Accordingly, the paste 420 is fired while being connected to the first conductivity type region 320 to form the first electrode 42.

When the printing process is used as described above, a process for forming the first and second electrodes 42 and 44, a process for connection with the conductive regions 20 and 30, etc. can be simplified, thereby improving productivity. However, the present invention is not limited thereto, and the first electrode 42, the connection part 442 of the second electrode 44, and the electrode part 444 may be formed by various processes other than the printing process.

As described above, according to the manufacturing method of the solar cell 100 according to the present embodiment, the second electrode 44 including the connection portion 442 and the electrode portion 444 having necessary characteristics and shapes, respectively, is formed by a simple process. can do. Accordingly, the productivity of the solar cell 100 having excellent characteristics can be improved.

Hereinafter, a solar cell according to another embodiment of the present invention will be described in detail. Detailed description of the same or similar parts as those of the above-described embodiment will be omitted, and only other parts will be described in detail.

7 is a solar cell according to another embodiment of the present invention.

Referring to FIG. 7, in the solar cell 100 according to the present embodiment, the first electrode 42 includes a connection part 422 and an electrode part 442. The description of the connection portion 422 of the first electrode 42 may be applied to the description of the connection portion 442 of the second electrode 44, and the description of the electrode portion 424 of the first electrode 44 A description of the electrode portion 442 of the second electrode 44 may be applied. However, the pitch of the finger electrode of the electrode portion 424 of the first electrode 44 may be applied to the pitch of the finger electrode 44a of the first electrode 44 of the embodiment described with reference to FIGS. 1 to 4. have.

As an example, in this embodiment, it is illustrated that the first conductivity type region 20 has an optional structure. That is, in the present embodiment, the first conductivity type region 20 is formed adjacent to the connection portion 422 of the first electrode 42 to form a first portion 20a in contact with the connection portion 422, and the first portion. It may include a second portion 20b formed in a portion other than (20a). In this case, the first part 20a may include a plurality of regions having a plurality of island shapes spaced apart from each other to correspond to the connection part 422. The planar shape and arrangement of the first portion 20a are similar to the planar shape and arrangement of the second conductivity type region 30 of the embodiment described with reference to FIGS. 1 to 4, and thus detailed descriptions thereof will be omitted.

The first portion 20a may have a relatively low resistance due to a high doping concentration, and the second portion 20b may have a relatively high resistance due to a lower doping concentration than the first portion 20a. In addition, if the thickness of the first portion 20a is thin, since the connection portion 422 of the first electrode 42 penetrates the first portion 20a and contacts the base region 10, a shunt may occur. The thickness of the first portion 20a may be thicker than that of the first portion 20a. That is, the junction depth of the first portion 20a may be greater than the junction depth of the second portion 20b.

As described above, in the present embodiment, a second part 20b having a relatively high resistance is formed in a part other than the connection part 422 to which light is incident to implement a shallow emitter. Accordingly, the current density of the solar cell 100 can be improved. In addition, by forming the first portion 20a having a relatively low resistance in a portion adjacent to the connection portion of the first electrode 42, contact resistance with the first electrode 42 may be reduced. That is, the first conductivity type region 20 of the present embodiment can maximize the efficiency of the solar cell 100 by a selective structure.

However, the present invention is not limited thereto, and the first conductivity type region 20 may have various other structures.

In this way, when the first electrode 42 connected to the first conductivity type region 20 includes the connection part 422 and the electrode part 424, the passivation characteristic on the front side of the semiconductor substrate 110 can be improved. , It is possible to further reduce the open-circuit voltage of the solar cell 100. Accordingly, the efficiency of the solar cell 100 may be further improved.

In the drawing, it is illustrated that the second electrode 44 includes the connection portion 442 and the electrode portion 444, but the present invention is not limited thereto. In this embodiment, the second electrode 44 may include only finger electrodes and/or busbar electrodes, and may be connected (for example, contact) to the second conductivity type region 30 as a whole. Other variations are possible.

Hereinafter, the present invention will be described in more detail by an embodiment of the present invention. The following examples are only presented for illustration of the present invention, but the present invention is not limited thereto.

Example

A semiconductor substrate having an n-type base region and unevenness by texturing on the front and rear surfaces was prepared. The emitter region is formed by doping boron (B) on the front surface of the semiconductor substrate by ion implantation, and phosphorus (P) is doped on the back surface of the semiconductor substrate by ion implantation method using a mask to form the rear electric field region of a localized structure. I did.

A passivation film and an antireflection film were formed on the front surface of the semiconductor substrate, and a passivation film was formed on the rear surface of the semiconductor substrate.

Then, a paste having a finger electrode and a busbar electrode shape was formed on the front surface of the semiconductor substrate, and a plurality of island-shaped first pastes were formed on the rear surface of the semiconductor substrate. Then, a second paste having the shape of a finger electrode and a bus bar electrode was formed on the first paste. These were fired. Accordingly, the paste on the front surface of the semiconductor substrate penetrated through the passivation layer and the anti-reflection layer and was fired while being connected to the emitter region to form a first electrode. Then, the first paste on the rear surface of the semiconductor substrate penetrates the passivation layer and is fired in point contact with the rear electric field region to form a connection portion of the second electrode. Then, the second paste was fired to form an electrode portion of the second electrode.

Comparative example

A solar cell was manufactured in the same manner as in Example except that a first paste having the form of a finger electrode and a bus bar electrode was formed on the rear surface of the semiconductor substrate and the second paste was not formed. At this time, the first paste on the rear surface of the semiconductor substrate penetrates the passivation layer and is fired with the finger electrode and the bus bar electrode connected to the rear electric field region to form a second electrode.

The open circuit voltage of the solar cells according to the Examples and Comparative Examples was measured, and the results are shown in FIG. 8. 8 shows the results of measuring the open-circuit voltage of solar cells according to Examples and Comparative Examples while increasing the fraction of the rear electric field region (BSF) (the ratio of the total area of the rear electric field region to the total area of the semiconductor substrate). .

According to the example, the solar cell had an open circuit voltage superior to that of the solar cell according to the comparative example in the fraction of all rear electric field regions. In particular, as in the solar cell according to the present embodiment, when the fraction of the rear electric field region that is point-contacted is minimized, the open-circuit voltage is approximately 4.5 mV higher than that of the solar cell according to the comparative example. Accordingly, the efficiency of the solar cell can be greatly increased.

Features, structures, effects, etc. according to the above are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment may be combined or modified for other embodiments by a person having ordinary knowledge in the field to which the embodiments belong. Accordingly, contents related to such combinations and modifications should be construed as being included in the scope of the present invention.

100: solar cell
10: base area
20: first conductivity type region
30: second conductivity type region
42: first electrode
44: second electrode
442: connection
444: electrode part

Claims (20)

A semiconductor substrate;
A first conductivity type region formed on or on the semiconductor substrate;
A second conductivity type region formed on or on the semiconductor substrate and formed locally;
A first electrode connected to the first conductivity type region; And
A second electrode including a connection portion connected to the second conductivity type region and an electrode portion connected to the second conductivity type region through the connection portion and having a pattern
Including,
A solar cell, characterized in that a part of the connection part has a width wider than that of the electrode part, and is disposed so as to be out of the electrode part. The method of claim 1,
A solar cell in which the electrode part is made of a different material or composition from the connection part. The method of claim 2,
A solar cell in which the amount of the conductive material of the connection part is greater than the amount of the conductive material of the electrode part. The method of claim 2,
A solar cell in which the amount of lead or bismuth in the connection portion is greater than the amount of lead or bismuth in the electrode portion. The method of claim 1,
A solar cell in which the connection portion is formed locally to correspond to the second conductivity type region. The method of claim 5,
The second conductivity-type regions are spaced apart from each other and include a plurality of regions having an island shape,
The solar cell comprising a plurality of connection portions corresponding to each of the plurality of regions and making point contact with the second conductivity type region. The method of claim 1,
An insulating film having an opening is positioned on the second conductivity type region,
The connection portion is located at least within the opening,
A solar cell in which the electrode portion is spaced apart from the second conductivity type region with the insulating layer therebetween. The method of claim 1,
The electrode portion includes a plurality of finger electrodes,
A solar cell in which the plurality of finger electrodes are spaced apart from the second conductivity type region in a portion where the connection portion is not formed. The method of claim 8,
The electrode portion further comprises a bus bar electrode extending in a direction crossing the plurality of finger electrodes,
A solar cell in which the busbar electrode is positioned to be spaced apart from the second conductivity type region. The method of claim 8,
The solar cell includes a first portion formed in parallel with an extension direction of the finger electrode and a second portion protruding in a direction crossing the extension direction of the finger electrode. The method of claim 10,
A solar cell in which each of the second portions is located at positions corresponding to each other on both sides of the first portion. The method of claim 10,
The solar cell wherein the second portion is located at a central portion of the first portion. The method of claim 10,
The solar cell having the connection portion cross-shaped. The method of claim 10,
The width of the first portion is smaller than the width of the finger electrode,
A solar cell in which the width of the connection portion is greater than the width of the finger electrode in the portion where the second portion is formed. The method of claim 1,
The second conductivity-type regions are spaced apart from each other and include a plurality of regions having an island shape,
The connecting portion includes a plurality of connecting portions respectively corresponding to the plurality of regions,
A solar cell in which sizes of the plurality of connecting portions are smaller than those of the plurality of regions. The method of claim 1,
A solar cell in which a ratio of the total area of the connection part to the total area of the semiconductor substrate is less than the ratio of the total area of the electrode part to the total area of the semiconductor substrate. The method of claim 1,
A solar cell having a larger pitch of the second conductivity type region than the size of the second conductivity type region. The method of claim 17,
The size of the second conductivity type region is 150 um to 500 um,
A solar cell having a pitch of the second conductivity type region of 0.5 mm to 1 mm. The method of claim 1,
The ratio of the total area of the connection part to the total area of the semiconductor substrate is 2% to 8%,
A solar cell in which a ratio of the total area of the electrode part to the total area of the semiconductor substrate is 6% to 18%. A semiconductor substrate;
A first conductivity type region formed on or on the semiconductor substrate;
A second conductivity type region formed on or on the semiconductor substrate and formed locally;
A first electrode connected to the first conductivity type region; And
A second electrode including a connection portion connected to the second conductivity type region, and an electrode portion connected to the connection portion and spaced apart from the second conductivity type region and having a different material or composition from the connection portion
Including,
A solar cell, characterized in that a part of the connection part has a width wider than that of the electrode part, and is disposed so as to be out of the electrode part.

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