KR101816676B1 - Probe card - Google Patents

Probe card Download PDF

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Publication number
KR101816676B1
KR101816676B1 KR1020160017905A KR20160017905A KR101816676B1 KR 101816676 B1 KR101816676 B1 KR 101816676B1 KR 1020160017905 A KR1020160017905 A KR 1020160017905A KR 20160017905 A KR20160017905 A KR 20160017905A KR 101816676 B1 KR101816676 B1 KR 101816676B1
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KR
South Korea
Prior art keywords
probe
circuit board
interposer
printed circuit
main printed
Prior art date
Application number
KR1020160017905A
Other languages
Korean (ko)
Other versions
KR20170096480A (en
Inventor
안윤태
김태현
Original Assignee
(주) 루켄테크놀러지스
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Application filed by (주) 루켄테크놀러지스 filed Critical (주) 루켄테크놀러지스
Priority to KR1020160017905A priority Critical patent/KR101816676B1/en
Publication of KR20170096480A publication Critical patent/KR20170096480A/en
Application granted granted Critical
Publication of KR101816676B1 publication Critical patent/KR101816676B1/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07371—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate card or back card with apertures through which the probes pass
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06755—Material aspects
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/0735—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card arranged on a flexible frame or film
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Abstract

The present invention relates to a probe card. A probe card according to an embodiment of the present invention includes a probe block including a plurality of probe pins contacting a semiconductor device, a main printed circuit board including a through hole through which the probe block penetrates, and electrically connected to the probe block; An interposer positioned above the probe block and the main printed circuit board and electrically connecting the probe block to the main printed circuit board; And a base plate for fixing the probe block, the main printed circuit board, and the interposer, the interposer including a film portion and a circuit pattern portion formed on one surface of the film portion.

Description

Probe card {PROBE CARD}

The present invention relates to a probe card for inspecting semiconductor devices.

Generally, a probe card electrically connects a wafer and a semiconductor device inspection equipment to test performance of the semiconductor device during or after manufacturing the semiconductor device, and transmits the electrical signal of the semiconductor device inspection equipment onto the semiconductor die, And transmits a signal returning from the semiconductor die to the semiconductor device testing equipment.

A typical probe card consists of a main circuit board (PCB), a space transformer (STF), and a tip fixedly attached to the space deflector. At this time, the space transformer is composed of a multilayer ceramic substrate (MLC: Multi Layer Ceramic).

In this connection, in Korean Provisional Patent No. 1181520 (name: probe card and manufacturing method), a probe card for testing a semiconductor die in contact with a pad formed on a plurality of semiconductor dies on a wafer, comprising: a main circuit board; A block plate attached to the main circuit board and having a number of grooves equal to the number of the plurality of semiconductor dies; A plurality of sub-probe units detachably coupled to the grooves and corresponding to the plurality of semiconductor dies; And an interposer electrically connecting the sub-probe unit to the main circuit board, wherein one of the plurality of sub-probe units is in contact with a pad formed on one of the plurality of semiconductor dies for testing one of the plurality of semiconductor dies A plurality of probe tips; A probe substrate on which a plurality of probe tips are mounted; To convert the pitch, a spatial transformer is disclosed that is bonded to the probe substrate and connected to the interposer.

As described above, in the conventional probe card, the interposer and the space transformer are required to change the pitch between the probe tip and the main circuit board, and the configuration is complicated.

In addition, when the probe tip is formed at a fine pitch, there is a problem that the contact terminal of the main circuit board needs to be formed at a fine pitch in order for the contact terminal of the main circuit board and the probe tip to correspond one to one.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a probe card which can be applied to a probe block having a fine pitch.

According to a first aspect of the present invention, there is provided a probe card comprising: a probe block including a plurality of probe pins contacting a semiconductor element; a through hole through which the probe block penetrates; A main printed circuit board electrically connected to the block; An interposer positioned above the probe block and the main printed circuit board and electrically connecting the probe block to the main printed circuit board; And a base plate for fixing the probe block, the main printed circuit board, and the interposer, the interposer including a film portion and a circuit pattern portion formed on one surface of the film portion.

According to a second aspect of the present invention, there is provided a method of manufacturing an interposer, comprising: preparing a wafer; A first photolithography step of forming a photoresist pattern for forming a flat pad and a bump film on the wafer; Electroplating the photoresist pattern to form a flat pad and a bump pad on a portion removed in the first photolithography step; A second photolithography step of forming a photoresist pattern for forming a circuit pattern space on the photoresist pattern; Electroplating the photoresist pattern formed in the second photolithography step to form a circuit pattern on the removed portion in the second photolithography step; Bonding the film portion to an upper portion of the circuit pattern; And removing the wafer and the photoresist pattern.

According to a third aspect of the present invention, there is provided a probe card manufacturing method comprising: preparing a probe block and a main printed circuit board; Fabricating an interposer; Inserting the probe block into the through hole of the main circuit board; Placing the interposer on top of the probe block and the main printed circuit board so that the probe block and the main printed circuit board are electrically connected; And positioning the base plate on top of the interposer and fixing the probe block, the main printed circuit board, and the interposer using a fixing member.

According to the present invention, the interposer is manufactured in the form of a film, the structure is simple, and a circuit pattern is formed on the interposer through the MEMS process, so that the interposer can be applied to a probe block having a fine pitch It is effective.

1 is a cross-sectional view of a probe card according to an embodiment of the present invention.
2 is an exploded perspective view of a probe card according to an embodiment of the present invention.
3 is an enlarged view of A and B in Fig.
4 is a perspective view of a main printed circuit board according to an embodiment of the present invention.
5 is a cross-sectional view of a probe block according to an embodiment of the present invention.
6 is a flowchart illustrating a method of fabricating an interposer according to an embodiment of the present invention.
7 is a view for explaining a method of manufacturing an interposer according to an embodiment of the present invention.
8 is a flowchart illustrating a method of manufacturing a probe card according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. It should be understood, however, that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the same reference numbers are used throughout the specification to refer to the same or like parts.

Throughout this specification, when a part is referred to as being "connected" to another part, it is not limited to a case where it is "directly connected" but also includes the case where it is "electrically connected" do.

Throughout this specification, when a member is " on " another member, it includes not only when the member is in contact with the other member, but also when there is another member between the two members.

Throughout this specification, when an element is referred to as "including " an element, it is understood that the element may include other elements as well, without departing from the other elements unless specifically stated otherwise. The terms "about "," substantially ", etc. used to the extent that they are used throughout the specification are intended to be taken to mean the approximation of the manufacturing and material tolerances inherent in the stated sense, Accurate or absolute numbers are used to help prevent unauthorized exploitation by unauthorized intruders of the referenced disclosure. The word " step (or step) "or" step "used to the extent that it is used throughout the specification does not mean" step for.

The present invention relates to a probe card for inspecting semiconductor devices.

FIG. 1 is a sectional view of a probe card according to an embodiment of the present invention, FIG. 2 is an exploded perspective view of a probe card according to an embodiment of the present invention, FIG. 3 is an enlarged view of A and B of FIG. 4 is a perspective view of a main printed circuit board according to an embodiment of the present invention, FIG. 5 is a sectional view of a probe block according to an embodiment of the present invention, FIG. 6 is a cross- FIG. 7 is a view for explaining a method of manufacturing an interposer according to an embodiment of the present invention, and FIG. 8 is a flowchart for explaining a method of manufacturing a probe card according to an embodiment of the present invention. to be.

Hereinafter, a probe card 10 (hereinafter referred to as " probe card 10 ") according to an embodiment of the present invention will be described with reference to Figs. 1 and 2. Fig.

The probe card 10 may be a device for one-to-one contact with a semiconductor device and transmitting an electrical signal transmitted from the semiconductor device testing device onto the semiconductor device.

The probe card 10 includes a probe block 100, a main printed circuit board 200, an interposer 300, and a base plate 400.

The probe block 100 includes a plurality of probe pins 110 that are in contact with semiconductor devices. At this time, the probe pin 110 includes tungsten and gold, and may be coated with Teflon on the outer surface. Accordingly, the probe pin 110 is excellent in electrical conductivity and excellent in insulating property. Also, the probe block 100 may be a vertical probe block 100, as shown in FIG.

In detail, the plurality of probe pins 110 receive an electric signal of the external inspection apparatus from the main printed circuit board 200, transmit the electric signal to the semiconductor element, receive a signal coming back from the semiconductor element, (200).

The main printed circuit board 200 may include a through hole 210 through which the probe block 100 passes. 3 and 4, the main printed circuit board 200 has a through-hole 210 formed at a central portion corresponding to the probe block 100, and a through- A plurality of connection portions 220 contacting the bump pads 323 of the interposer 300 can be formed.

The probe block 100 may be inserted through the through hole 210 of the main printed circuit board 200 and may be coupled to the base plate 400 to be described later.

In addition, the main printed circuit board 200 may receive an external test signal, output an electric signal, and be electrically connected to the probe block 100.

In other words, the main printed circuit board 200 receives the electric signal of the external inspection apparatus and transmits it to the probe block 100, receives the electric signal returned from the probe block 100, and transmits the electric signal to the external inspection apparatus have.

At this time, the probe block 100 and the main printed circuit board 200 can transmit or receive electrical signals to / from each other through the interposer 300.

1, the interposer 300 is disposed on the probe block 100 and the main printed circuit board 200, and electrically connects the probe block 100 and the main printed circuit board 200 to each other, You can connect.

2, the interposer 300 may include a film portion 310 and a circuit pattern portion 320 formed on one side of the film portion 310. [ Illustratively, the film portion 310 may comprise a polyimide film. The above-described one surface may be the 6 o'clock direction of Fig.

The circuit pattern portion 320 includes a circuit pattern 321 and a flat pad 322 which is located at one side of the circuit pattern 321 and is in contact with the upper end of the probe pin 110, And a bump pad 323 that is located in contact with the connection portion 220 of the main printed circuit board 200.

2 to 4, an electric signal received through the probe pin 110 is received through the flat pad 322 and passes through the circuit pattern 321 and the bump pad 323 to be printed by the main printing And may be transmitted to the connection portion 220 of the circuit board 200. The electric signal transmitted from the main printed circuit board 200 may be transmitted through the bump pad 323 and may be transmitted to the probe pin 110 through the circuit pattern 321 and the flat pad 322.

At this time, the bump pad 323 may have a predetermined elastic force, thereby absorbing external vibrations or shocks, thereby preventing breakage of the interposer 300 and the main printed circuit board 200.

The base plate 400 is located on the top of the interposer 300 and can fix the probe block 100, the main printed circuit board 200, and the interposer 300.

In detail, the base plate 400 is formed with a plurality of holes (not designated by reference numerals) are perforated and correspond to the base plate 400 and the probe block 100, the main printed circuit board 200 and the interposer 300 (Not shown) can be drilled. A fixing member (not shown) is fixed to the holes of the base plate 400 and the holes of the base plate 400 are fixed to the respective probe blocks 100, the main printed circuit board 200 and the interposer 300 The probe block 100, the main printed circuit board 200, and the interposer 300 may be fixed to the base plate 400. [

The base plate 400 is fixed to the main printed circuit board 200 to prevent the main printed circuit board 200 from being deformed by an external force.

The above-described external force may include not only physical force but also thermal deformation by temperature.

Hereinafter, a probe block 100 according to an embodiment of the present invention will be described with reference to FIG.

The probe block 100 includes a plurality of probe pins 110, an upper guide portion 130 into which the upper portions of the plurality of probe pins 110 are inserted, a lower guide portion 120 into which the lower portions of the plurality of probe pins 110 are inserted, And a plurality of fixing pins 140 coupled to the upper and lower guides 110 and 120 so that the upper and lower guide portions 110 and 120 are spaced apart from each other.

The upper guide part 130 includes a plurality of upper wafer parts 131 and an upper wafer part 131 in which a plurality of holes into which the probe pins 110 are inserted are formed at the same positions, At least one upper holder portion 132 may be provided.

The lower guide part 120 includes a plurality of lower wafer parts 121 and lower wafer parts 121 spaced apart from each other in the vertical direction in which a plurality of holes into which the probe pins 110 are inserted are formed at the same positions, And may include at least one or more lower holder portions 122.

The lower guide part 120 includes a plurality of holes into which the probe pins 110 are inserted and a plurality of holes for receiving the probe pins 110 are formed in the lower guide part 120. In the lower guide part 120, A plurality of holes into which the guide film (not shown) and the probe pins 110 are inserted are formed and a second guide film (not shown) positioned on the upper surface of the lower wafer part 131 located at the uppermost one of the lower wafer parts 131 (Not shown).

The first and second guide films can protect the surface of the lower wafer part 131 from the outside and prevent foreign matter from being inserted into the holes formed in the lower wafer part 131. [

In addition, the probe pin 110 may be arranged to be slightly inclined within a range of 85 degrees to 90 degrees, even if the probe pin 110 is vertical. In this case, the plurality of holes may be formed to be slightly different in position from one wafer to another.

In other words, when a plurality of probe pins 110, which will be described later, are respectively inserted through the holes corresponding to each other in the vertical direction among the plurality of holes, the concept including the case where the probe pins 110 are arranged so as to be inclined in this manner .

Since the size of the probe pin 110 may be slightly different along the vertical direction, a plurality of holes formed in each of the plurality of wafer portions may be slightly different in size from each other.

5, the upper and lower holder portions 122 and 132 may be disposed at predetermined intervals in which a plurality of holders are stacked in order, and each of the holders includes at least one wafer portion 121, 131 may be located.

In addition, the wafer portions 121 and 131 having a plurality of holes for arranging the probe pins 110 are manufactured through the MEMS process, so that the plurality of holes can have fine pitches therebetween. In other words, the probe block 100 can be manufactured using a MEMS process to overcome the fabrication limit in securing fine pitches of conventional machining. In other words, such a fine pitch can not be obtained through conventional machining, but can be regarded as a threshold value derived from a difference in manufacturing method that can be secured only through the MEMS process.

Hereinafter, a method of manufacturing an interposer according to an embodiment of the present invention will be described with reference to FIGS. 6 and 7. FIG.

First, in step S110, the wafer 301 can be prepared. At this time, a sheet layer may be formed on the upper surface of the wafer 301 by vapor deposition. As an example, a thin film can be formed by a sputtering method as a seed layer.

Next, in step S120, a first photolithography process is performed on the wafer 301 to form a photoresist pattern 302 for forming the flat pad 322 and the bump pad 323 .

Specifically, the first photolithography step (S120) includes applying a photoresist layer 302 to the top surface of the wafer 301, a flat pad 322 to be printed on the top surface of the photoresist layer 302, Depositing a mask on which the pad 323 is drawn, exposing the wafer 301 on which the mask is placed by emitting ultraviolet light, developing the photoresist layer 302, and patterning the photoresist layer 302 . ≪ / RTI >

Next, in step S130, the photoresist pattern is electroplated to form the flat pad 303 and the bump pad 303 in the portion removed in the first photolithography step.

Next, in step S140, a second photolithography process is performed on the photoresist pattern 302 to form a photoresist pattern for forming a circuit pattern space.

In detail, the second photolithography step S140 includes a step of applying a photoresist layer 304 on the photoresist pattern 303, a step of forming a circuit pattern 321 to be printed on the upper surface of the photoresist layer 304 Depositing a mask, exposing ultraviolet light to expose the wafer on which the mask is placed, developing the photoresist layer 304, and patterning the photoresist layer 304.

Next, in step S150, the photoresist pattern formed in the second photolithography step may be subjected to electroplating to form the circuit pattern 305 on the removed portion in the second photolithography step.

Next, at step S160, the film portion 306 may be adhered to the upper portion of the circuit pattern 321. [

At this time, it is possible to attach the upper part of the circuit pattern 305 to the lower surface of the film part 306 using an adhesive. Illustratively, the adhesive may be resin, epoxy, or the like, but not limited thereto, an adhesive tape may be used.

Next, in step S170, the wafer 301 and the photoresist layers 302 and 304 can be removed.

Illustratively, an etchant can be used to remove the wafer 301 and the photoresist layers 302 and 304. However, the present invention is not limited thereto, and the wafer 301 may be first removed through a mechanical polishing or chemical etching method, and then the photoresist layers 302 and 304 may be removed with an etching solution.

Hereinafter, a probe card manufacturing method according to an embodiment of the present invention will be described with reference to FIG.

First, in step S210, the probe block 100 and the main printed circuit board 200 are prepared. At this time, the probe block 100 may be a vertical probe block described in Korean Patent No. 1366036.

The main printed circuit board 200 may have a through hole 210 through which the probe block 100 passes and a connecting portion 220 formed on the top surface thereof.

Next, in step S220, the interposer 300 can be manufactured.

A detailed description of the method of manufacturing the interposer 300 will be omitted in the detailed description of the interposer manufacturing method.

Next, in step S230, the probe block 100 can be inserted into the through hole of the main printed circuit board 200. [

At this time, the probe block 100 may be inserted such that the upper surface of the main printed circuit board 200 and the upper surface of the probe block 100 are located on the same plane.

Next, in step S240, the interposer 300 is mounted on the probe block 100 and the main printed circuit board 200 so that the probe block 100 and the main printed circuit board 200 are electrically connected to each other. Can be seated.

A plurality of flat pads 322 connected to the probe pins 110 of the probe block 100 and a plurality of connection pads 322 connected to the connection portions 220 of the main PCB 200 are formed on one surface of the interposer 300. [ And the circuit pattern 321 connecting the respective flat pads 322 and the bump pads 323 can be formed. When the interposer 300 is mounted on the probe block 100 and the main printed circuit board 200, the probe pins 110 are aligned one-to-one with the connection portions 220 of the main printed circuit board 200 Can be connected.

Next, in step S250, the base plate 400 is placed on the upper portion of the interposer 300, and the probe block 100, the main printed circuit board 200, and the interposer 300 Can be fixed.

The base plate 400 is formed with a plurality of holes into which the fixing members are inserted and the holes of the base plate 400 are formed in the interposer 300, the main printed circuit board 200 and the probe block 100, The probe block 100, the main printed circuit board 200, and the interposer 300 can be fixed to the base plate 400. In addition,

It will be understood by those of ordinary skill in the art that the foregoing description of the embodiments is for illustrative purposes and that those skilled in the art can easily modify the invention without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is defined by the appended claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

10: Probe card
100: Probe block 110: Probe pin
120: lower guide part 121: lower wafer part
122: Lower holder part
130: upper guide part 131: upper wafer part
132: upper holder part 140:
200: main printed circuit board 210: through hole
220: Connection
300: interposer 310: film part
320: circuit pattern part 321: circuit pattern
322: flat pad 323: bump pad
400: base plate

Claims (12)

In the probe card,
A probe block having a plurality of probe pins contacted with semiconductor elements;
A main printed circuit board including a through hole through which the probe block passes, the main printed circuit board being electrically connected to the probe block;
An interposer located above the probe block and the main printed circuit board and electrically connecting the probe block to the main printed circuit board; And
And a base plate located on the upper portion of the interposer and fixing the probe block, the main printed circuit board, and the interposer,
The interposer
A film portion and a circuit pattern portion formed on one surface of the film portion,
The probe block
A plurality of probe pins;
An upper guide portion into which an upper portion of the plurality of probe pins is inserted;
A lower guide portion into which a lower portion of the plurality of probe pins is inserted; And
And a plurality of fixing pins coupled to the upper and lower guides such that the upper and lower guide portions are fixedly spaced apart from each other,
The upper guide portion
A plurality of upper wafers each having a plurality of holes into which the probe pins are inserted,
And an upper holder part for spacing the plurality of upper wafer parts in the vertical direction.
The method according to claim 1,
The circuit pattern portion
Circuit pattern;
A flat pad located on one side of the circuit pattern and contacting an upper end of the probe pin; And
And a bump pad located on the other side of the circuit pattern and contacting the main printed circuit board.
The method according to claim 1,
Wherein the film portion comprises a polyimide film.
3. The method of claim 2,
Wherein the bump pad has a predetermined elastic force.
The method according to claim 1,
The probe pin
Tungsten and gold, and the outer surface is Teflon coated.
delete delete The method according to claim 1,
The lower guide portion
A plurality of lower wafers each having a plurality of holes into which the probe pins are inserted,
And the lower wafer portion includes at least one lower holder portion that is spaced apart in the vertical direction.
9. The method of claim 8,
The lower guide portion
A plurality of holes into which the probe pins are inserted, a first guide film positioned on a lower surface of a lower wafer positioned on the lowermost side of the lower wafer,
Further comprising a second guide film formed on the upper surface of the lower wafer located on the uppermost one of the lower wafers, wherein the plurality of holes into which the probe pins are inserted are formed.
In the interposer manufacturing method,
Preparing a wafer;
A first photolithography step of forming a photoresist pattern for forming a flat pad and a bump pad on the wafer;
Electroplating the photoresist pattern to form a flat pad and a bump pad on a portion removed in the first photolithography step;
A second photolithography step of forming a photoresist pattern for forming a circuit pattern space on the photoresist pattern;
Performing electroplating on the photoresist pattern formed in the second photolithography step to form a circuit pattern on a portion removed during the second photolithography step;
Bonding a film portion to an upper portion of the circuit pattern; And
And removing the wafer and photoresist layer.
In the probe card manufacturing method,
Preparing a probe block and a main printed circuit board;
Fabricating an interposer;
Inserting the probe block into the through hole of the main printed circuit board;
Placing the interposer on top of the probe block and the main printed circuit board so that the probe block and the main printed circuit board are electrically connected; And
Positioning the base plate on top of the interposer and fixing the probe block, the main printed circuit board, and the interposer using a fixing member,
The step of fabricating the interposer
Preparing a wafer;
A first photolithography step of forming a photoresist pattern for forming a flat pad and a bump pad on the wafer;
Electroplating the photoresist pattern to form a flat pad and a bump pad on a portion removed in the first photolithography step;
A second photolithography step of forming a photoresist pattern for forming a circuit pattern space on the photoresist pattern;
Performing electroplating on the photoresist pattern formed in the second photolithography step to form a circuit pattern on a portion removed during the second photolithography step;
Bonding a film portion to an upper portion of the circuit pattern; And
And removing the wafer and the photoresist layer. delete
KR1020160017905A 2016-02-16 2016-02-16 Probe card KR101816676B1 (en)

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KR102201929B1 (en) * 2019-10-11 2021-01-12 스테코 주식회사 Probe card
KR102342805B1 (en) * 2019-12-26 2021-12-23 (주)포인트엔지니어링 Probe card
KR102361396B1 (en) * 2020-04-22 2022-02-10 (주)포인트엔지니어링 Anodic oxide structure and probe card comprising thereof
CN112002684A (en) * 2020-08-17 2020-11-27 北京蓝智芯科技中心(有限合伙) Space conversion substrate based on rewiring circuit layer and preparation method thereof
KR102272987B1 (en) * 2021-01-27 2021-07-05 주식회사 프로이천 Bump Type Probe Card

Citations (2)

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Publication number Priority date Publication date Assignee Title
KR101033400B1 (en) 2009-06-05 2011-05-09 남주한 space transformer of probe card for electrical tester of semiconductor wafer and manufacturing method therefor
KR101384399B1 (en) * 2013-02-13 2014-04-10 이영희 Probe card

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
KR101033400B1 (en) 2009-06-05 2011-05-09 남주한 space transformer of probe card for electrical tester of semiconductor wafer and manufacturing method therefor
KR101384399B1 (en) * 2013-02-13 2014-04-10 이영희 Probe card

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