KR101720345B1 - Organic Light Emitting Diode Display And Driving Method Thereof - Google Patents

Abstract

An organic light emitting diode display device according to the present invention includes a display panel having a pixel structure in which a driving current flowing in an organic light emitting diode is proportional to a square of a difference between a data voltage and a reference voltage; A method of detecting a still picture having no change in the average luminance over a predetermined period of time using an average luminance of input digital video data and a count value of a vertical synchronizing signal, A restoring image compensating circuit for generating a reference voltage adjusting signal for adjusting a reference voltage; And a reference voltage generating circuit for generating the reference voltage at a second level lower than the original first level according to the reference voltage adjusting signal to increase the display luminance for a predetermined period of time.

Description

[0001] The present invention relates to an organic light emitting diode (OLED) display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting diode (OLED) display device, and more particularly, to an organic light emitting diode display device and a method of driving the same.

2. Description of the Related Art In recent years, development of various flat panel displays (FPD) has been accelerated. Particularly, the organic light emitting diode display device has advantages of high response speed, high luminous efficiency, high luminance and wide viewing angle by using a self-luminous element which emits light by itself.

The organic light emitting diode display device has an organic light emitting diode for each pixel. The organic light emitting diode includes an organic compound layer formed between the anode electrode and the cathode electrode. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light.

The organic light emitting diode display device arranges the pixels including the organic light emitting diode in a matrix form and controls the brightness of the pixels according to the gray level of the video data. The organic light emitting diode display device selectively turns on the TFT, which is an active element, to select a pixel, and maintains the light emission of the pixel with the voltage stored in the storage capacitor.

In such an organic light emitting diode display device, as shown in Fig. 2, a problem of restoration afterglow is becoming an issue. The restoration after-image is a phenomenon in which the outline of the previous screen remains unchanged at the time of screen switching after displaying the still image for a long time (for example, three minutes in Fig. 2) and is visually confirmed. The restored afterimage is generated because the data value of the (n-1) -th frame charged in the storage capacitor of each pixel is not updated in the n-th frame.

The restoration residual image becomes worse as the time required for the afterimage restoration is prolonged as shown in Fig. FIG. 3 shows a retention time for each input gray scale in the case where the input digital video data is implemented with 8 bits. As the input gray scale decreases from an input gray level lower than a specific value (for example, 192 gray levels) Indicating that the restoration time is getting longer. As can be seen from this, when the display image is switched from a high luminance to a low luminance, a restored afterimage is particularly recognizable to the eye.

Conventionally, a method of further including a capacitor or the like in the pixel circuit to reduce the time for which the residual image disappears has been used. However, such a hardware compensation method not only causes a side effect in which display unevenness and flicker characteristics are deteriorated, but also leaves a problem that the afterimage can not be solved even in a low gradation period.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an organic light emitting diode display device and a method of driving the same, in which the image quality is improved by rapidly erasing a restoration afterglow without physically changing the pixel circuit.

According to an aspect of the present invention, there is provided an organic light emitting diode display comprising: a display panel having a pixel structure in which a driving current flowing in an organic light emitting diode is proportional to a square of a difference between a data voltage and a reference voltage; A method of detecting a still picture having no change in the average luminance over a predetermined period of time using an average luminance of input digital video data and a count value of a vertical synchronizing signal, A restoring image compensating circuit for generating a reference voltage adjusting signal for adjusting a reference voltage; And a reference voltage generating circuit for generating the reference voltage at a second level lower than the original first level according to the reference voltage adjusting signal to increase the display luminance for a predetermined period of time.

The reference voltage generating circuit gradually restores the reference voltage to the first level after the predetermined period in accordance with the reference voltage adjusting signal.

Wherein the restoration residual image compensation circuit comprises: an image analyzing unit that receives digital video data on a frame basis and analyzes input digital video data of one frame to calculate the average luminance; A lookup table for preliminarily storing a plurality of reference voltage adjustment signals composed of a few bits of logic signals according to a correlation between an average luminance of the first value for the still picture display and an average luminance of the second value for the other picture display, ; And a controller for receiving the average luminance for each frame and monitoring a frame having a larger or smaller average luminance, determining a change in the average luminance in a frame having a larger or smaller average luminance, To the stop time monitoring value to detect the still picture having no change in the average luminance over a predetermined time period and to generate the reference voltage adjusting signal when referring to the lookup table when switching from the still picture to another picture And a compensation control unit.

The compensation control unit determines whether the average luminance is greater than a predetermined first luminance threshold or smaller than a predetermined second luminance threshold and monitors a frame having the average luminance larger or smaller.

The compensation control unit determines that there is a screen switch from the still image to another image when the count value of the vertical synchronization signal is greater than a predetermined count threshold and there is a change in the average luminance.

The predetermined period is selected as a three-frame period.

The reference voltage is regulated in a plurality of steps between the first level and the second level, and is gradually restored to the first level in one frame after the predetermined period.

A method of driving an organic light emitting diode display having a pixel structure in which a driving current flowing through an organic light emitting diode is proportional to a square of a difference between a data voltage and a reference voltage according to an embodiment of the present invention includes: A reference voltage adjustment signal for adjusting the level of the reference voltage when the screen is switched from the still screen to another screen is detected by using a count value of the synchronous signal, Generating step; And generating the reference voltage at a second level lower than the original first level according to the reference voltage adjustment signal to increase the display luminance for a predetermined period of time.

The organic light emitting diode display device and the driving method thereof according to the present invention generate a reference voltage for a predetermined period at a second level lower than the original first level to switch the screen from the still picture to another, And gradually restores the reference voltage to the first level after the predetermined period. Accordingly, the present invention can rapidly erase the restored afterimage without physically changing the pixel circuit, thereby greatly increasing the display quality.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining the principle of light emission of a general organic light emitting diode display device. FIG.
2 is a diagram for explaining a cause of occurrence of a residual image.
FIG. 3 is a view showing a restoration time for each input group when input digital video data is implemented with 8 bits; FIG.
4 is a view illustrating an organic light emitting diode display device according to an embodiment of the present invention.
5 and 6 are views showing an example of a pixel structure in which a driving current flowing through an organic light emitting diode is proportional to a square of a difference between a data voltage and a reference voltage and an operation thereof.
7 is a diagram showing a detailed configuration of a restoration image stabilization circuit;
8 is a view showing a control procedure of a restoration residual image compensation circuit;
9 is a view showing a result of a simulation on a time when a residual image disappears when an image is switched to each luminance level in a high-gradation image.
10 is a view showing an adjustment level of a reference voltage when a screen is switched from a still screen to another screen;

Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 4 to 10. FIG.

4 is a block diagram illustrating an organic light emitting diode display device according to an embodiment of the present invention.

4, an organic light emitting diode display device according to an embodiment of the present invention includes a display panel 10 in which pixels P are arranged in a matrix, a data driving circuit (not shown) for driving the data lines 14, A gate driving circuit 13A for driving the gate lines 15; an emission driving circuit 13B for driving the emission lines 16; and driving circuits 12 and 13A And a reference voltage control signal CMD and a reference voltage Vref at a level determined according to the reference voltage adjustment signal CMD. And a reference voltage generating circuit 30 which generates a reference voltage.

A plurality of data lines 14, a plurality of gate lines 15 and emission lines 16 are intersected with each other in the display panel 10 and the pixels P are arranged in a matrix form in each of the intersection areas. The pixel P is connected to the data line 14, the gate line 15 and the emission line 16, respectively. The pixel P receives the high potential driving voltage ELVDD and the low potential driving voltage ELVSS from an external power supply circuit and supplies the reference voltage Vref from the reference voltage generating circuit 30 Receive. The pixel P has a structure in which the driving current flowing through the organic light emitting diode is proportional to the square of the difference between the data voltage and the reference voltage Vref. For example, the pixel P may be implemented as shown in FIGS. 5 and 6. FIG.

The timing controller 11 arranges the digital video data RGB input from the outside in accordance with the resolution of the display panel 10 and supplies the data to the data driving circuit 12. The timing controller 11 is also connected to the data driving circuit 12 based on timing signals such as a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a dot clock signal DCLK and a data enable signal DE, A gate control signal GDC for controlling the operation timing of the gate drive circuit 13A and a gate control signal GDC for controlling the operation timing of the emission drive circuit 13B, And generates an emission control signal EDC.

The data driving circuit 12 converts the digital video data RGB into analog data voltages under the control of the timing controller 11 and supplies them to the data lines 14. [

The gate drive circuit 13A generates a scan signal SCAN under the control of the timing controller 11 and supplies it to the gate lines 15. [ The gate drive circuit 13A includes a shift register for shifting the scan signal SCAN. The shift register can be formed directly on the display panel 10 according to the GIP (Gate In Panel) method.

The emission driving circuit 13B generates an emission signal EM under the control of the timing controller 11 and supplies it to the emission lines 16. [ The emission driving circuit 13B includes an inverted shift register for shifting the emission signal EM. The inverted shift register can be formed directly on the display panel 10 according to the GIP (Gate In Panel) method.

The restoration residual image compensation circuit 20 generates a reference voltage adjustment signal CMD for adjusting the generation level of the reference voltage Vref based on the input digital video data RGB and the vertical synchronization signal Vsync. The restoration residual image compensation circuit 20 uses a count value of an average luminance AL of the input digital video data RGB and a count value of the vertical synchronization signal Vsync to stop And generates a reference voltage adjustment signal CMD for adjusting the generation level of the reference voltage Vref at the time of switching the screen from the still screen to the other screen. The restoration residual image compensation circuit 20 can be incorporated in the timing controller 11. [

The reference voltage generating circuit 30 generates the reference voltage Vref at a level determined according to the reference voltage adjusting signal CMD. In response to the reference voltage adjustment signal CMD, the reference voltage generating circuit 30 generates the reference voltage Vref at a second level lower than the original first level during a predetermined period of time when the screen is switched from the still screen to another screen Thereby improving the visual residual image, and gradually restoring the reference voltage Vref to the first level after the predetermined period of time.

5 and 6 show an example of a pixel P structure and its operation in which the driving current flowing through the organic light emitting diode is proportional to the square of the difference between the data voltage and the reference voltage Vref.

5 and 6, the pixel P includes a driving element DT, first to fifth TFTs T1 to T5, a storage capacitor Cst, and a light emitting diode OLED. The first to fifth TFTs T1 to T5 and the driving device DT are implemented as a p-type MOS TFT (Metal Oxide Semiconductor TFT).

The driving element DT supplies the driving current from the input terminal of the high potential driving voltage ELVDD to the organic light emitting diode OLED and controls the driving current to the gate-source voltage. The gate electrode of the driving element DT is connected to the first node N1. The source electrode of the driving element DT is connected to the input terminal of the high potential driving voltage ELVDD, and the drain electrode thereof is connected to the second node N2.

The first TFT (T1) switches the current path between the first node (N1) and the second node (N2) in response to the scan pulse (SCAN). The first TFT T1 is a sampling TFT and is turned on during a second period P2 to apply a threshold voltage of the driving device DT to the first node N1 by diode-connecting the driving device DT. The gate electrode of the first TFT (T1) is connected to the gate line (15). The source electrode of the first TFT T1 is connected to the first node N1, and the drain electrode thereof is connected to the second node N2.

The second TFT T2 switches the current path between the data line 14 and the third node N3 in response to the scan pulse SCAN. The second TFT T2 is turned on during the second period P2 to supply the data voltage Vdata to the third node N3. The gate electrode of the second TFT (T2) is connected to the gate line (15). The source electrode of the second TFT T2 is connected to the data line 14, and the drain electrode thereof is connected to the third node N3.

The third TFT T3 switches the current path between the third node N3 and the input terminal of the reference voltage Vref in response to the emission pulse EM. The third TFT T3 is turned on during the first and fourth periods P1 and P4 to apply the reference voltage Vref to the third node N3. The gate electrode of the third TFT (T3) is connected to the emission line (16). The source electrode of the third TFT T3 is connected to the third node N3, and the drain electrode thereof is connected to the input terminal of the reference voltage Vref.

The fourth TFT T4 switches the current path between the second node N2 and the fourth node N4 in response to the emission pulse EM. The fourth TFT T4 is turned off during the second and third periods P2 and P3 to cut off the current path between the driving element DT and the organic light emitting diode OLED and the first and fourth periods P1 , P4) to form a current path between the driving element DT and the organic light emitting diode OLED. The gate electrode of the fourth TFT (T4) is connected to the emission line (16). The source electrode of the fourth TFT T4 is connected to the second node N2, and the drain electrode thereof is connected to the fourth node N4.

The fifth TFT T5 switches the current path between the input terminal of the reference voltage Vref and the fourth node N4 in response to the scan pulse SCAN. The fifth TFT T5 is turned on during the first and second periods P1 and P2 to apply the reference voltage Vref to the fourth node N4. The gate electrode of the fifth TFT (T5) is connected to the gate line 15. [ The source electrode of the fifth TFT T5 is connected to the fourth node N4, and the drain electrode thereof is connected to the input terminal of the reference voltage Vref.

The storage capacitor Cst is connected between the first node N1 and the third node N3 to maintain the gate voltage of the driving element DT.

A multilayer organic compound layer is formed between the anode electrode and the cathode electrode of the organic light emitting diode (OLED). The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). The organic light emitting diode OLED emits light in a fourth period P4 in which the emission pulse EM is kept in the low logic state in accordance with the driving current supplied under the control of the driving element DT. The anode electrode of the organic light emitting diode OLED is connected to the fourth node N4, and the cathode electrode thereof is connected to the input terminal of the low potential driving voltage ELVSS.

The operation of the pixel P will be described in detail as follows.

During the first period P1, the first, second and fifth TFTs T1, T2 and T5 are turned on in response to the scan pulse SCAN of low logic, and the first, The third and fourth TFTs T3 and T4 are turned on in response. As a result, the potential VN1 of the first node N1 is initialized to the reference voltage Vref. Also, the potentials of the second and fourth nodes N2 and N4 are discharged to the reference voltage Vref level. At this time, since the voltage difference between the reference voltage Vref and the low-potential driving voltage ELVSS is equal to or less than the threshold voltage of the organic light-emitting diode OLED or a reverse bias is applied to the organic light-emitting diode OLED, The drive current does not flow.

During the second period P2, the first, second and fifth TFTs T1, T2, and T5 maintain the turn-on state in response to the scan pulse SCAN of low logic. In the second period P2, the primary compensation voltage ELVDD + Vth including the threshold voltage Vth of the driving element DT is applied to the first node N1 by the driving element DT that is diode-connected , And the data voltage Vdata is applied to the third node N3. The storage capacitor Cst stores the primary compensation voltage ELVDD + Vth applied to the first node N1. Further, the fourth node N4 maintains the reference voltage Vref by the fifth TFT T5 held in the turn-on state. The organic light emitting diode OLED maintains the non-emission state during the second period P2 because the anode voltage is low to the reference voltage Vref. During the second period P2, the third and fourth TFTs T3 and T4 are turned off in response to the emission pulse EM of high logic.

During the third period P3, the first, second and fifth TFTs T1, T2, and T5 are turned off in response to the sensing pulse SCAN of high logic. At this time, the potential VN1 of the first node N1 is maintained at the primary compensation voltage ELVDD + Vth. During the third period P3, the third and fourth TFTs T3 and T4 maintain the turn-off state in response to the emission pulse EM of high logic.

During the fourth period P4, the first, second and fifth TFTs T1, T2 and T5 maintain the turn-off state in response to the sensing pulse SCAN of high logic, EM and the third and fourth TFTs T3 and T4 are turned on. As a result, the reference voltage Vref is applied to the third node N3. Thus, the potential of the third node N3 is changed to a value obtained by subtracting the reference voltage Vref from the data voltage Vdata. The potential variation Vdata-Vref of the third node N3 is reflected in the first node N1 so that the potential VN1 of the first node N1 is set to the final compensation voltage ELVDD + Vth + Vdata-Vef Is set. The drive current Ioled is a difference value (Vgs-Vth) between the gate-source voltage Vgs of the driving element DT and the threshold voltage Vth of the driving element DT as shown in the following equation (1) Is determined by the formula proportional to the square of The driving current Ioled is proportional to the square of the difference between the data voltage Vdata and the reference voltage Vref by the potential VN1 of the first node N1, that is, the gate voltage of the driving element DT Value ((Vdata-Vef) ² ).

Here, 'μ' denotes the mobility of the driving device DT, 'Cox' denotes the parasitic capacitance of the driving device DT, 'W' denotes the channel width of the driving device DT, Vth is the threshold voltage of the driving element DT, Vdata is the data voltage, and Vref is the gate voltage of the driving element DT. Are reference voltages, respectively.

FIG. 7 shows the detailed configuration of the restoration image stabilization circuit 20.

The restoration residual image compensation circuit 20 includes an image analysis unit 22, a compensation control unit 24, and a lookup table 26.

The image analyzing unit 22 receives the digital video data RGB in units of frames and analyzes the input digital video data RGB for one frame to calculate the average luminance AL.

The compensation controller 24 receives the average luminance AL from the image analyzer 22 every frame and monitors a frame having a larger or smaller average luminance AL. The compensation control unit 24 determines a change in the average luminance AL in a frame having a large or small average luminance AL and reflects the determination result to the stopping time monitoring value at every counting of the vertical synchronization signal Vsync . The compensation control unit 24 detects a still image having no change in the average luminance AL over a predetermined time based on the stop time monitoring value. The compensation control unit 24 generates the reference voltage adjustment signal CMD by referring to the lookup table 26 upon switching the screen from the still screen to another screen.

The look-up table 26 includes a plurality of (i. E., A plurality < RTI ID = 0.0 > And stores the reference voltage adjustment signal CMD in advance.

FIG. 8 shows a control procedure of the restoration residual image compensation circuit 20. FIG.

8, the restored afterimage compensation circuit 20 receives digital video data (RGB) on a frame basis and analyzes the input digital video data RGB for one frame to calculate an average luminance AL. (S1, S2)

Restore image retention compensation circuit 20 has determined the calculated average luminance (AL) in advance first luminance threshold value (AL _{TH _ Max)} equal to or greater than or a predetermined second brightness threshold average luminance to determine if smaller than (AL _{TH_Min)} (AL) monitors a frame with a large or small size (S3)

The restoration residual image compensation circuit 20 judges a change (AL) of the average luminance AL in a frame having a large or small average luminance AL and outputs the judgment result to the stop time monitoring value And detects a still picture having no change in the average luminance AL for a predetermined time or longer. Here, the predetermined time is determined based on when the count value VSC of the vertical synchronizing signal Vsync becomes larger than the predetermined count threshold VSC _TH . The restoration residual image compensation circuit 20 determines whether there is a change (AL) of the average luminance AL in a state where the still image is maintained (S4)

As a result of the judgment of S4, 1) when the count value VSC of the vertical synchronizing signal Vsync is larger than the predetermined count threshold VSC _TH but there is no change in the average luminance AL (AL), 2) 3) when the count value VSC of the vertical synchronization signal Vsync is less than the predetermined count threshold VSC _TH although there is a change of the vertical synchronization signal Vsync The restored afterimage compensating circuit 20 does not increment the count value VSC of the vertical synchronizing signal Vsync by +1 when there is no change in the average luminance AL nor a change in the average luminance AL, which is not larger than the predetermined count threshold VSC _TH , And feeds back the control procedure to S1. (S5)

On the other hand, if it is determined in S4 that the count value VSC of the vertical synchronization signal Vsync is larger than the predetermined count threshold value VSC _TH and the change in the average brightness AL is ΔAL, It is determined that there is a screen switching from the still image to the other image. The restoration residual image compensation circuit 20 generates a reference voltage adjustment signal CMD to control the reference voltage Vref to be generated at a second level lower than the original first level, (Vref) is generated at the second level, and after the predetermined period, the vertical synchronization signal (Vsync) is counted to gradually restore to the first level. The restoration residual image compensation circuit 20 sets the count value VSC_Rec of the vertical synchronizing signal Vsync to VSC_Rec when the count value VSC_Rec of the vertical synchronizing signal Vsync for judging the restoration time is equal to or lower than the predetermined count threshold VSC_Rec _THd (VSC_Rec + 1), and controls the reference voltage (Vref) to the second level (S6, S7, S8)

When the count value VSC_Rec of the vertical synchronization signal Vsync for determining the restoration time exceeds the predetermined count threshold VSC_Rec _THd , the restoration residual image compensation circuit 20 sets the reference voltage Vref to the original first level So as to be gradually restored (S9)

FIG. 9 shows a simulation result of a time at which a residual image disappears when an image is switched to a different luminance level in a high-tone image. 9, 'Galaxy A', 'Omnina 2', 'Calix', 'TS1.0', and 'TS1.1' represent types of mobile phones using organic light emitting diode display devices as display devices.

Referring to FIG. 9, it can be seen that when the display brightness is changed when the screen is switched from the still screen to another screen, the time for which the afterglow disappears is drastically reduced.

10 shows an adjustment level of the reference voltage (Vref) when the screen is switched from the still screen to another screen.

As shown in Equation (1), when the reference voltage Vref is lowered, the driving current Ioled becomes larger, so that the display luminance becomes higher. 10, the reference voltage Vref is generated at a second level lower than the original first level for a predetermined period of time (Td1) when the screen is switched from the still image to the other image, as shown in FIG. 10, Quickly erase restoration afterimages. Here, the predetermined period Td1 may be at least three frame periods. In the present invention, the reference voltage Vref is gradually restored to the original first level in one frame after the predetermined period Td1. The reference voltage Vref may be adjusted in a number of steps (e.g., 32 steps) between the first level and the second level. When the reference voltage Vref is gradually restored, the flickering is greatly reduced as compared with the case where the reference voltage Vref is restored abruptly.

As described above, the organic light emitting diode display device and the driving method thereof according to the present invention generate a reference voltage at a second level lower than the original first level for a predetermined period of time when a screen is switched from a still screen to another screen, To improve the visual residual image, and to gradually restore the reference voltage to the first level after the predetermined period. Accordingly, the present invention minimizes the time for which the afterimage disappears in a state in which the pixel circuit is not physically changed, thereby enhancing the display quality.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: Display panel 11: Timing controller
12: Data driving circuit 13A: Gate driving circuit
13B: Emission driving circuit 14: Data line
15: Gate line 16: Emission line
20: restoration residual image compensation circuit 22:
24: compensation control unit 26: lookup table
30: Reference voltage generating circuit

Claims (14)

A display panel having a pixel structure in which a driving current flowing through the organic light emitting diode is proportional to a square of a difference between a data voltage and a reference voltage;
A method of detecting a still picture having no change in the average luminance over a predetermined period of time using an average luminance of input digital video data and a count value of a vertical synchronizing signal, A restoring image compensating circuit for generating a reference voltage adjusting signal for adjusting a reference voltage; And
And a reference voltage generating circuit for generating the reference voltage at a second level lower than the original first level in response to the reference voltage adjusting signal to increase the display luminance for a predetermined period of time,
Wherein the restoration residual image compensation circuit determines that there is a screen change from the still image to another image when the count value of the vertical synchronization signal is larger than a predetermined count threshold and there is a change in the average luminance. Device. The method according to claim 1,
Wherein the reference voltage generating circuit gradually restores the reference voltage to the first level after the predetermined period according to the reference voltage adjusting signal. The method according to claim 1,
The image stabilization circuit according to claim 1,
An image analyzer receiving digital video data in frame units and analyzing input digital video data of one frame to calculate the average luminance;
A lookup table for preliminarily storing a plurality of reference voltage adjustment signals composed of a few bits of logic signals according to a correlation between an average luminance of the first value for the still picture display and an average luminance of the second value for the other picture display, ; And
Wherein the control unit monitors a frame having a larger or smaller average luminance by receiving the average luminance every frame and determines a change in the average luminance in a frame having a larger or smaller average luminance, And a reference voltage adjustment signal generating unit for generating the reference voltage adjustment signal by referring to the lookup table when the screen is switched from the still screen to another screen by detecting the still image having no change in the average luminance over the predetermined time, And an organic light emitting diode (OLED) display unit. The method of claim 3,
Wherein the compensation control unit comprises:
And monitors whether the average luminance is larger than a predetermined first luminance threshold or smaller than a predetermined second luminance threshold to monitor a frame having a larger or smaller average luminance. delete 3. The method of claim 2,
Wherein the predetermined period is selected as a three-frame period. The method according to claim 6,
Wherein the reference voltage is adjusted in a plurality of steps between the first level and the second level and gradually restored to the first level by one step in one frame after the predetermined period. Device. A method of driving an organic light emitting diode display having a pixel structure in which a driving current flowing through an organic light emitting diode is proportional to a square of a difference between a data voltage and a reference voltage,
A method of detecting a still picture having no change in the average luminance over a predetermined period of time using an average luminance of input digital video data and a count value of a vertical synchronizing signal, Generating a reference voltage adjustment signal for adjusting the reference voltage; And
Generating the reference voltage at a second level lower than the original first level according to the reference voltage adjustment signal to increase the display brightness for a predetermined period of time,
Wherein the step of generating the reference voltage adjustment signal determines that there is a screen change from the still image to another image when the count value of the vertical synchronization signal is greater than a predetermined count threshold and there is a change in the average luminance. A method of driving an organic light emitting diode display device. 9. The method of claim 8,
Wherein the step of increasing the display luminance further comprises gradually restoring the reference voltage to the first level after the predetermined period in accordance with the reference voltage adjustment signal. Way. 9. The method of claim 8,
The step of generating the reference voltage adjustment signal includes:
Storing in advance a plurality of reference voltage adjustment signals constituted by logic signals of several bits according to the correlation between the average luminance of the first value for the still picture display and the average luminance of the second value for the other picture display;
Receiving digital video data frame by frame and analyzing input digital video data of one frame to calculate the average luminance; And
Wherein the control unit monitors a frame having a larger or smaller average luminance by receiving the average luminance every frame and determines a change in the average luminance in a frame having a larger or smaller average luminance, The step of detecting the still image having no change in the average luminance over a predetermined time by reflecting the stop time monitoring value and generating the reference voltage adjusting signal by referring to the lookup table upon switching the screen from the still screen to another screen And driving the organic light emitting diode display device. 11. The method of claim 10,
Wherein the step of generating the reference voltage adjustment signal comprises the steps of determining whether the average luminance is greater than a predetermined first luminance threshold or smaller than a predetermined second luminance threshold and monitoring a frame having a larger or smaller average luminance, And a driving method of the organic light emitting diode display device. delete 10. The method of claim 9,
Wherein the predetermined period is selected to be a three-frame period. 14. The method of claim 13,
Wherein the reference voltage is adjusted in a plurality of steps between the first level and the second level and gradually restored to the first level by one step in one frame after the predetermined period. A method of driving a device.

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