KR101690568B1 - 네트워크 온 칩 소켓 프로토콜 - Google Patents

네트워크 온 칩 소켓 프로토콜 Download PDF

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Publication number
KR101690568B1
KR101690568B1 KR1020157009635A KR20157009635A KR101690568B1 KR 101690568 B1 KR101690568 B1 KR 101690568B1 KR 1020157009635 A KR1020157009635 A KR 1020157009635A KR 20157009635 A KR20157009635 A KR 20157009635A KR 101690568 B1 KR101690568 B1 KR 101690568B1
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South Korea
Prior art keywords
transaction
delete delete
initiator
interface unit
context array
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English (en)
Korean (ko)
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KR20150063433A (ko
Inventor
필리프 보우차드
장-자크 르클레어
보리스 보우틸리에르
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퀄컴 테크놀로지스, 인크.
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Priority claimed from US13/626,766 external-priority patent/US9225665B2/en
Priority claimed from US13/626,758 external-priority patent/US9471538B2/en
Application filed by 퀄컴 테크놀로지스, 인크. filed Critical 퀄컴 테크놀로지스, 인크.
Publication of KR20150063433A publication Critical patent/KR20150063433A/ko
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Publication of KR101690568B1 publication Critical patent/KR101690568B1/ko
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/1735Network adapters, e.g. SCI, Myrinet
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7825Globally asynchronous, locally synchronous, e.g. network on chip
    • H04L29/10

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
KR1020157009635A 2012-09-25 2013-09-24 네트워크 온 칩 소켓 프로토콜 Active KR101690568B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US13/626,758 2012-09-25
US13/626,766 US9225665B2 (en) 2012-09-25 2012-09-25 Network on a chip socket protocol
US13/626,766 2012-09-25
US13/626,758 US9471538B2 (en) 2012-09-25 2012-09-25 Network on a chip socket protocol
PCT/US2013/061295 WO2014052261A1 (en) 2012-09-25 2013-09-24 Network on a chip socket protocol

Publications (2)

Publication Number Publication Date
KR20150063433A KR20150063433A (ko) 2015-06-09
KR101690568B1 true KR101690568B1 (ko) 2016-12-28

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KR1020157009635A Active KR101690568B1 (ko) 2012-09-25 2013-09-24 네트워크 온 칩 소켓 프로토콜

Country Status (6)

Country Link
EP (2) EP2901294A4 (enExample)
JP (1) JP6144348B2 (enExample)
KR (1) KR101690568B1 (enExample)
CN (1) CN104685480B (enExample)
IN (1) IN2015MN00441A (enExample)
WO (1) WO2014052261A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2529217A (en) 2014-08-14 2016-02-17 Advanced Risc Mach Ltd Transmission control checking for interconnect circuitry
US11436185B2 (en) * 2019-11-15 2022-09-06 Arteris, Inc. System and method for transaction broadcast in a network on chip
CN116711281B (zh) * 2020-12-30 2025-08-15 华为技术有限公司 一种片上系统及相关方法
CN117389931B (zh) * 2023-12-12 2024-05-03 芯动微电子科技(武汉)有限公司 适用于总线访问gpu核内存储器的协议转换模块及方法

Citations (2)

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Publication number Priority date Publication date Assignee Title
US6671275B1 (en) 2002-08-02 2003-12-30 Foundry Networks, Inc. Cross-point switch with deadlock prevention
US20110302345A1 (en) 2010-06-03 2011-12-08 Philippe Boucard Network on chip (noc) with qos features

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US6477646B1 (en) * 1999-07-08 2002-11-05 Broadcom Corporation Security chip architecture and implementations for cryptography acceleration
US6826191B1 (en) * 1999-10-01 2004-11-30 Stmicroelectronics Ltd. Packets containing transaction attributes
US8087064B1 (en) * 2000-08-31 2011-12-27 Verizon Communications Inc. Security extensions using at least a portion of layer 2 information or bits in the place of layer 2 information
WO2002069575A1 (en) * 2001-02-28 2002-09-06 Gotham Networks, Inc. Methods and apparatus for network routing device
US6996651B2 (en) * 2002-07-29 2006-02-07 Freescale Semiconductor, Inc. On chip network with memory device address decoding
US7277449B2 (en) * 2002-07-29 2007-10-02 Freescale Semiconductor, Inc. On chip network
JP4560409B2 (ja) * 2002-10-08 2010-10-13 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ データを交換する集積回路および方法
US7181556B2 (en) * 2003-12-23 2007-02-20 Arm Limited Transaction request servicing mechanism
KR20070010127A (ko) * 2004-03-26 2007-01-22 코닌클리케 필립스 일렉트로닉스 엔.브이. 트랜잭션 중단을 위한 집적회로 및 방법
US7716409B2 (en) * 2004-04-27 2010-05-11 Intel Corporation Globally unique transaction identifiers
WO2007033238A2 (en) * 2005-09-13 2007-03-22 Ist International Inc. System and method for providing packet connectivity between heterogeneous networks, and component and packet therefor
CN101379841A (zh) * 2005-09-13 2009-03-04 Ist国际公司 为提供异种网络之间的小包连通性和组分和小包之系统和方法
US20070245033A1 (en) * 2006-04-14 2007-10-18 Microsoft Corporation Link layer discovery and diagnostics
WO2008018017A2 (en) * 2006-08-08 2008-02-14 Koninklijke Philips Electronics N.V. Electronic device and method of controlling a communication
GB2450148A (en) * 2007-06-14 2008-12-17 Advanced Risc Mach Ltd Controlling write transactions between initiators and recipients via interconnect logic
US8285912B2 (en) * 2009-08-07 2012-10-09 Arm Limited Communication infrastructure for a data processing apparatus and a method of operation of such a communication infrastructure
FR2951342B1 (fr) * 2009-10-13 2017-01-27 Arteris Inc Reseau sur puce a latence nulle
EP2333830B1 (en) * 2009-12-07 2014-09-03 STMicroelectronics (Research & Development) Limited a package comprising a first and a second die coupled by a multiplexed bus
EP2388707B1 (en) * 2010-05-20 2014-03-26 STMicroelectronics (Grenoble 2) SAS Interconnection method and device, for example for systems-on-chip
JPWO2011148925A1 (ja) * 2010-05-24 2013-07-25 日本電気株式会社 半導体装置とネットワークルーティング方法とシステム
EP2444903A1 (en) * 2010-09-29 2012-04-25 STMicroelectronics (Grenoble 2) SAS A transaction reordering arrangement

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6671275B1 (en) 2002-08-02 2003-12-30 Foundry Networks, Inc. Cross-point switch with deadlock prevention
US20110302345A1 (en) 2010-06-03 2011-12-08 Philippe Boucard Network on chip (noc) with qos features

Also Published As

Publication number Publication date
JP6144348B2 (ja) 2017-06-07
KR20150063433A (ko) 2015-06-09
JP2015535991A (ja) 2015-12-17
CN104685480A (zh) 2015-06-03
EP2901294A4 (en) 2016-08-10
IN2015MN00441A (enExample) 2015-09-11
EP4123468A1 (en) 2023-01-25
EP2901294A1 (en) 2015-08-05
CN104685480B (zh) 2017-07-14
WO2014052261A1 (en) 2014-04-03

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