KR101603971B1 - 기판 처리 장치 및 기판 처리 방법 - Google Patents

기판 처리 장치 및 기판 처리 방법 Download PDF

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Publication number
KR101603971B1
KR101603971B1 KR1020140097244A KR20140097244A KR101603971B1 KR 101603971 B1 KR101603971 B1 KR 101603971B1 KR 1020140097244 A KR1020140097244 A KR 1020140097244A KR 20140097244 A KR20140097244 A KR 20140097244A KR 101603971 B1 KR101603971 B1 KR 101603971B1
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KR
South Korea
Prior art keywords
process gas
substrate
gas
hole
layer
Prior art date
Application number
KR1020140097244A
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English (en)
Korean (ko)
Other versions
KR20160015454A (ko
Inventor
신평수
Original Assignee
피에스케이 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 피에스케이 주식회사 filed Critical 피에스케이 주식회사
Priority to KR1020140097244A priority Critical patent/KR101603971B1/ko
Priority to JP2014164897A priority patent/JP5972324B2/ja
Priority to CN201410413061.0A priority patent/CN105321846B/zh
Priority to TW103129201A priority patent/TWI559398B/zh
Publication of KR20160015454A publication Critical patent/KR20160015454A/ko
Application granted granted Critical
Publication of KR101603971B1 publication Critical patent/KR101603971B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • H01L21/02507Alternating layers, e.g. superlattice
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823487MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1020140097244A 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법 KR101603971B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020140097244A KR101603971B1 (ko) 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법
JP2014164897A JP5972324B2 (ja) 2014-07-30 2014-08-13 基板処理装置及び基板処理方法
CN201410413061.0A CN105321846B (zh) 2014-07-30 2014-08-20 基板处理装置及基板处理方法
TW103129201A TWI559398B (zh) 2014-07-30 2014-08-25 基板處理裝置及基板處理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020140097244A KR101603971B1 (ko) 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법

Publications (2)

Publication Number Publication Date
KR20160015454A KR20160015454A (ko) 2016-02-15
KR101603971B1 true KR101603971B1 (ko) 2016-03-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020140097244A KR101603971B1 (ko) 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법

Country Status (4)

Country Link
JP (1) JP5972324B2 (zh)
KR (1) KR101603971B1 (zh)
CN (1) CN105321846B (zh)
TW (1) TWI559398B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111115561B (zh) * 2019-12-05 2023-05-12 中国科学院微电子研究所 一种微纳通孔的制备方法及具有微纳通孔的结构
KR102540773B1 (ko) * 2021-01-19 2023-06-12 피에스케이 주식회사 패러데이 실드 및 기판 처리 장치

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100558922B1 (ko) * 2004-12-16 2006-03-10 (주)퓨전에이드 박막 증착장치 및 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0793366B2 (ja) * 1984-10-08 1995-10-09 日本電信電話株式会社 半導体メモリおよびその製造方法
US5413670A (en) * 1993-07-08 1995-05-09 Air Products And Chemicals, Inc. Method for plasma etching or cleaning with diluted NF3
US6296780B1 (en) * 1997-12-08 2001-10-02 Applied Materials Inc. System and method for etching organic anti-reflective coating from a substrate
KR100807223B1 (ko) * 2006-07-12 2008-02-28 삼성전자주식회사 상변화 물질층, 상변화 물질층 형성 방법 및 이를 이용한상변화 메모리 장치의 제조 방법
JP2010177652A (ja) * 2009-02-02 2010-08-12 Toshiba Corp 半導体装置の製造方法
KR101573697B1 (ko) * 2009-02-11 2015-12-02 삼성전자주식회사 수직 폴딩 구조의 비휘발성 메모리 소자 및 그 제조 방법
KR101603731B1 (ko) * 2009-09-29 2016-03-16 삼성전자주식회사 버티칼 낸드 전하 트랩 플래시 메모리 디바이스 및 제조방법
US9536970B2 (en) * 2010-03-26 2017-01-03 Samsung Electronics Co., Ltd. Three-dimensional semiconductor memory devices and methods of fabricating the same
KR101209003B1 (ko) * 2010-10-14 2012-12-06 주식회사 유진테크 3차원 구조의 메모리 소자를 제조하는 방법 및 장치
US9318341B2 (en) * 2010-12-20 2016-04-19 Applied Materials, Inc. Methods for etching a substrate
KR102010928B1 (ko) * 2012-06-07 2019-10-21 삼성전자주식회사 저항 변화 메모리 장치, 그 동작 방법 및 제조 방법
TWI496249B (zh) * 2013-01-09 2015-08-11 Macronix Int Co Ltd 三維反及快閃記憶體

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100558922B1 (ko) * 2004-12-16 2006-03-10 (주)퓨전에이드 박막 증착장치 및 방법

Also Published As

Publication number Publication date
JP2016034009A (ja) 2016-03-10
JP5972324B2 (ja) 2016-08-17
CN105321846A (zh) 2016-02-10
KR20160015454A (ko) 2016-02-15
TW201604952A (zh) 2016-02-01
CN105321846B (zh) 2018-02-06
TWI559398B (zh) 2016-11-21

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