KR101575959B1 - Probe tester and probe test method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe tester and a probe test method capable of testing the abnormality of a probe for measurement through a simple circuit configuration.
According to an embodiment of the present invention, there is provided a tester for testing whether or not a probe is abnormal, comprising: a plurality of pads to which a needle provided on the probe can be contacted; And a plurality of first transistors and a second transistor respectively connected to the plurality of pads, wherein the first transistor and the second transistor are connected in parallel and the second transistor size is larger than the first transistor size can do. In particular, the plurality of first transistors and the second transistors may be individually turned on / off.

Description

[0001] PROBE TESTER AND PROBE TEST METHOD [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe tester and a probe testing method, and more particularly, to a probe tester and a probe testing method capable of testing the presence or absence of a probe for measurement through a simple circuit configuration.

Generally, a semiconductor device is manufactured by a process of forming a pattern on a semiconductor substrate and a process of forming a semiconductor substrate on which a pattern is formed by a plurality of chips. Meanwhile, between these processes, an electrical die sorting (hereinafter referred to as EDS process) is performed to check the electrical characteristics of each chip.

The EDS process is a process for discriminating an abnormal chip. In order to determine whether chips are defective by supplying an inspection current to each chip and inspecting an electrical signal output from each chip, a probe is directly contacted with each chip An automated probing device is used to electrically test its performance. Related prior art is disclosed in Patent Publication No. 10-2011-0079723.

On the other hand, in the fabrication of semiconductor-based high-frequency circuits or systems, measurements are generally made on a wafer through a probing method. The probes used in this case are small in size and sensitive, so that the failure rate during measurement is considerably high and it is difficult to grasp the presence or absence of probes in the event of failure.

Therefore, it is necessary to study the technology that can easily determine whether or not the probe is abnormal by the user.

It is an object of the present invention to provide a probe test method and a probe test method which enable a user to quickly determine whether or not a probe is abnormal through a simple circuit configuration.

An object of the present invention is to provide a probe tester and a probe testing method capable of individually judging the presence or absence of a plurality of needles provided on a probe.

According to an aspect of the present invention, there is provided a tester for testing an abnormality of a probe, comprising: a plurality of pads to which a needle provided on the probe can be contacted; And a plurality of first transistors and a second transistor respectively connected to the plurality of pads, wherein the first transistor and the second transistor are connected in parallel and the second transistor size is larger than the first transistor size A probe tester in which a plurality of first transistors and a plurality of second transistors are individually turned on / off is disclosed.

According to an aspect of the present invention, there is provided a probe comprising: a plurality of pads to which a needle provided on a probe can be contacted; And a plurality of first transistors and a second transistor respectively connected to the plurality of pads, wherein the first transistor and the second transistor are connected in parallel and the second transistor size is larger than the first transistor size Wherein the first transistor and the second transistor of the first and second transistors connected to a specific pad to which a specific needle to be tested is connected are turned on and the second transistor is turned off step; And turning on the second transistor among the first transistor and the second transistor connected to the pad having the other needle other than the specific needle and turning off the first transistor. / RTI >

The probe test method and the probe test method according to an embodiment of the present invention can easily and quickly grasp the presence or absence of a probe by checking the DC characteristics of the probe, reduce unnecessary probe repair processes, And can help you identify the presence of.

1 shows a probe and a measurement pad for measuring a circuit and a system on a general wafer.
2 is a view showing a structure of a probe tester according to an embodiment of the present invention.
3 is a diagram showing a switch transistor and a GND transistor connected to a single pad in a probe tester according to an embodiment of the present invention.
4 is a flow chart illustrating a method of testing a probe using a probe tester in accordance with one embodiment of the present invention.
FIGS. 5 and 6 are views for explaining the principle of operation of the tester by the test method of FIG.
7 is a flow chart illustrating a method of testing a probe using a probe tester in accordance with another embodiment of the present invention.

Hereinafter, a probe tester and a probe testing method according to an embodiment of the present invention will be described with reference to the drawings.

As used herein, the singular forms "a", "an" and "the" include plural referents unless the context clearly dictates otherwise. In this specification, the terms "comprising ", or" comprising ", etc. should not be construed as necessarily including the various elements or steps described in the specification, Or may be further comprised of additional components or steps.

First, a general probe and a probe pad for measurement will be described before explaining a probe test method and a probe test method related to an embodiment of the present invention.

1 shows a probe and a measurement pad for measuring a circuit and a system on a general wafer.

As shown in the figure, the measuring probe 100 may include a plurality of needles N1, N2, ..., Nn. The number of the plurality of needles N1, N2, ..., Nn may be equal to or less than the number of the measurement pads PAD1, PAD2, ..., PADn. The probe 100 may include a DC (Direct Currrent) probe and a RF probe. The measurement pads PAD1, PAD2, ..., and PADn are structures on a chip or a wafer, meaning a structure in which the plurality of needles N1, N2, ..., Nn can be brought into corresponding contact with each other do.

2 is a view showing a structure of a probe tester according to an embodiment of the present invention.

As shown in the figure, the probe tester 200 is a device for judging the abnormality of the probe 100. The probe tester 200 includes a plurality of pads PAD1, PAD2, ..., PADn, a switch transistor M1_switch ..., Mn_switch and GND (ground) transistors M1_GND, ..., Mn_GND, a switch MUX_switch, and a GND MUX_GND.

Each of the measurement pads (PAD1, PAD2, ..., PADn) connected to the respective measuring needles of the probe may be constituted by two transistor sets. In addition, the source terminals of all the transistors can be connected to one node. The transistors attached to each pad can be divided into switch transistors (M1_switch, ..., Mn_switch) and GND transistors (M1_GND, ..., Mn_GND). The gates of the switch transistors M1_switch, ..., Mn_switch and the GND transistors M1_GND, ..., Mn_GND on each pad are connected to the respective MUXs (switch mux_switch, The on / off states of the switch transistors M1_switch, ..., Mn_switch and the GND transistors M1_GND, ..., Mn_GND connected to the MUX_GND can be individually controlled.

3 is a diagram showing a switch transistor and a GND transistor connected to a single pad in a probe tester according to an embodiment of the present invention. Although the pad according to the illustrated embodiment is described by taking PAD1 as an example, the description of the pad PAD1 may be applied to other pads as well.

The switch transistor (M1_switch) is designed so that a constant current I1 flows when a Vdd voltage is applied, and the GND transistor (M1_CND) is designed to have a sufficiently large size to be I1 << I2.

4 is a flow chart illustrating a method of testing a probe using a probe tester in accordance with one embodiment of the present invention. 4 shows the on / off control operation of the transistors M1_switch, ..., Mn_switch and the GND transistors M1_GND, ..., Mn_GND in the probe tester 200 shown in FIG.

First, the specific needle to be tested can be tested for failure. The switch transistor M1_switch is turned on in the transistor set (transistor M1_switch for switch and transistor M1_CND for GND) connected to the pad (for example, PAD1) to which the specific needle to be tested is connected and the GND transistor M1_CND (S410).

In the transistor set connected to the remaining pads except for the pad (for example, PAD1), the switch transistor is turned off and the GND transistor is turned on (S420).

In this case, the current flowing through the pad (for example, PAD1) may be monitored to determine whether the measuring needle is in contact with the pad (e.g., PAD1) (S430).

FIGS. 5 and 6 are views for explaining the principle of operation of the tester by the test method of FIG. The illustrated embodiment is an example in which there are two pads, and it is an example for determining the presence or absence of an abnormality of the needle contacted with the PAD1.

5 shows a state in which only the switch transistor M1_swtich is connected to the PAD1 in ON state and only the GND transistor M2_GND is connected to the PAD2 in the ON state. In this case, the switch transistor M1_swtich connected to the PAD1 and the GND transistor M2_GND connected to the PAD2 exhibit the same effect as the two transistors connected in a stack structure, as shown in FIG.

the current I1 flowing through the switch transistor M1_swtich and the current I2 flowing through the GND transistor M2_GND. In this case, since I1 << I2, a transistor is connected to the stack as shown in FIG. 6, a voltage Vdd is applied to PAD1, and when PAD2 is grounded, the current flowing between the two pads is limited to I1. This is the same as when PADn is connected in addition to PAD2 and the transistor for GND is additionally turned on. With this characteristic, it is possible to determine whether the measuring needle connected to the PAD 1 normally contacts the PAD 1 normally or not by judging that the flowing current is I 1.

Similarly, in order to judge whether the measuring needle coming into contact with the PAD 2 normally contacts and there is no abnormality, the switch transistor M2_swtich connected to the PAD2 is turned on, the GND transistor M1_GND connected to the PAD1 is turned on, off state and check whether the current of I1 flows. In this way, it is possible to confirm whether or not there is an abnormality of the measuring needle probed in each pad and whether or not the contact is defective.

Meanwhile, the probe tester 200 related to an example of the present invention can confirm whether or not adjacent measurement needles are short-circuited.

FIG. 7 is a flowchart showing a method for checking whether adjacent measurement needles are short-circuited by using a probe tester according to another embodiment of the present invention.

First, all the transistors (the switch transistor connected to each pad and the GND transistor) are turned off to check whether the adjacent measuring needles are short-circuited (S710).

When all of the transistors are off, a voltage may be applied to the first and second needles in which the adjacent measuring needles are short-circuited (S720). For example, Vdd (a specific voltage other than 0 V) may be applied to the first needle, and a voltage of 0 V may be applied to the second needle.

Then, the current between the measurement needles connected to the two adjacent pads is monitored to determine whether the adjacent measurement needles are short-circuited (S730). For example, if no current flows through two adjacent pads, it is determined that the adjacent measuring needles are not short-circuited. If current flows through the two pads, it can be determined that the adjacent measuring needles are short-circuited.

As described above, the probe test method and the probe test method according to an embodiment of the present invention can easily and quickly grasp the presence or absence of a probe by checking the DC characteristics of the probe, reduce unnecessary probe repair processes, Circuit, and system.

The probe tester and probe test method described above can be applied to a configuration and a method of the embodiments described above in a limited manner, but the embodiments may be modified such that all or some of the embodiments are selectively And may be configured in combination.

N: Needle
200: Probe Tester
PAD: Pad
switch: transistor for switch
GND: Transistor for GND (ground)
MUX_switch: Mux for switch
MUX_GND: Mux for GND

Claims (9)

1. A tester for testing the presence or absence of probes,
A plurality of pads to which a needle provided on the probe can be contacted; And
A plurality of first transistors and a second transistor each connected to the plurality of pads, the first transistor and the second transistor being connected in parallel and the second transistor size being greater than the first transistor size; ,
Wherein the plurality of first transistors and the plurality of second transistors are individually turned on / off,
The individual ON / OFF control of the plurality of first transistors and the second transistors turns on only the first transistor among the first transistor and the second transistor connected to a specific pad to which a specific needle to be tested is contacted, And turning on only the second transistor among the first transistor and the second transistor connected to the pad in contact with the needle other than the needle. 2. The apparatus of claim 1, wherein the probe tester
A first MUX coupled to the gates of the plurality of first transistors; And
And a second MUX coupled to the gates of the plurality of second transistors,
The first MUX may individually control ON / OFF of the plurality of first transistors,
And the second MUX controls ON / OFF of the plurality of second transistors individually. The method according to claim 1,
And the source terminals of the plurality of first transistors and the plurality of second transistors are connected to one node. delete The method of claim 1, wherein the individual on / off controls of the plurality of first and second transistors
And applying a predetermined voltage to a first needle contacted to the first pad while applying a voltage of 0V to the second needle contacted to the second pad in a state where the plurality of first transistors and the second transistor are off, , And the specific voltage is not 0V. A plurality of pads to which a needle provided on the probe can be contacted; And a plurality of first transistors and a second transistor respectively connected to the plurality of pads, wherein the first transistor and the second transistor are connected in parallel and the second transistor size is larger than the first transistor size As a test method using a probe tester,
Turning on the first transistor and turning off the second transistor among a first transistor and a second transistor connected to a specific pad to which a specific needle to be tested is contacted; And
And turning on the second transistor among the first transistor and the second transistor connected to the pad in contact with the needle other than the specific needle, and turning off the first transistor. Probe test method. 7. The method of claim 6,
Turning off the first transistor and the second transistor; And
Applying a specific voltage to a first needle contacted to the first pad in a state where the plurality of first transistors and the second transistor are off and applying a voltage of 0V to a second needle contacted to the second pad, Wherein the voltage is a voltage other than 0V. The method according to claim 6,
Wherein the probe tester comprises: a first MUX connected to gates of the plurality of first transistors; And a second MUX coupled to the gates of the plurality of second transistors,
The first MUX controls ON / OFF of the plurality of first transistors individually, and the second MUX controls ON / OFF of the plurality of second transistors individually. How to test a probe. The method according to claim 6,
Wherein the source terminals of the plurality of first transistors and the plurality of second transistors included in the tester are connected to one node.

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