JP2014163851A - Semiconductor integrated circuit with open detection terminal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To quickly detect an open failure of a power supply terminal with a simple circuit configuration.SOLUTION: A semiconductor integrated circuit, which is provided with a plurality of power supply circuits and power supply terminals that respectively lead the plurality of power supply circuits to the outside, includes: a power supply open detection terminal to which a voltage for testing is applied; and rectifier elements that respectively connect the open detection terminal and the power supply terminals.

Description

  The present invention relates to a semiconductor integrated circuit with an open detection circuit capable of easily detecting an open failure of a power supply terminal connected to an evaluation apparatus for evaluating a semiconductor integrated circuit (connection failure between the evaluation apparatus and the power supply terminal) and the semiconductor integrated circuit. The present invention relates to an open detection method using a circuit.

  When testing a semiconductor device, first, the evaluation apparatus and the semiconductor integrated circuit are connected, and the connection state is checked. This connection check is a power supply connection check, which is a connection check between the power supply terminal (power supply pin) of the semiconductor integrated circuit and the evaluation apparatus.

  However, the semiconductor integrated circuit includes a large number of power supply pins, and the pins may be short-circuited on the substrate. For this reason, it is not easy to check for an open failure (connection failure) occurring between the power supply pin and the evaluation device.

  With respect to such a problem, Patent Document 1 adds an open detection circuit that detects the open of the ground terminal based on the potential of the signal input terminal and the potential of the ground terminal between the power supply terminal and the ground terminal of the semiconductor chip. An open detection circuit for a ground terminal is disclosed.

JP 2010-256064 A

  However, the open detection circuit according to the prior art uses many comparators (comparators) and MOS transistors, and has a large circuit scale and a complicated configuration. Therefore, it takes too much time to verify the operation of all circuit elements of the semiconductor integrated circuit to be inspected using this circuit. Further, even if one element or circuit is defective, an open failure cannot be detected.

  The present invention has been made in view of these problems. A semiconductor integrated circuit with an open detection circuit capable of quickly detecting an open failure of a power supply terminal with a simple circuit configuration, and an open circuit using the semiconductor integrated circuit. A detection method is provided.

  In order to solve the above problems, the present invention employs the following means.

  A semiconductor integrated circuit having a plurality of power supply circuits and a power supply terminal for leading each of the power supply circuits to the outside, wherein the semiconductor integrated circuit applies a test voltage, a power supply open detection terminal, and the open detection terminal and the power supply terminal And a rectifying element for connecting each of the two.

  Since the present invention has the above configuration, it is possible to quickly detect an open failure of the power supply terminal (connection failure between the evaluation device and the power supply terminal of the semiconductor circuit to be evaluated) with a simple circuit configuration.

It is a figure explaining a semiconductor integrated circuit with an open detection terminal. It is a figure explaining the open detection method of the power supply terminal in a semiconductor integrated circuit with an open detection terminal. It is a figure explaining the procedure which detects the open failure of the power supply terminal in a semiconductor integrated circuit with an open detection terminal. It is a figure explaining the other example of the open detection method of the power supply terminal in a semiconductor integrated circuit with an open detection terminal. It is a figure explaining the other example of the procedure which detects the open failure of the power supply terminal in a semiconductor integrated circuit with an open detection terminal.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1A is a diagram illustrating a semiconductor integrated circuit with an open detection terminal. The semiconductor integrated circuit includes power supply circuits 2a, 2b, and 2c, pin-shaped power supply terminals Vcc1, Vcc2, and Vcc3, and the power supply circuit 2a. 2b, 2c and connection lines 4a, 4b, 4c for connecting power supply terminals Vcc1, Vcc2, Vcc3.

  The semiconductor integrated circuit 100 includes a pin-shaped open detection terminal 3 and rectifier elements 1a, 1b, and 1c that connect the open detection terminal 3 and the connection lines 4a, 4b, and 4c.

  When testing the connection state between the power supply terminals Vcc1, Vcc2, and Vcc3 and the reference voltage application device 22 constituting the evaluation device, the test voltage Vt is applied to the open detection terminal 3. The reference voltage applying device 22 is composed of a variable voltage source having one end grounded. When detecting an open failure of the power supply terminal, the reference voltage applying device 22 is set to zero V to operate the semiconductor integrated circuit 100. At the time of verification, a voltage suitable for the verification may be set.

  FIG. 1B is a diagram for explaining a semiconductor integrated circuit 100 (modified example) with an open detection terminal. The semiconductor integrated circuit 100 includes power supply circuits 2a, 2b, 2c, power supply terminals Vcc1, Vcc2, and power supply terminals (ground potential). Connection lines 4a, 4b, and 4c for connecting Vgnd and power supply circuits 2a, 2b, and 2c and power supply terminals Vcc1, Vcc2, and Vgnd are provided.

  The semiconductor integrated circuit 100 includes an open detection terminal 3 and rectifying elements 1a, 1b, and 1c that connect the open detection terminal 3 and the connection lines 4a, 4b, and 4c. When testing the connection state between the power supply terminals Vcc1, Vcc2, and Vgnd and the reference voltage application device 22 constituting the evaluation device, the test voltage Vt is applied to the open detection terminal 3. As described above, the power supply terminals Vcc1, Vcc2, and Vcc3 can include terminals to which different potentials such as a ground potential are applied in addition to power supply terminals to which the same kind of voltage is applied.

  Note that the semiconductor integrated circuit 100 with an open detection terminal can be formed on a semiconductor substrate such as single crystal silicon. The rectifying elements 1a, 1b, and 1c are connected such that current flows from the open detection terminal 3 to the power supply terminals Vcc1, Vcc2, and Vcc3, for example.

  Here, as the rectifying elements 1a, 1b and 1c, diodes whose anodes are connected to the open detection terminals 3 are used, but they can be constituted by bipolar transistors or MOSFETs connected to the rectifying elements. Further, the number of power supply terminals Vcc is not limited.

  FIG. 2 is a diagram for explaining an open detection method for a power supply terminal in the semiconductor integrated circuit 100 with an open detection terminal.

  As shown in FIG. 2A, an ammeter 23 is connected to the open detection terminal 3 of the semiconductor integrated circuit 100 with an open detection terminal, and the test voltage of the test voltage application device 21 is connected to the open detection terminal 3 via the ammeter 23. Apply to.

  Here, as shown in FIG. 2A, when the power supply terminal Vcc1 of the semiconductor integrated circuit 100 with an open detection terminal is open (the power supply terminal Vcc1 and the reference voltage applying device 22 are not connected), An open failure of the power supply terminal Vcc1 can be detected as follows.

  First, a reference voltage, for example, a ground voltage is applied to the power supply terminal Vcc1 of the semiconductor semiconductor integrated circuit 100 with an open detection terminal to be inspected, and the other power supply terminals Vcc2 and vcc3 are set in a floating state. Next, a voltage having a predetermined potential difference with respect to the ground potential (a forward voltage of the rectifying element, for example, +0.8 V or more) is applied to the open detection terminal 3 using a test voltage application device. If the reference voltage application device 22 and the power supply terminal Vcc1 are open, no current is detected by the ammeter 23. Therefore, it is easy to check whether there is an open (connection failure between the power supply terminal Vcc1 and the reference voltage application device 22). I can know.

  As shown in FIG. 2B, when the power supply terminal Vcc1 of the semiconductor integrated circuit 100 with an open detection terminal and the reference voltage applying device 22 are connected, a current in accordance with the voltage-current characteristic of the rectifying element 1a is obtained by the ammeter 23. Is detected.

  The reference voltage application device 22 has been described on the premise that it is shared by the power supply terminals Vcc1, Vcc2, and Vcc3. However, the reference voltage application device 22 can be arranged for each power supply terminal and used by switching them.

  FIG. 3 is a diagram illustrating a procedure for detecting an open failure of a power supply terminal in a semiconductor integrated circuit with an open detection terminal.

  First, a test circuit as shown in FIG. That is, an ammeter 23 is connected to the open detection terminal 3 of the semiconductor integrated circuit 100 with an open detection terminal, and the test voltage application device 21 is connected via the ammeter 23.

  Next, a reference voltage, for example, a ground voltage is applied to the power supply terminal Vcc1 of the semiconductor integrated circuit to be measured. At this time, the other power supply terminals Vcc2 and Vcc3 are set in a floating state (steps 31 and 32).

  Next, a potential having a potential difference with respect to the ground potential, for example, +0.8 V, is applied to the open detection terminal 3 by the test voltage application device 21 (step 33). Next, the current value is measured by the ammeter 23 (step 34).

  If the current measured by the ammeter is zero, the power supply terminal Vcc1 to be measured is an open failure, and if there is a current measured by the ammeter (in accordance with the current-voltage characteristics of the rectifier element 1 by the ammeter 7). It can be seen that there is no open fault (if current is detected) (steps 36, 37). Next, the test is performed on the remaining power supply terminals Vcc2 and Vcc3 in the same procedure.

  FIG. 4 is a diagram for explaining another example of a method for detecting an open of a power supply terminal in the semiconductor integrated circuit 100 with an open detection terminal.

  In contrast to the example of FIG. 2, in the example of this figure, a voltmeter 44 is provided instead of the ammeter 23, and a test current supply device 41 is provided instead of the test voltage application device.

  As shown in FIG. 4A, the detection method when the power supply terminal Vcc1 of the semiconductor integrated circuit 100 with the open detection terminal is open is as follows.

  First, a reference voltage, for example, a ground voltage is applied to the power supply terminal Vcc1 of the semiconductor integrated circuit 100 with an open detection terminal, and the other power supply terminals Vcc2 and Vcc3 are brought into a floating state.

  Next, a current value at which the current-voltage characteristic of the rectifying element changes significantly, for example +0.5 mA, is supplied from the test current supply device 41 toward the open detection terminal 3. At this time, if the power supply terminal Vcc1 is open, the voltmeter 44 detects a voltage exceeding a predetermined level.

  Therefore, the presence or absence of an open failure can be easily known by monitoring the potential difference between the output terminal of the current supply device and the output terminal of the reference voltage application device.

  Here, as shown in FIG. 4B, if there is no open failure in the power supply terminal Vcc to be measured, the voltmeter 43 detects a voltage according to the current-voltage characteristics of the rectifying element 1, for example, + 0.8V.

  It is desirable that the test current supply device 41 has a function of limiting the output voltage so that an abnormal voltage is not applied to the open detection terminal 3 when the power supply terminal Vcc1 or the open detection terminal 3 is opened. In consideration of the characteristics of the rectifying element, the output voltage limit value may be set to 1.5 V, for example, so that a voltage of 1.5 V or more is not applied to the open detection terminal 3.

  FIG. 5 is a diagram for explaining a procedure for detecting an open failure in a power supply terminal constituting the semiconductor integrated circuit 100 with an open detection terminal.

First, the circuit shown in FIG. That is, the test current supply device 41 is connected to the open detection terminal 3 of the semiconductor integrated circuit 100 with an open detection terminal. In addition, a reference voltage application device capable of applying a reference voltage, for example, a ground voltage, to the power supply terminal Vcc1 is prepared. Further, the voltmeter 44 is inserted between the test current supply device 41 and the output terminal of the reference voltage application device. Next, a reference voltage, for example, a ground voltage is applied to the power supply terminal Vcc1. At this time, the other power supply terminals Vcc2 and Vcc3 are set in a floating state (steps 51 and 52).
Next, a test current is supplied from the test current supply device 41. The test current is set to a current value (for example, +0.5 mA) at which the open detection terminal 3 can detect a predetermined potential difference with respect to the ground potential (step 53). Next, the potential difference is measured with the voltmeter (step 54).

  If the power supply terminal Vcc1 is open, a voltage of a predetermined value or more is detected by the voltmeter 44, so that an open failure can be known (step 56). If no open failure has occurred in the power supply terminal Vcc1 to be measured, the voltmeter 43 detects a voltage according to the current-voltage characteristics of the rectifying element 1 (step 57). Next, the test is performed on the remaining power supply terminals Vcc2 and Vcc3 in the same procedure (step 58).

  When a normal operation test of the semiconductor integrated circuit 100 is performed, the open detection terminal 3 is floated or fixed to the same potential as the lowest voltage of the semiconductor integrated circuit 100. As a result, the reverse-biased rectifier element 1 is interposed between the open detection terminal 3 and the power supply terminal Vcc, so that the open detection terminal 3 does not hinder the operation of the semiconductor integrated circuit 100.

  As described above, a semiconductor integrated circuit is provided with an open detection terminal and a rectifying element that conducts from the open detection terminal to each of the external terminals of the semiconductor integrated circuit, for example, and a test voltage is applied to the open detection terminal open detection terminal. Or a test current (constant current) is supplied and a current based on the test voltage or a voltage based on the test current is measured.

  Thus, in the present embodiment, it is possible to detect the presence or absence of an open failure of the power supply terminal in a short time by a simple method of measuring (comparing) current or voltage. Therefore, it is possible to shorten the time required for defect detection and shorten the sorting time for defective semiconductor integrated circuits. Since the defect confirmation operation is easy, it is possible to shorten the time for the normal operation test of the semiconductor integrated circuit. In addition, it is possible to suppress secondary failure determination associated with open failure detection failure.

  In the embodiment, the open detection terminal 3 is described as one of the external terminals of the semiconductor integrated circuit. However, the number of the open detection terminals 3 is not limited to one, and is commonly used to quickly perform the open detection operation. It is also possible to provide a plurality of connected open detection terminals 3.

  In addition, this invention is not limited to the said embodiment, Various modifications are included. For example, the open detection of the power supply terminal in the semiconductor integrated circuit has been described as an example, but the application field of the present invention is not limited to the semiconductor integrated circuit. Moreover, the said embodiment was described in detail in order to demonstrate this invention clearly, and is not necessarily limited to what is provided with all the structures demonstrated.

  Further, a part of the configuration of an embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of an embodiment. In addition, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment.

  Each of the above-described configurations, functions, processing units, processing means, and the like may be realized by hardware by designing a part or all of them with, for example, an integrated circuit. Further, each of the above-described configurations, functions, and the like may be realized by software by interpreting and executing a program that realizes each function by the processor.

DESCRIPTION OF SYMBOLS 1 Rectification element 2 Power supply circuit 3 Open detection terminal 21 Test voltage application device 22 Reference voltage application device 23 Ammeter 24 Ammeter 41 Test current supply device 42 Reference voltage application device 43 Voltmeter 44 Voltmeter 100 Semiconductor integrated circuit with open detection terminal

Claims (3)

In a semiconductor integrated circuit having a plurality of power supply circuits and a power supply terminal for leading each of the power supply circuits to the outside,
A semiconductor integrated circuit comprising: a power supply open detection terminal for applying a test voltage; and a rectifier element for connecting the open detection terminal and each of the power supply terminals. In a method for testing an integrated circuit comprising a plurality of power supply circuits, a power supply terminal for leading each of the power supply circuits to the outside, an open detection terminal, and a rectifier element connecting the open detection terminal and each of the power supply terminals ,
With one of the power supply terminals to be tested connected to a reference voltage source, an open test voltage is applied to the open detection terminal, and an open failure of the power supply terminal is detected based on the feeding current flowing at this time A method for testing an integrated circuit. In a method for testing an integrated circuit comprising a plurality of power supply circuits, a power supply terminal for leading each of the power supply circuits to the outside, an open detection terminal, and a rectifier element connecting the open detection terminal and each of the power supply terminals ,
With one of the power supply terminals to be tested connected to a reference voltage source with a reference voltage, an open test current is applied to the open detection terminal, and the open detection terminal obtained at this time is connected to the reference voltage output terminal. An integrated circuit test method, wherein an open failure of the power supply terminal is detected based on a voltage.

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