CN108181570B - Chip grounding pin connectivity test method and device and readable storage medium - Google Patents
Chip grounding pin connectivity test method and device and readable storage medium Download PDFInfo
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- CN108181570B CN108181570B CN201711383209.0A CN201711383209A CN108181570B CN 108181570 B CN108181570 B CN 108181570B CN 201711383209 A CN201711383209 A CN 201711383209A CN 108181570 B CN108181570 B CN 108181570B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
Abstract
A chip grounding pin connectivity test method, a device and a readable storage medium are provided, wherein the test method comprises the following steps: outputting a driving current to a tested grounding pin of the chip, and controlling other pins of the chip except the tested grounding pin to be coupled with a preset grounding channel or an external 0V voltage channel; and acquiring the voltage on the tested grounding pin, and determining whether the tested grounding pin is poor in connectivity or not by combining with a preset clamping voltage. The coverage of chip test can be improved by the scheme.
Description
Technical Field
The invention relates to the field of chip testing, in particular to a method and a device for testing connectivity of a chip grounding pin and a readable storage medium.
Background
Connectivity tests, also known as open and short Circuit tests, are used to test whether all active signal pins outside an Integrated Circuit (IC) chip are electrically connected to internal circuits, including whether a signal pin is shorted to another signal pin, a power pin, or a ground pin, and whether a signal pin or a ground pin is open.
Conventional chip test methods only test the connectivity between all input/output (I/O) pins and VDD and any ground pins. When there are two or more ground pins in an IC chip, the conventional chip testing method is to short and uniformly connect the two ground pins to a Ground (GND) channel on a test board.
However, when an IC chip with two or more ground pins is tested, a conventional chip testing method cannot screen out a bad chip with poor connectivity of one of the ground pins, and cannot know which specific ground pin has poor connectivity, so that the testing coverage is low.
Disclosure of Invention
The technical problem solved by the embodiment of the invention is how to improve the coverage rate of the connectivity test of the chip grounding pin.
In order to solve the above technical problem, an embodiment of the present invention provides a method for testing connectivity of a chip ground pin, including: outputting a driving current to a tested grounding pin of the chip and controlling other pins of the chip except the tested grounding pin to be coupled with a preset grounding channel or an external 0V voltage channel; and acquiring the voltage on the tested grounding pin, and determining whether the tested grounding pin is poor in connectivity or not by combining with a preset clamping voltage.
Optionally, the determining whether the tested ground pin has poor connectivity includes: when the difference between the voltage on the tested grounding pin and the clamping voltage is smaller than a preset first difference value, judging that the connectivity of the tested grounding pin is poor; when the voltage on the tested grounding pin is smaller than a preset first voltage and larger than a preset second voltage, judging that the connectivity of the tested grounding pin is normal; when the voltage on the tested grounding pin is smaller than the second voltage, judging that the connectivity of the tested grounding pin is normal; the first voltage is less than the clamping voltage.
Optionally, a protection diode is arranged in the chip, and the protection diode is coupled with the pads corresponding to all the grounding pins; the first voltage is greater than a turn-on voltage of the protection diode.
Optionally, the outputting the driving current to the ground pin to be tested of the chip includes: and controlling a preset driving circuit to be connected with the tested grounding pin and controlling the driving circuit to output a driving current to the tested grounding pin.
Optionally, the driving circuit is a constant current source.
Optionally, after determining that the connectivity of the ground pin to be tested is poor, the method further includes: and outputting an alarm signal to indicate that the tested grounding pin is poor in connectivity.
Optionally, the outputting the alarm signal includes: and outputting an alarm signal comprising the identification of the tested grounding pin.
The embodiment of the invention also provides a device for testing the connectivity of the chip grounding pin, which comprises: the control unit is used for outputting driving current to a tested grounding pin of the chip and controlling other pins of the chip except the tested grounding pin to be coupled with a preset grounding channel or an external 0V voltage channel; the acquisition unit is used for acquiring the voltage on the tested grounding pin; and the judging unit is used for determining whether the connectivity of the tested grounding pin is poor or not according to the voltage on the tested grounding pin and the combination of the preset clamping voltage.
Optionally, the determining unit is configured to: when the difference between the voltage on the tested grounding pin and the clamping voltage is smaller than a preset first difference value, judging that the connectivity of the tested grounding pin is poor; when the voltage on the tested grounding pin is smaller than a preset first voltage and larger than a preset second voltage, judging that the connectivity of the tested grounding pin is normal; when the voltage on the tested grounding pin is smaller than the second voltage, judging that the connectivity of the tested grounding pin is normal; the first voltage is less than the clamping voltage.
Optionally, a protection diode is arranged in the chip, and the protection diode is coupled with the pads corresponding to all the grounding pins; the first voltage is greater than a turn-on voltage of the protection diode.
Optionally, the control unit is configured to control a preset driving circuit to establish connection with a ground pin to be tested of the chip, and control the driving circuit to output a driving current to the ground pin to be tested.
Optionally, the driving circuit is a constant current source.
Optionally, the chip ground pin connectivity testing apparatus further includes: and the output unit is used for outputting an alarm signal to indicate that the connectivity of the tested grounding pin is poor.
Optionally, the output unit is configured to output an alarm signal including the identifier of the ground pin to be tested.
The embodiment of the invention also provides a computer-readable storage medium, on which computer instructions are stored, and when the computer instructions are executed, the steps of any one of the above methods for testing the connectivity of the chip ground pin are executed.
The embodiment of the invention also provides a device for testing the connectivity of the chip grounding pin, which comprises a memory and a processor, wherein the memory is stored with a computer instruction, and the computer instruction executes any step of the method for testing the connectivity of the chip grounding pin when running.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
when the connectivity test is carried out on the grounding pin of the chip, the grounding pin to be tested is selected and the driving current is output to the grounding pin to be tested, and the rest pins are coupled with a grounding channel or an external 0V voltage channel. Whether the connectivity of the grounding pin to be tested is poor can be known through the acquired voltage on the grounding pin to be tested and the preset clamping voltage, so that the coverage of the connectivity test of the grounding pin of the chip can be effectively improved.
Furthermore, after the poor connectivity of the tested grounding pin is detected, an alarm signal is output to indicate that the current chip of the tester has the grounding pin with poor connectivity, so that the tester can sort out the chips with abnormality.
Drawings
Fig. 1 is a flowchart of a method for testing connectivity of a chip ground pin according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a chip ground pin connectivity test system in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a device for testing connectivity of a chip ground pin according to an embodiment of the present invention.
Detailed Description
In the prior art, some IC chips may have two or more ground pins. When an IC chip is tested by a conventional chip testing method, a plurality of ground pins are usually shorted together and connected to a ground channel on a testing board. However, when a grounding pin with poor connectivity exists in the plurality of grounding pins, because the grounding pin with normal connectivity is normally connected with the ground channel, the conventional chip testing method can determine that all grounding pins are normally connected, that is, the conventional chip testing method cannot know which grounding pin has poor connectivity, so that the situation of false detection exists, and the problem of low accuracy of the chip grounding pin connectivity testing is caused.
In the embodiment of the invention, when the connectivity test is carried out on the grounding pin of the chip, the grounding pin to be tested is selected and the driving current is output to the grounding pin to be tested, and the rest pins are coupled with the grounding channel or the external 0V voltage channel. Whether the connectivity of the grounding pin to be tested is poor can be known through the acquired voltage on the grounding pin to be tested and the preset clamping voltage, so that the occurrence of false detection can be effectively avoided, and the accuracy and the coverage of the connectivity test of the grounding pin of the chip can be effectively improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
The embodiment of the invention provides a method for testing connectivity of a chip grounding pin, which is described in detail by referring to fig. 1 through specific steps.
In a specific implementation, the chip ground pin connectivity test method provided in the embodiments of the present invention may be performed by a preset test machine, or performed by another test system.
In the embodiment of the present invention, the testing of connectivity of the ground pins of the chip may refer to performing a connectivity test between a plurality of ground pins of the chip to test whether the connectivity between the plurality of ground pins of the chip is normal. In practical applications, the connectivity of the ground pin of the chip is as follows: the connecting lines between the grounding pins of the chip and the corresponding pads of the chip, and the connectivity between the pads corresponding to the grounding pins of the chip. Therefore, whether the connectivity of the grounding pin of the chip is normal or not is tested, and whether the connection line between the grounding pin of the chip and the corresponding pad is connected normally or not is tested substantially; when the connection line between the grounding pin of the chip and the corresponding pad is normally connected, the grounding pin is normally connected with other grounding pins.
Step S101, outputting a driving current to a tested grounding pin of the chip, and controlling other pins of the chip except the tested grounding pin to be coupled with a preset grounding channel or an external 0V voltage channel.
In a specific implementation, a chip undergoing pin connectivity testing may include two or more ground pins. When testing the grounding pin of the chip, one grounding pin can be selected as the grounding pin to be tested, and other pins of the chip except the selected grounding pin to be tested are coupled with a preset ground channel or an external 0V voltage channel.
In practical applications, the other pins of the chip besides the selected ground pin under test may include: other ground pins than the ground pin under test, all power pins, and all input/output pins.
In a specific implementation, before testing the ground pins of the chip, one ground pin of the chip may be coupled to a predetermined driving circuit, and the other ground pins may be coupled to a ground channel output terminal of a predetermined testing board. For convenience of description, in the embodiments of the present invention, the ground pin connected to the driving circuit is referred to as a ground pin to be tested, and the ground pin connected to the test board is referred to as another ground pin.
For example, the chip includes three ground pins, which are, in order, ground pin VSS1, ground pin VSS2, and ground pin VSS 3. When testing the ground pin VSS1 of the chip, the ground pin VSS1 of the chip is connected to the driving circuit, and the ground pin VSS2 and the ground pin VSS3 of the chip are coupled to the ground channel output terminal of the predetermined testing board. At this time, the ground pin VSS1 is referred to as a ground pin to be tested, and the ground pin VSS2 and the ground pin VSS3 are referred to as other ground pins.
When a grounding pin of a chip is tested, the driving circuit is controlled to output driving current to the tested grounding pin, namely to output driving current to the grounding pin VSS 1; the ground channel on the control test board is coupled to other ground pins.
In a specific implementation, the driving circuit may be a constant current source, or may be other devices capable of outputting a constant current, as long as it is sufficient to output a driving current to the ground pin, which is not described herein again.
For example, the drive circuit is a constant current source, and the output current of the constant current source is 100 μ a.
And step S102, acquiring the voltage on the tested grounding pin, and determining whether the tested grounding pin is poor in connectivity or not by combining a preset clamping voltage.
In the specific implementation, a test may be performed in advance to obtain a voltage V0 when a ground pin of the chip has poor connectivity and a driving current is input, so as to set the clamping voltage V1, that is, the voltage V1 may be set according to V0. After the clamping voltage is set, whether the grounding pin is poor in connectivity can be judged according to the voltage on the grounding pin.
In the embodiment of the present invention, the clamp voltage V1 may be set closer to V0, for example, V1 may be set to V0, V1 may be set slightly larger than V0, or V1 may be set slightly smaller than V0. The difference between V1 and V0 may be within a range, and the absolute value of the difference may be set smaller than the first difference. The first difference value may be set according to an actual application scenario. For example, the first difference is set to 0.2V, or the first difference is set to 0.5V.
In an embodiment of the invention, it is known from a pre-test that the connectivity of the ground pin VSS1 of the chip is poor, and when the driving circuit outputs the driving current to the ground pin VSS1, the voltage on the ground pin VSS1 is 1.9V, and the clamping voltage is set to 2.0V.
It will be appreciated that the clamp voltage may be set to other values. For example, when the voltage on the ground pin VSS1 is 1.9V, the clamp voltage may be set to 1.8V.
In an implementation, when a difference between a voltage on the ground pin to be tested and the clamping voltage is smaller than a preset first difference value, it may be determined that the ground pin to be tested has poor connectivity. At this time, the principle of determining the connectivity fault of the tested ground pin is as follows:
when the connectivity of the tested grounding pin is poor, the tested grounding pin is poor in connection with the corresponding pad, so that a loop cannot be formed with the corresponding pad; under the action of the driving current, the charges on the tested grounding pin are accumulated continuously until the charge amount tends to be balanced, and at the moment, the voltage on the tested grounding pin is V0, so that the tested grounding pin can be judged to have poor connectivity, and the tested grounding pin can be judged to be open circuit.
In a specific implementation, when the voltage on the ground pin to be tested is less than the first voltage but greater than the second voltage, it may be determined that the ground pin to be tested has normal connectivity, but other ground pins may have poor connectivity or the pads corresponding to the ground pin to be tested and the pads corresponding to the other ground pins may have poor connectivity.
In practical applications, the chip may include a protection diode. The first voltage may be set according to a turn-on voltage of the protection diode, the set first voltage being less than the clamp voltage and greater than the turn-on voltage of the protection diode. The second voltage may be set to a value closer to 0V, for example, 0.1V or 0.2V. The second voltage may also be set to other values as long as it is smaller than the first voltage and larger than 0V, which is not described herein.
For example, the chip is provided with a protection diode, and a first end of the protection diode is electrically connected with the pad corresponding to each ground pin of the chip, and a second end of the protection diode is electrically connected with other I/O ports of the chip. The conduction voltage of the protection diode is 0.7V, the clamping voltage is 2.0V, and the first voltage is set to 0.9V. It is understood that the value of the first voltage may also be other values as long as the value is between the conducting voltage of the protection diode and the clamping voltage, which is not described herein.
In a specific implementation, when the voltage on the ground pin to be tested is smaller than the first voltage but larger than the second voltage, the principle that the connectivity of the ground pin to be tested is normal may be determined as follows:
when the voltage on the tested ground pin is less than the first voltage, the tested ground pin is connected with the protection diode and other I/O ports in a path, and therefore the connectivity between the tested ground pin and the corresponding pad is normal. If the other grounding pins are connected normally, and the pads corresponding to the grounding pin to be tested and the pads corresponding to the other grounding pins are connected normally, the grounding pin to be tested and the other grounding pins form a path, so that the voltage on the grounding pin to be tested is the breakover voltage of the protection diode.
In specific implementation, when the voltage on the tested ground pin is less than the second voltage, the connectivity of the tested ground pin is determined to be normal.
This is because: when the connectivity of all the grounding pins of the chip is normal, the pads corresponding to all the grounding pins are coupled together, so that a path is formed between the pads corresponding to all the grounding pins, the ground channel and the driving circuit, and at this time, the voltage on the grounding pin to be tested and the voltages on other grounding pins are both smaller than the second voltage.
In specific implementation, for each grounding pin, the step S101 to the step S102 may be adopted to perform connectivity test, so as to implement connectivity test on all grounding pins of the chip.
Therefore, when the connectivity test is carried out on the grounding pin of the chip, the grounding pin to be tested is selected and the driving current is output to the grounding pin to be tested, and the rest pins are coupled with the grounding channel or the external 0V voltage channel. Whether the connectivity of the grounding pin to be tested is poor can be known through the acquired voltage on the grounding pin to be tested and the acquired clamping voltage, so that the coverage and the accuracy of the chip test can be effectively improved.
In a specific implementation, when it is determined that the connectivity of the tested ground pin is poor, an alarm signal can be output to indicate that the connectivity of the tested ground pin is poor.
For example, the chip is tested by a test bench. When the tested grounding pin is detected to be poor in connectivity, the testing machine outputs an alarm signal to inform testing personnel that the current tested grounding pin is poor in connectivity.
In a specific implementation, the output alarm signal may further include a detected ground pin identifier with poor connectivity. In other words, the output alarm signal is: an alarm signal including an identification of the ground pin being tested.
For example, in the testing process, it is determined that the tested ground pin has poor connectivity, and the tested ground pin is: ground pin VSS 1. In the output alarm signal, the identification "1" is included, and the identification "1" corresponds to the ground pin VSS 1. According to the alarm signal, the tester can know that the grounding pin VSS1 has poor connectivity.
The following describes a method for testing connectivity of a ground pin of a chip according to the above embodiment of the present invention, taking the existence of two ground pins of the chip as an example.
Referring to fig. 2, a schematic structural diagram of a chip ground pin testing system in an embodiment of the present invention is provided, where the chip ground pin testing system includes: the tester 21, the tester 22, the constant current source 23, and the chip 24, the chip 24 includes two ground pins, which are VSS1 and VSS2, VSS1 corresponds to the pad 241, VSS2 corresponds to the pad 242, and the pad 241 is coupled to the pad 242. Also included in the die 24 is a protection diode 243, a first terminal of the protection diode 243 being coupled to the pad 241, and a second terminal of the protection diode 243 being coupled to the pad 244. The pads 244 are pads corresponding to other I/O ports 245, and the other I/O ports 245 may include a plurality of non-ground pins.
Also included in the chip 24 is a protection diode 246, a first terminal of the protection diode 246 being coupled to the pad 242, and a second terminal of the protection diode 246 being coupled to the pad 247. The pads 247 are corresponding pads to other I/O ports 248, and the other I/O ports 248 may include a plurality of non-ground pins.
In practical applications, other I/O ports 245 may include the same I/O ports as other I/O ports 248.
The testing board 22 is provided with a ground channel terminal, and the ground channel terminal is coupled to the ground channel of the tester 21 and the ground pin VSS1 in the chip 24, respectively. The output terminal of the constant current source 23 is coupled to a ground pin VSS2 in the chip 24. The clamp voltage was set to 2V, the first difference was 0.5V, the first voltage was 0.8V, and the second voltage was 0.2V.
Before testing the chip 24, the voltages of the other I/ O ports 245 and 248 are set to 0V.
When testing the chip 24, the tester 21 outputs a control signal to the constant current source 23. The constant current source 23 outputs a drive current of 100 μ a to the ground pin VSS2 upon receiving the control signal.
Referring to fig. 2, in the embodiment of the present invention, a connectivity test is performed on the ground pin of the chip, that is, whether the connectivity between the ground pin VSS1 and the pad 241 is normal or not is tested, and whether the connectivity between the ground pin VSS2 and the pad 242 is normal or not is tested.
When the voltage on the ground pin VSS2 is greater than 1.9V, the difference between the ground pin VSS2 and the clamp voltage is less than 0.1V, which is less than the first difference, and therefore, it is determined that the connectivity between the ground pin VSS2 and the pad 242 is poor because: when the voltage on the ground pin VSS2 is greater than 1.9V, it means that no path is formed between the ground pin VSS2 and the pad 242.
When the voltage on VSS2 is 0.7V, it is less than the first voltage, and therefore, it is determined that the connectivity between the ground pin VSS2 and the pad 242 is normal, and the connectivity between the ground pin VSS1 and the pad 241 is abnormal because:
when the voltage on the ground pin VSS2 is 0.7V, it means that the protection diode 243 is turned on, and therefore, the connectivity between the ground pin VSS2 and the pad 242 is normal. If the connectivity between the ground pin VSS1 and the pad 241 is normal, the ground pin VSS2, the pad 242, the pad 241, the ground pin VSS1 and the ground channel form a loop, so the voltage on the ground pin VSS2 should be less than 0.2V, not 0.7V; if the connection between the ground pin VSS1 and the pad 241 is poor, the ground pin VSS2 and the protection diode 243 form a path.
When the voltage on the ground pin VSS2 is less than 0.1V and the voltage on the ground pin VSS1 is 0V, it means that the ground pin VSS2, the pad 242, the ground pin VSS1, the pad 241, and the ground channel form a loop, and therefore, it is determined that the connectivity between the ground pin VSS2 and the pad 242 is normal and the connectivity between the ground pin VSS1 and the pad 241 is normal.
Referring to fig. 3, a chip ground pin connectivity testing apparatus 30 according to an embodiment of the present invention is provided, including: a control unit 301, an acquisition unit 302, and a determination unit 303, wherein:
the control unit 301 is configured to output a driving current to a ground pin to be tested of the chip, and control other pins of the chip except the ground pin to be tested to be coupled with a ground channel or an external 0V voltage channel;
an obtaining unit 302, configured to obtain a voltage on the ground pin to be tested;
the determining unit 303 is configured to determine whether the connectivity of the ground pin to be tested is poor according to the voltage on the ground pin to be tested and a preset clamping voltage.
In a specific implementation, the determining unit 303 may be configured to: when the difference between the voltage on the tested grounding pin and the clamping voltage is smaller than a preset first difference value, judging that the connectivity of the tested grounding pin is poor; when the voltage on the tested grounding pin is smaller than a preset first voltage and larger than a preset second voltage, judging that the connectivity of the tested grounding pin is normal; when the voltage on the tested grounding pin is smaller than the second voltage, judging that the connectivity of the tested grounding pin is normal; the first voltage is less than the clamping voltage.
In specific implementation, a protection diode is arranged in the chip, and the protection diode is coupled with the pads corresponding to all the grounding pins; the first voltage is greater than a turn-on voltage of the protection diode.
In a specific implementation, the control unit 301 may be configured to control a preset driving circuit to establish a connection with a ground pin to be tested of the chip, and control the driving circuit to output a driving current to the ground pin to be tested.
In a specific implementation, the driving circuit may be a constant current source.
In a specific implementation, the chip ground pin connectivity test apparatus 30 may further include: and the output unit 304 is used for outputting an alarm signal to indicate that the connectivity of the tested ground pin is poor.
In a specific implementation, the output unit 304 may be configured to output an alarm signal including the identifier of the ground pin under test.
The embodiment of the present invention further provides a computer-readable storage medium, where the computer-readable storage medium is a non-volatile storage medium or a non-transitory storage medium, and has a computer instruction stored thereon, and when the computer instruction runs, the step of the chip ground pin connectivity test method provided in any of the above embodiments of the present invention is executed, which is not described herein again.
The embodiment of the present invention further provides another device for testing connectivity of a chip ground pin, which includes a memory and a processor, where the memory stores computer instructions, and the computer instructions execute, when running, the steps of the method for testing connectivity of a chip ground pin provided in any of the above embodiments of the present invention, which are not described herein again.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by instructing the relevant hardware through a program, which may be stored in a computer-readable storage medium, and the storage medium may include: ROM, RAM, magnetic or optical disks, and the like.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (14)
1. A method for testing connectivity of a chip ground pin, comprising:
outputting a driving current to a tested grounding pin of the chip, and controlling other pins of the chip except the tested grounding pin to be coupled with a preset grounding channel or an external 0V voltage channel;
acquiring voltage on the tested grounding pin, and determining whether the tested grounding pin is poor in connectivity or not by combining preset clamping voltage; the determining whether the tested ground pin is bad in connectivity comprises: when the difference between the voltage on the tested grounding pin and the clamping voltage is smaller than a preset first difference value, judging that the connectivity of the tested grounding pin is poor; when the voltage on the tested grounding pin is smaller than a preset first voltage and larger than a preset second voltage, judging that the tested grounding pin is normal in connectivity, other grounding pins are abnormal in connectivity or the connectivity between the pads corresponding to the tested grounding pin and the pads corresponding to the other grounding pins is abnormal; when the voltage on the tested grounding pin is smaller than the second voltage, judging that the connectivity of the tested grounding pin is normal; the first voltage is less than the clamping voltage.
2. The method for testing connectivity of a chip ground pin according to claim 1, wherein a protection diode is built in the chip, and the protection diode is coupled to pads corresponding to all ground pins; the first voltage is greater than a turn-on voltage of the protection diode.
3. The method for testing the connectivity of a chip ground pin of claim 1, wherein outputting a driving current to a ground pin under test of the chip comprises:
and controlling a preset driving circuit to be connected with the tested grounding pin and controlling the driving circuit to output a driving current to the tested grounding pin.
4. The method for testing the connectivity of a chip ground pin according to claim 3, wherein the driving circuit is a constant current source.
5. The method for testing the connectivity of a chip ground pin according to claim 1, further comprising, after determining that the connectivity of the ground pin under test is poor:
and outputting an alarm signal to indicate that the tested grounding pin is poor in connectivity.
6. The method for testing the connectivity of a chip ground pin of claim 5, wherein outputting an alarm signal comprises: and outputting an alarm signal comprising the identification of the tested grounding pin.
7. A chip ground pin connectivity test device, comprising:
the control unit is used for outputting driving current to a tested grounding pin of the chip and controlling other pins of the chip except the tested grounding pin to be coupled with a preset grounding channel or an external 0V voltage channel;
the acquisition unit is used for acquiring the voltage on the tested grounding pin;
the judging unit is used for determining whether the connectivity of the tested grounding pin is poor or not according to the voltage on the tested grounding pin and the combination of the preset clamping voltage; the judging unit is used for judging that the connectivity of the tested grounding pin is poor when the difference between the voltage of the tested grounding pin and the clamping voltage is smaller than a preset first difference value; when the voltage on the tested grounding pin is smaller than a preset first voltage and larger than a preset second voltage, judging that the tested grounding pin is normal in connectivity, other grounding pins are abnormal in connectivity or the connectivity between the pads corresponding to the tested grounding pin and the pads corresponding to the other grounding pins is abnormal; when the voltage on the tested grounding pin is smaller than the second voltage, judging that the connectivity of the tested grounding pin is normal; the first voltage is less than the clamping voltage.
8. The device for testing connectivity of a chip ground pin according to claim 7, wherein a protection diode is built in the chip and is coupled to pads corresponding to all ground pins; the first voltage is greater than a turn-on voltage of the protection diode.
9. The apparatus according to claim 7, wherein the control unit is configured to control a preset driving circuit to establish a connection with a ground pin to be tested of the chip, and control the driving circuit to output a driving current to the ground pin to be tested.
10. The chip ground pin connectivity test apparatus of claim 9, wherein the driving circuit is a constant current source.
11. The chip ground pin connectivity testing apparatus of claim 7, further comprising: and the output unit is used for outputting an alarm signal to indicate that the connectivity of the tested grounding pin is poor.
12. The chip ground pin connectivity testing apparatus of claim 11, wherein the output unit is configured to output an alarm signal including an identification of the ground pin under test.
13. A computer readable storage medium having computer instructions stored thereon, wherein the computer instructions when executed perform the steps of the method for testing the connectivity of the chip ground pin according to any one of claims 1 to 6.
14. A device for testing connectivity of a chip ground pin, comprising a memory and a processor, wherein the memory stores computer instructions, and the computer instructions are executed when running to perform the steps of the method for testing connectivity of a chip ground pin according to any one of claims 1 to 6.
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|---|---|---|---|---|
| WO2020006749A1 (en) * | 2018-07-06 | 2020-01-09 | 深圳市汇顶科技股份有限公司 | Chip impedance testing method and system |
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