KR101544055B1 - Thin-film transistor method of manufacturing the thin-film transistor and display device using the same - Google Patents

Abstract

In a thin film transistor, a method of manufacturing the same, and a liquid crystal display using the same, the thin film transistor includes a base substrate, a gate electrode, a gate insulating film, a polycrystalline silicon layer, a catalyst layer, an ohmic contact layer, a source electrode and a drain electrode. In the polycrystalline silicon layer, the lower region of the catalyst layer is crystallized by the radiation heat that has passed through the catalyst layer, so that it is possible to crystallize the fine pattern without using a mask, thereby reducing the cost.

Crystallization, silicon

Description

TECHNICAL FIELD [0001] The present invention relates to a thin film transistor (TFT), a method of manufacturing the same, and a liquid crystal display using the same. BACKGROUND OF THE INVENTION [0002]

The present invention relates to a thin film transistor, a method of manufacturing the same, and a liquid crystal display using the thin film transistor. More particularly, the present invention relates to a thin film transistor manufactured by reduced manufacturing cost, a method of manufacturing the same, and a liquid crystal display using the same.

2. Description of the Related Art In general, a liquid crystal display device has adopted an amorphous silicon thin film transistor as a switching element. Recently, a high quality display quality is required, and polycrystalline silicon thin film transistors having a high operation speed are employed. In particular, the polycrystalline silicon thin film transistor is mainly employed in an organic light emitting display having an organic light emitting diode (OLED) driven by a current.

A method of forming a polycrystalline silicon thin film in the polycrystalline silicon thin film transistor includes a method of forming a polycrystalline silicon thin film directly on a substrate, a method of forming an amorphous silicon thin film on a substrate, and a heat treatment of the amorphous silicon thin film by a laser beam, And a method of forming a thin film.

In the heat treatment method using the laser beam, when the laser beam is irradiated onto the substrate, the amorphous silicon thin film is melted in a liquid state. The molten silicon grows around the nucleus and is rearranged in the form of a plurality of grains having excellent crystallinity, whereby the amorphous silicon thin film is changed to a polycrystalline silicon thin film having higher electric mobility.

However, the conventional heat treatment method uses a filament type tip heater or a thin heater as a tungsten wire, and it is difficult to fabricate a channel size microstructure, and an unwanted heat The crystallized semiconductor layer is crystallized to a nearby pattern, so that not only a fine patterned crystallized semiconductor layer can be obtained, but also the thermal load applied to the plastic substrate increases, so that the substrate may be damaged.

In order to solve this problem, a radiation is radiated only to a desired place by using a mask. Using a mask may cause an increase in the production cost and difficulty in the process.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and it is an object of the present invention to provide a thin film transistor manufactured by a silicon crystallization method without using a mask.

Another object of the present invention is to provide a method of manufacturing the above-described thin film transistor.

It is still another object of the present invention to provide a liquid crystal display device including the thin film transistor.

According to an aspect of the present invention, there is provided a thin film transistor including a base substrate, a gate electrode formed on the base substrate, a gate insulating film disposed on the base substrate and the gate electrode, A first contact hole formed in the catalyst layer, and a second contact hole formed in the catalyst layer, the first contact hole being disposed on the catalyst layer, the first contact hole being formed on the polycrystalline silicon layer, A source electrode connected to the ohmic contact layer corresponding to the first contact hole, and a drain electrode connected to the ohmic contact layer corresponding to the second contact hole.

In an embodiment of the present invention, the catalyst layer may have a thickness ranging from about 150 nm to about 250 nm.

In an embodiment of the present invention, the catalyst layer may comprise a silicon oxide layer.

In an embodiment of the present invention, the silicon oxide layer may be formed of silicon oxide (SiO ₂ ).

In an embodiment of the present invention, the base substrate may comprise a plastic material.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor, including the steps of forming a gate electrode on a base substrate, forming a gate insulating film on the base substrate and the gate electrode, Forming an amorphous silicon layer on the gate insulating film in correspondence with the gate electrode, forming a catalyst layer on the amorphous silicon layer, and radiating heat to the catalyst layer to crystallize the amorphous silicon layer to form a polycrystalline silicon layer Forming a first contact hole exposing a part of the polycrystalline silicon layer in the catalyst layer and a second contact hole exposing another part of the polycrystalline silicon layer; Forming an ohmic contact layer on the first contact hole, Forming a source electrode connected to the ohmic contact layer and a drain electrode connected to the ohmic contact layer corresponding to the second contact hole.

In an embodiment of the present invention, the radiant heat is irradiated on the catalyst layer for about 5 to 15 minutes.

In an embodiment of the present invention, the temperature of the radiant heat may be about 900 ° C to 1000 ° C.

According to another aspect of the present invention, there is provided a liquid crystal display comprising: a first substrate having a common electrode; a liquid crystal layer; a gate electrode formed on the base substrate; a gate electrode formed on the base substrate and the gate electrode; A first contact hole formed in the catalyst layer; and a second contact hole formed in the catalyst layer, the first contact hole being formed in the catalyst layer and the first contact hole being formed in the catalyst layer, An ohmic contact layer connected to the polycrystalline silicon layer through a second contact hole, a source electrode connected to the ohmic contact layer corresponding to the first contact hole, and a source electrode connected to the ohmic contact layer corresponding to the second contact hole A thin film transistor including a drain electrode, and a pixel electrode electrically connected to the drain electrode, And a second substrate which receives the liquid crystal layer through coupling with the first substrate.

According to such a thin film transistor, a method of manufacturing the same, and a liquid crystal display using the same, a silicon oxide layer as a catalyst layer is formed on the amorphous silicon layer, and only the amorphous silicon layer under the silicon oxide layer is crystallized It is possible to crystallize the fine pattern without using a mask, thereby reducing the cost.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments. It is to be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the term "comprises" or "comprising ", etc. is intended to specify that there is a stated feature, figure, step, operation, component, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

In the accompanying drawings, the dimensions of the substrate, layer (film), or patterns are shown enlarged in actuality for clarity of the present invention. In the present invention, when each layer (film), pattern or structure is referred to as being formed on the substrate, on each layer (film) or on the patterns, ) Means that the pattern or structures are directly formed on or under the substrate, each layer (film) or patterns, or another layer (film), another pattern or other structure may be additionally formed on the substrate.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Thin film transistor

1 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention.

1, a thin film transistor 100 according to an exemplary embodiment of the present invention includes a base substrate 110, a gate electrode 120, a gate insulating layer 130, a polycrystalline silicon layer 140, a catalyst layer 150, An ohmic contact layer 160, a source electrode 170, and a drain electrode 180.

The base substrate 110 is made of a plastic material. When the base substrate is made of a plastic material, since the heat-resistant temperature of the base substrate is low in the process, a high-temperature process can not be used, and the characteristics and reliability of a thin-film transistor (TFT) may be deteriorated.

The gate electrode 120 is formed on the base substrate 110. The gate electrode 120 receives a gate voltage from the outside.

The gate insulating layer 130 covers the gate electrode 120 to electrically isolate the gate electrode 120.

The polycrystalline silicon layer 140 is disposed on the gate insulating layer 130. The polycrystalline silicon layer 140 is disposed in a region corresponding to the gate electrode 120 of the gate insulating layer 130. The polycrystalline silicon layer 140 includes a plurality of polysilicon crystals arranged side by side along a specific direction.

The catalyst layer 150 is disposed on the polycrystalline silicon layer 140. The catalyst layer 150 includes a silicon oxide layer, and the silicon oxide layer according to the present invention is silicon oxide (SiO ₂ ). Radiant heat at about 900 DEG C to 1000 DEG C is irradiated onto the catalyst layer for about 5 to 15 minutes. The radiation heat is transmitted through the catalyst layer 150 and irradiated to the base substrate 110 so that the amorphous silicon layer corresponding to the gate electrode 120 is changed to the polycrystalline silicon layer 140 including the polycrystalline silicon crystal do.

The ohmic contact layer 160 is disposed on the polycrystalline silicon layer 140 and the catalyst layer 150. A first contact hole 162 and a second contact hole 164 are formed in the catalyst layer 150 to expose the polysilicon layer 140.

The source electrode 170 is disposed on the ohmic contact layer 160 and electrically connected to the polysilicon layer 140 through the ohmic contact layer 160 via the first contact hole 162. [ do. The drain electrode 180 is disposed on the ohmic contact layer 160 and is electrically connected to the polycrystalline silicon layer 140 through the ohmic contact layer 160 through the second contact hole 164 .

Manufacturing method of thin film transistor

2A is a cross-sectional view illustrating a gate electrode of a thin film transistor according to an embodiment of the present invention.

Referring to FIG. 2A, a gate metal is deposited over the entire surface of the base substrate 110 to form a gate thin film. The gate thin film is patterned by a photolithography process so that a gate electrode 120 is formed on the base substrate 110.

FIG. 2B is a cross-sectional view showing the gate insulating film, the apolipace silicon thin film, and the silicon oxide thin film formed on the base substrate shown in FIG. 2A.

Referring to FIG. 2B, after the gate electrode 120 is formed, an insulating material is deposited on the base substrate 110 so that the gate electrode 120 is covered with the gate insulating layer 130 on the base substrate 110, .

After the gate insulating layer 130 is formed, an amorphous silicon material is deposited on the gate insulating layer 130 so that the amorphous silicon thin layer 145 is formed so that the gate insulating layer 130 is covered.

After the amorphous silicon thin film 145 is formed, a silicon oxide material is deposited to cover the amorphous silicon thin film 145 to form a silicon oxide thin film 155.

2C to 2E are cross-sectional views illustrating crystallization of an amorphous silicon layer into a polycrystalline silicon layer according to an embodiment of the present invention.

Referring to FIG. 2C, the amorphous silicon thin film 145 and the silicon oxide thin film 155 shown in FIG. 2B are patterned by a photolithography process to form an amorphous silicon layer 147 and an amorphous silicon A catalyst layer 150 is formed on the layer 147

Radiation heat 190 of about 900 ° C. to 1000 ° C. is irradiated on the catalyst layer 150 at a certain distance on the catalyst layer for about 5 to 15 minutes. The radiation heat 190 is transmitted through the catalyst layer 150 and irradiated to the base substrate 110 so that the amorphous silicon layer 147 formed in the region corresponding to the gate electrode 120 includes a polycrystalline silicon crystal Is changed to a polycrystalline silicon layer (not shown).

Referring to FIG. 2D, a silicon oxide layer (SiOx layer) is formed on an amorphous silicon layer (a-Si layer), and radiation heat is irradiated onto the silicon oxide layer (SiOx). The radiant heat is transmitted through a silicon oxide layer (SiO x layer) to crystallize the amorphous silicon layer (a-Si layer). For example, the thickness of the silicon oxide layer may be from about 150 nm to about 250 nm. The silicon oxide layer may be formed of silicon oxide (SiO ₂ ).

Silicon oxide (SiO ₂ ) has a high absorption rate of radiant heat and can serve as a seed serving as a seed for crystallizing the amorphous silicon layer.

Referring to FIG. 2E, after the silicon oxide layer (SiOx layer) is irradiated with the radiant heat, the amorphous silicon layer (a-Si layer) is melted to form a polysilicon layer. At this time, only the amorphous silicon layer under the silicon oxide layer (SiOx layer) is crystallized.

FIGS. 2F and 2H are graphs showing the crystallization degree of amorphous silicon when a silicon oxide layer according to an embodiment of the present invention is applied.

Referring to FIG. 2F, silicon oxide (SiO ₂ ) is deposited on the amorphous silicon layer (a-Si) to a thickness of about 200 nm and then etched to a circular shape of about 100 μm to about 600 μm.

FIG. 2G is a plan view of FIG. 2F.

Referring to FIG. 2G, the amorphous silicon layer (a-Si) is defined as A, the portion where silicon oxide (SiO ₂ ) is deposited on the amorphous silicon layer is defined as B, the radiant heat at about 900 ° C is irradiated for about 10 minutes, The Raman spectroscopy results of the membrane were observed.

Referring to FIG. 2H, it can be seen that the B portion on which the silicon oxide (SiO ₂ ) is deposited is much less crystallized than the A portion formed by only the amorphous silicon layer (a-Si) .

As a result, the silicon oxide layer is characterized in that only the amorphous silicon layer under the silicon oxide layer is subjected to heat treatment by heat treatment. With such a silicon oxide layer, in the case of the plastic substrate, It was found that crystallization was possible.

2I is a cross-sectional view showing a source electrode and a drain electrode formed in the gate insulating layer shown in FIG. 2C.

Referring to FIG. 2I, the catalyst layer 150 is patterned by a photolithography process to form a first contact hole 162 and a second contact hole 164 which expose the polycrystalline silicon layer 140. At this time, the ohmic contact layer 160 is formed on the catalyst layer 150. Examples of the material for forming the ohmic contact layer 160 include amorphous silicon (n + a-Si) doped with an n-type impurity at a high concentration.

Metal is deposited on the gate insulating layer 130 to form a source / drain metal thin film. The source / drain metal thin film is patterned to form a source electrode 170 and a drain electrode 180 in the source / drain metal thin film.

The source electrode 170 is electrically connected to the polycrystalline silicon layer 140 through the first contact hole 162 and the drain electrode 180 is electrically connected to the polycrystalline silicon layer 140 through the second contact hole 164. Layer 140 as shown in FIG.

Display device

3 is a cross-sectional view of a display device 200 according to an embodiment of the present invention.

Referring to FIG. 3, a display device 200 according to an embodiment of the present invention includes a first substrate 110, a second substrate 210, and a liquid crystal layer 310.

The first substrate 110 includes a plurality of thin film transistors 100, a passivation film 220, and a pixel electrode 222 arranged in a matrix form.

The thin film transistor 100 includes a gate electrode 120, a gate insulating film 130, a polycrystalline silicon layer 140, a catalyst layer 150, an ohmic contact layer 160, a source electrode 170 and a drain electrode 180 . Since the thin film transistor 100 has been described with reference to FIG. 1, a detailed description thereof will be omitted. The manufacturing method of the thin film transistor 100 is also described with reference to FIGS. 2A to 2H, and a detailed description thereof will be omitted.

The passivation film 220 is formed to cover the thin film transistor 100.

The pixel electrode 222 includes a material such as indium tin oxide (ITO) or indium zinc oxide (IZO) that is optically transparent and electrically conductive. The pixel electrode 222 is electrically connected to the drain electrode 180 of each thin film transistor 100 via a hole formed by removing a part of the passivation film 220.

The second substrate 210 is disposed to face the first substrate 110. A common electrode 212 is formed on the second substrate to correspond to a surface facing the first substrate 110. The common electrode 212 may be formed over the entire surface of the second substrate 210. The common electrode 212 may include an optically transparent and electrically conductive material such as indium tin oxide or indium zinc oxide.

A color filter 214 may be disposed between the second substrate 210 and the common electrode 212. The color filter 214 is disposed to face the pixel electrodes 222 formed on the first substrate 110. The color filter 214 may be formed on the first substrate 110.

The liquid crystal layer 310 is formed between the first substrate 110 and the second substrate 210 and displays an image based on light provided from the outside.

According to the present invention, a silicon oxide layer is formed on the amorphous silicon layer, and only the amorphous silicon layer under the silicon oxide layer is crystallized by the radiation heat that has passed through the silicon oxide layer, so that the fine pattern can be crystallized without using a mask, Can be saved.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined in the appended claims. It will be possible.

1 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention

2A is a cross-sectional view illustrating a gate electrode of a thin film transistor according to an embodiment of the present invention.

FIG. 2B is a cross-sectional view showing the gate insulating film, the apolipace silicon thin film, and the silicon oxide thin film formed on the substrate shown in FIG. 2A.

2C to 2E are cross-sectional views illustrating crystallization of an amorphous silicon layer into a polycrystalline silicon layer according to an embodiment of the present invention.

FIGS. 2F and 2H are graphs showing the crystallization degree of amorphous silicon when a silicon oxide layer according to an embodiment of the present invention is applied.

2I is a cross-sectional view showing a source electrode and a drain electrode formed in the gate insulating layer shown in FIG. 2C.

3 is a cross-sectional view of a display device according to an embodiment of the present invention.

Description of the Related Art

110: base substrate 120: gate electrode

130: gate insulating film 140: polycrystalline silicon layer

145 Amorphous silicon thin film 147 Amorphous silicon layer

150: catalyst layer 155: silicon oxide thin film

160: ohmic contact layer 170: source electrode

180: drain electrode 190: radiation

200: display device 210: second substrate

220: passivation film 222: pixel electrode

310: liquid crystal layer

Claims (13)

A base substrate; A gate electrode formed on the base substrate; A gate insulating film disposed on the base substrate and the gate electrode; A polycrystalline silicon layer disposed on the gate insulating film in correspondence with the gate electrode; A catalyst layer disposed on the polycrystalline silicon layer; An ohmic contact layer disposed on the catalyst layer and connected to the polysilicon layer through a first contact hole formed in the catalyst layer and a second contact hole formed in the catalyst layer; A source electrode connected to the ohmic contact layer corresponding to the first contact hole; And And a drain electrode connected to the ohmic contact layer corresponding to the second contact hole. The thin film transistor according to claim 1, wherein the catalyst layer has a thickness of 150 nm to 250 nm. The thin film transistor of claim 2, wherein the catalyst layer comprises a silicon oxide layer. The thin film transistor according to claim 3, wherein the silicon oxide layer is made of silicon oxide (SiO ₂ ). The thin film transistor of claim 1, wherein the base substrate comprises a plastic material. Forming a gate electrode on the base substrate; Forming a gate insulating film on the base substrate and the gate electrode; Forming an amorphous silicon layer on the gate insulating film in correspondence to the gate electrode; Forming a catalyst layer on the amorphous silicon layer; Irradiating the catalyst layer with radiation heat to crystallize the amorphous silicon layer to form a polycrystalline silicon layer; Forming a first contact hole exposing a part of the polycrystalline silicon layer in the catalyst layer and a second contact hole exposing another part of the polycrystalline silicon layer; Forming an ohmic contact layer on the catalyst layer while burying the first and second contact layers; And And forming a source electrode connected to the ohmic contact layer corresponding to the first contact hole and a drain electrode connected to the ohmic contact layer corresponding to the second contact hole. The method according to claim 6, wherein the catalyst layer has a thickness of 150 nm to 250 nm. 8. The method of claim 7, wherein the catalyst layer comprises a silicon oxide layer. 9. The method of claim 8 wherein the silicon oxide layer is manufactured of a thin film transistor, characterized in that of silicon oxide (SiO _2). 7. The method of claim 6, wherein the radiant heat is irradiated on the catalyst layer for 5 minutes to 15 minutes. 11. The method according to claim 10, wherein the temperature of the radiant heat is in a range of 900 ° C to 1000 ° C. 7. The method of claim 6, wherein the base substrate comprises a plastic material. A first substrate having a common electrode; A gate electrode formed on the base substrate, a gate insulating film disposed on the base substrate and the gate electrode, a polycrystalline silicon layer disposed on the gate insulating film in correspondence to the gate electrode, a catalyst layer disposed on the polycrystalline silicon layer, An ohmic contact layer disposed on the catalyst layer and connected to the polycrystalline silicon layer through a first contact hole formed in the catalyst layer and a second contact hole formed in the catalyst layer, a source connected to the ohmic contact layer corresponding to the first contact hole, A second substrate including a thin film transistor including an electrode, a drain electrode connected to the ohmic contact layer corresponding to the second contact hole, and a pixel electrode electrically connected to the drain electrode; And And a liquid crystal layer formed between the first substrate and the second substrate.

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