KR101256674B1 - Thin film transistor and method for fabricating thereof and method for fabricating liquid crystal display device having thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, and more particularly, to a thin film transistor, a method of manufacturing the same, and a method of manufacturing a liquid crystal display device having the same, by forming a channel layer of the thin film transistor by an inkjet method. The disclosed method of manufacturing a thin film transistor includes forming a gate electrode on a substrate; Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a metal film and a conductive film; Etching the metal layer and the conductive layer to simultaneously form a source / drain electrode and an ohmic contact layer; Forming a liquid silicon film in a channel region between the source / drain electrodes; And forming a channel layer by performing an annealing process on the substrate on which the liquid silicon film is formed.

The present invention has the effect of simplifying the manufacturing process and reducing the production cost by simultaneously forming the channel layer and the ohmic contact layer of the thin film transistor of the liquid crystal display using liquid silicon.

Liquid Silicon, Thin Film Transistor, Liquid Crystal Display, PSG, Inkjet

Description

Thin film transistor, method for manufacturing same, and method for manufacturing liquid crystal display device having the same

1 is a cross-sectional view showing a thin film transistor manufactured according to the prior art.

2A to 2E are cross-sectional views illustrating a manufacturing process of a thin film transistor according to the present invention.

3 is a plan view illustrating a pixel structure of a liquid crystal display according to the present invention.

4A through 4F are cross-sectional views illustrating a process of manufacturing a liquid crystal display device along the line II ′ of FIG. 3.

Description of the Related Art [0002]

100: insulating substrate 102: gate insulating film

103a: source electrode 103b: drain electrode

101: gate electrode 104: ohmic contact layer

105: liquid silicon film 106: channel layer

109: protective film 107a, 107b: power supply terminal

206: first storage electrode 207: second storage electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, and more particularly, to a thin film transistor, a method of manufacturing the same, and a method of manufacturing a liquid crystal display device having the same, by forming a channel layer of the thin film transistor by an inkjet method.

As an imaging device, an active matrix liquid crystal display device having a wide range of applications mainly uses a thin film transistor as a switching element. The semiconductor layer of the thin film transistor (TFT) uses an amorphous silicon layer, which is advantageous for manufacturing a small-size TFT LCD, but is difficult to apply to manufacturing a large-screen TFT LCD due to its low mobility.

Therefore, in recent years, research on polysilicon TFTs using a polysilicon layer having excellent mobility as a semiconductor layer has been actively conducted. Such a polysilicon TFT can be easily applied to fabrication of a large-screen TFT LCD, and of course, driven on a TFT array substrate. Drive ICs can be integrated together, providing an integrated density and competitive price.

As a method for forming a polysilicon layer, there are a method of directly depositing polysilicon and a method of depositing amorphous silicon and then crystallizing it with polysilicon. After forming an amorphous silicon layer on a substrate, a crystallization process is generally performed. The latter method is used to carry out and convert the amorphous silicon layer into a polysilicon layer.

Meanwhile, the polysilicon thin film transistor is composed of a gate electrode, an active layer, and a source / drain electrode, and the patterns are selectively insulated by an insulating film to operate independently.

As the insulating film, an inorganic insulating film such as silicon nitride (SiNx) or silicon oxide (SiOx) having excellent handling characteristics, good adhesion to metal, and high dielectric breakdown voltage is mainly used.

1 is a cross-sectional view showing a thin film transistor manufactured according to the prior art.

As shown in FIG. 1, a thin film transistor forms a buffer layer 2 as an insulating film on a substrate 10, and then forms an amorphous silicon (a-Si) layer on the buffer layer 2.

The insulating film constituting the buffer layer 2 is uniformly deposited at 300-400 ° C. using a method such as plasma-enhanced CVD (PECVD), low-pressure CVD (LPCVD), or sputtering using a siren (SiH 4) gas. Form. In this case, the buffer layer 2 formed on the substrate 10 is an inorganic insulating film such as silicon nitride (SiNx) or silicon oxide (SiOx).

As described above, when an amorphous silicon layer made of amorphous silicon (a-Si) is formed on the buffer layer 2, the polysilicon layer is formed by performing an annealing process using an excimer laser on the amorphous silicon layer. After crystallization, the polysilicon layer is patterned to form a channel layer 4.

Thereafter, an inorganic insulating film such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface of the substrate 10 including the channel layer 3 to form the gate insulating film 5.

Thereafter, a conductive material such as aluminum (Al) or Al alloy is deposited on the entire surface of the gate insulating layer 5 and patterned by photolithography to form a gate electrode (or a gate electrode) on a predetermined portion above the channel layer 4. 1) and N-type impurities are ion implanted using the gate electrode 1 as a mask to form an ohmic contact layer 6 in the channel layer 4.

In this case, the ion implantation region is a region where the source / drain electrodes 9a and 9b are formed, and the channel layer 4 which is masked by the gate electrode 1 and where impurities are not implanted becomes a channel region.

Then, an interlayer insulating film 7 is formed by depositing an inorganic insulating film such as silicon nitride or silicon oxide on the entire surface of the substrate 10 on which the gate electrode 1 is formed. The deposition method is the same as that of the gate insulating film 5. Subsequently, the interlayer insulating film 7 formed on the source / drain electrodes 9a and 9b and the gate insulating film 5 are etched by using a photolithography process on the entire surface of the substrate 10 on which the interlayer insulating film 7 is formed. Form a hole.

A metal film is formed on the substrate 10 on which the contact hole is formed, and then etched to form source / drain electrodes 9a and 9b to complete the polysilicon thin film transistor.

However, the thin film transistor manufacturing process as described above has a disadvantage in that the manufacturing process is complicated because it is formed through a plurality of mask processes.

In particular, since the ohmic contact layer formed by the channel layer and the ion implantation process of the thin film transistor are performed in separate processes, the manufacturing process is complicated and the manufacturing cost increases.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor, a method of manufacturing the same, and a method of manufacturing a liquid crystal display device, by simplifying a manufacturing process by forming a channel layer of a thin film transistor using liquid silicon.

In order to achieve the above object, a thin film transistor according to the present invention,

A gate electrode;

A gate insulating film formed on the gate electrode;

A source / drain electrode formed on the gate insulating film;

An ohmic contact layer formed on an entire surface of the source / drain electrode; And

And a channel layer formed on the gate insulating layer corresponding to the gate electrode while being in contact with a portion of the ohmic contact layer.

According to another embodiment of the present invention, a thin film transistor manufacturing method includes

Forming a gate electrode on the substrate;

 Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a metal film and a conductive film;

Etching the metal layer and the conductive layer to simultaneously form a source / drain electrode and an ohmic contact layer;

Forming a liquid silicon film in a channel region between the source / drain electrodes; And

And forming a channel layer by performing an annealing process on the substrate on which the liquid silicon film is formed.

According to still another embodiment of the present invention, a method of manufacturing a liquid crystal display device is provided.

Forming a gate electrode and a gate wiring on the substrate;

Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a metal film and a conductive film;

Etching the metal layer and the conductive layer to simultaneously form a source / drain electrode, an ohmic contact layer, and a data line;

Forming a liquid silicon film in a channel region between the source / drain electrodes; And

And forming a channel layer by performing an annealing process on the substrate on which the liquid silicon film is formed.

According to the present invention, the channel layer of the thin film transistor is formed using liquid silicon, thereby simplifying the manufacturing process.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2E are cross-sectional views illustrating a manufacturing process of a thin film transistor according to the present invention.

2A and 2B, a metal film is deposited on the transparent insulating substrate 100 and etched to form a gate electrode 101, and on the insulating substrate 100 on which the gate electrode 101 is formed. The gate insulating film 102 is formed. The gate insulating layer 102 is an inorganic insulating layer such as silicon nitride (SiNx) or silicon oxide (SiOx).

Then, a metal film is formed over the entire surface of the insulating substrate 100 on which the gate insulating film 102 is formed, and then a conductive film is formed.

Usable as the conductive film are PSG (Phospher-Silicate-Glass), or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ .

When the metal film and the conductive film are formed on the insulating substrate 100 as described above, as shown in FIG. 2B, a photoresist is coated on the insulating substrate 100 and etched according to a mask process to etch the source electrode 103a. The drain electrode 103b and the ohmic contact layer 104 are formed at the same time.

Therefore, the ohmic contact layer 104 is formed in all regions on the source / drain electrodes 103a and 103b.

As described above, when the source / drain electrodes 103a and 103b are formed on the insulating substrate 100, as shown in FIG. 2C, inkjet (Ink) is applied to the channel region between the source / drain electrodes 103a and 103b. The liquid silicon film 105 is formed in a Jet) manner.

The liquid silicon film 105 uses silicon such as Si ₅ H ₁₀ (CyclopentaSilane).

When the liquid silicon film 105 is formed in the channel region as described above, as shown in FIG. 2D, an annealing process is performed to form the channel layer 106.

According to the annealing process, the thickness of the liquid silicon film is reduced to become similar to the heights of the source / drain electrodes 103a and 103b and the ohmic contact layer 104.

The annealing process heats the substrate at a temperature in the range of 200 to 800 ° C. (usually about 540 ° C.), and proceeds by irradiating a laser of 345 nm / cm 2 with a wavelength of 308 nm.

As described above, when the channel layer 106 is formed, as shown in FIG. 2E, the protective layer 109 is formed on the insulating substrate 100, and then etched to form an ohmic contact on the source / drain electrodes 103a and 103b. Layer 104 is exposed to the outside.

Thereafter, a metal film may be deposited and patterned on the insulating substrate 100 to form power terminals 107a and 107b electrically contacting the source / drain electrodes 103a and 103b.

In the thin film transistor of the present invention, there is an advantage in that a channel layer can be formed without performing a deposition process and a mask process.

In addition, the present invention can form a channel layer without a deposition process by PECVD, there is an advantage of reducing the process burden.

3 is a plan view illustrating a pixel structure of a liquid crystal display according to the present invention.

As shown in FIG. 3, the gate wiring 201 for applying the driving signal and the data wiring 205 for applying the data signal are alternately arranged to define a unit pixel area, and the gate wiring 201 and the data wiring ( A thin film transistor (TFT), which is a switching element, is disposed in an area where 205 intersects.

Since the thin film transistor is manufactured by forming liquid silicon in a channel region by an inkjet method, a channel layer is formed only in the source / drain electrode region.

A first common wiring 203 is formed in the unit pixel region in parallel with the gate wiring 201 and intersects with the data wiring 205, and is branched from both sides of the first common wiring 203. One common electrode 203a is formed in a direction parallel to the data line 205.

Here, the data line 205 and the first common electrode 203a are formed in a structure (bent structure) bent at a predetermined angle to secure a viewing angle.

In addition, a first storage electrode 206 is formed in an area adjacent to the gate wiring 201 and the gate electrode 201a, and the first storage electrode 206 is connected to the first common electrode 203a. have.

Therefore, a closed loop structure is formed integrally with the first common wiring 203, the first common electrode 203a, and the first storage electrode 206.

The second common line 213 is formed to overlap the center area of the first common line 203 formed in the unit pixel area, and is electrically connected to the first common line 203.

The second common electrode 213a is branched from the second common wire 213 along the unit pixel area.

The second common electrode 213a is also bent (folded) at a predetermined angle for a wide viewing angle and disposed in parallel with the first common electrode 203a and the data line 205.

The second storage electrode 207 for forming storage capacitance overlaps the first storage electrode 206, and the first pixel electrode 207a and the second pixel are formed from the second storage electrode 207. The electrode 207a branches into the unit pixel region.

In particular, the first pixel electrode 207a is branched from the second storage electrode 207 and alternately disposed with the second common electrode 213a in the transmission region of the unit pixel region.

The first pixel electrode 207a is also bent at a predetermined angle.

In addition, the second pixel electrode 207b is formed to overlap the upper portion of the first common electrode 203a branched from the second storage electrode 207 and branched from the first common line 203.

That is, a storage capacitance is formed between the first storage electrode 206 and the second storage electrode 207, and an additional storage capacitance is also formed between the first common electrode 203a and the second pixel electrode 207b. The storage capacitance capacity is larger than before.

As such, as the storage capacitance in the unit pixel area increases, screen quality can be improved.

In the thin film transistor of the present invention, there is an advantage in that a channel layer can be formed without performing a deposition process and a mask process.

In addition, the present invention can form a channel layer without a deposition process by PECVD, there is an advantage of reducing the process burden.

4A to 4G are cross-sectional views illustrating a process of manufacturing a liquid crystal display device along the line II ′ of FIG. 3.

As shown in FIG. 4A, a metal film is deposited on the transparent insulating substrate 210 in the region I-I ′, and the gate wiring, the gate electrode 201a, and the first common wiring (not shown) according to the first mask process step. (See FIG. 3) and the first storage electrode 206.

As described above, when the gate electrode 201a, the gate wiring, the first storage electrode 206, the first common electrode and the first common wiring are formed on the insulating substrate 210 (see FIG. 3), shown in FIG. 4B. As described above, the gate insulating film 212 is formed over the entire region of the insulating substrate 210, and then a metal film and a conductive film are formed over the entire gate insulating film 212.

Usable as the conductive film include PSG (Phospher-Silicate-Glass), or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ .

As described above, when the metal film and the conductive film are formed on the insulating substrate, as shown in FIG. 4B, a photoresist is applied on the insulating substrate 210 and etched according to a mask process to etch the source electrode 217a and the drain electrode ( 217b) and the ohmic contact layer 236 and a data line (not shown) are formed at the same time.

At this time, the data line is formed to define the pixel area to cross the gate line.

Accordingly, the ohmic contact layer 236 is formed in all regions on the source / drain electrodes 217a and 217b.

When the source / drain electrodes 217a and 217b are formed on the insulating substrate 210 as described above, as shown in FIG. The silicon film 233 is formed.

The liquid silicon film 233 uses silicon such as Si ₅ H ₁₀ (CyclopentaSilane).

When the liquid silicon film 233 is formed in the channel region as described above, as shown in FIG. 4D, an annealing process is performed to form the channel layer 233a.

According to the annealing process, the thickness of the liquid silicon film is reduced to become similar to the heights of the source / drain electrodes 217a and 217b and the ohmic contact layer 236.

The annealing process heats the substrate at a temperature in the range of 200 to 800 ° C. (usually about 540 ° C.), and proceeds by irradiating a laser of 345 nm / cm 2 with a wavelength of 308 nm.

As described above, when the channel layer 233a is formed, as shown in FIG. 4E, the protective layer 219 is formed on the insulating substrate 210 and then etched to form the ohmic contact layer 236 on the drain electrode 217b. Expose some.

As described above, when the contact hole process is completed, as shown in FIG. 4F, a transparent metal film such as ITO is formed on the entire surface of the insulating substrate 210, and then a mask process is performed to form the second storage electrode 207. The first pixel electrode 207a is formed.

In this case, the second pixel electrode, the second common wiring, and the second common electrode shown in FIG. 3 are patterned together.

In the thin film transistor of the present invention, there is an advantage in that a channel layer can be formed without performing a deposition process and a mask process.

In addition, the present invention can form a channel layer without a deposition process by PECVD, there is an advantage of reducing the process burden.

As described in detail above, the thin film transistor of the present invention has an effect of forming a channel layer without performing a deposition process and a mask process.

In addition, the present invention can form a channel layer without a deposition process by PECVD, there is an effect of reducing the process burden.

In addition, the present invention has the effect of simplifying the process because the source / drain electrode and the ohmic contact layer of the thin film transistor is simultaneously patterned.

The present invention is not limited to the above-described embodiments, and various changes can be made by those skilled in the art without departing from the gist of the present invention as claimed in the following claims.

Claims (17)

delete delete delete Forming a gate electrode on the substrate;  Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a metal film and a conductive film; Etching the metal layer and the conductive layer to simultaneously form a source / drain electrode and an ohmic contact layer; Forming a liquid silicon film in a channel region between the source / drain electrodes; Performing an annealing process on the substrate on which the liquid silicon film is formed to form a channel layer; Forming a protective layer on the substrate on which the channel layer is formed; Etching the passivation layer to form a contact hole exposing an ohmic contact layer on a source / drain electrode; And Depositing and patterning a metal film on the contact hole to form a power terminal; The annealing process is a thin film transistor manufacturing method comprising a heating step and a step of irradiating a laser. The method of claim 4, wherein the liquid silicon film is formed in a channel region by an inkjet method. The method of claim 4, wherein the liquid silicon film is made of Si ₅ H ₁₀ (CyclopentaSilane). The method of claim 4, wherein the conductive film is any one of PSG (Phospher-Silicate-Glass) or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ . The method of claim 4, wherein the ohmic contact layer is formed on an entire surface of the source / drain electrode. The method of claim 4, wherein the annealing process comprises heating the substrate in a temperature range of 200 ° C. to 800 ° C., and irradiating a laser having a wavelength of 308 nm and an energy of 345 mJ / cm 2. . The method of claim 4, wherein both edges of the channel layer are in contact with the ohmic contact layer. Forming a gate electrode, a gate wiring and a first storage electrode on the substrate; Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a metal film and a conductive film; Etching the metal layer and the conductive layer to simultaneously form a source / drain electrode, an ohmic contact layer, and a data line; Forming a liquid silicon film in a channel region between the source / drain electrodes; And Performing an annealing process on the substrate on which the liquid silicon film is formed to form a channel layer; Forming a protective layer on the substrate on which the channel layer is formed; Etching the passivation layer to form a contact hole exposing the ohmic contact layer on the drain electrode; And Depositing and patterning a metal film on the contact hole to form a second storage electrode and a pixel electrode; The annealing process is a thin film transistor manufacturing method comprising a heating step and a step of irradiating a laser. 12. The method of claim 11, wherein the liquid silicon film is formed in the channel region by an inkjet method. The method of claim 11, wherein the liquid silicon film is made of Si ₅ H ₁₀ (CyclopentaSilane). The method of claim 11, wherein the conductive film is any one of PSG (Phospher-Silicate-Glass) or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ . The method of claim 11, wherein the ohmic contact layer is formed on an entire surface of the source / drain electrode. 12. The liquid crystal display device according to claim 11, wherein the annealing step includes heating a substrate in a temperature range of 200 to 800 ° C, and irradiating a laser having a wavelength of 308 nm and an energy of 345 mJ / cm 2. Manufacturing method. 12. The method of claim 11, wherein both edges of the channel layer are in contact with the ohmic contact layer.

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