KR101492946B1 - Crystalline silicon solar cell and manufacturing method and system thereof - Google Patents

Crystalline silicon solar cell and manufacturing method and system thereof Download PDF

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KR101492946B1
KR101492946B1 KR20070075173A KR20070075173A KR101492946B1 KR 101492946 B1 KR101492946 B1 KR 101492946B1 KR 20070075173 A KR20070075173 A KR 20070075173A KR 20070075173 A KR20070075173 A KR 20070075173A KR 101492946 B1 KR101492946 B1 KR 101492946B1
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step
substrate
semiconductor layer
type semiconductor
depositing
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KR20070075173A
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KR20090011519A (en
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홍진
김재호
김정식
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주성엔지니어링(주)
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • Y02P70/52Manufacturing of products or systems for producing renewable energy
    • Y02P70/521Photovoltaic generators

Abstract

The present invention discloses a method of manufacturing a crystalline silicon solar cell and a manufacturing apparatus therefor. A method of manufacturing a crystalline silicon solar cell according to the present invention includes: a first step of preparing a crystalline silicon substrate of a first conductivity type; A second step of depositing a second conductive type semiconductor layer on one surface of the substrate; A third step of depositing a transparent film having a concave-convex structure on the surface of the second conductive type semiconductor layer; A fourth step of depositing a first conductive type semiconductor layer having a larger energy bandgap than the substrate on the other surface of the substrate; And a fifth step of forming a first electrode on the transparent layer and a second electrode on the first conductive type semiconductor layer.
According to the present invention, the manufacturing process of the crystalline silicon solar cell can be simplified and the process time can be greatly shortened. That is, the texturing process, the high-temperature diffusion process for forming the PN junction surface, the process for removing by-products such as PSG and BSG, and the edge isolation process can be omitted, and productivity can be greatly improved.
Solar cells, crystalline silicon

Description

{Crystalline silicon solar cell and manufacturing method and system thereof}

The present invention relates to a method of manufacturing a solar cell and a manufacturing system thereof, and more particularly, to a method of simplifying a manufacturing process of a crystalline silicon solar cell and reducing manufacturing cost.

A solar cell is an element that generates an electromotive force at both ends of a substrate as a minority carrier excited by sunlight spreads across a PN junction surface inside a PN junction semiconductor. In order to manufacture such a solar cell, a semiconductor material such as a single crystal silicon, a polycrystalline silicon, an amorphous silicon, or a compound semiconductor is used.

Of these, monocrystalline silicon has the highest energy conversion efficiency, but polycrystalline silicon is more widely used because of its high cost. In recent years, thin-film solar cells, which can be manufactured at a very low cost by depositing a thin film of amorphous silicon or compound semiconductor on an inexpensive substrate such as glass or plastic, have been widely used.

The present invention relates to a method and a system for manufacturing a solar cell using monocrystalline or polycrystalline crystalline silicon.

Hereinafter, a process for manufacturing a conventional crystalline silicon solar cell will be described with reference to the process flow chart of FIG. 1 and the process sectional views of FIGS. 2A to 2F.

First, a p-type doped crystalline silicon substrate 10 is prepared. (ST11, Fig. 2A)

Then, a texturing process is performed to form fine irregularities on the surface of the substrate 10 in order to increase the light absorption rate. In the texturing process, a wet etching method using a base or an acid solution is widely used, but in recent years, a dry etching method using a plasma has also been used. (ST12, Fig. 2B)

After the texturing process, an n-type dopant layer 12 is formed on the surface layer of the substrate 10 by doping an n-type dopant by a thermal diffusion method to form a PN junction structure in the substrate 10 do. In the drawing, the remaining portion of the p-type substrate 10, which is separated from the n + doping layer 12, is referred to as a p + layer 10 'for convenience. (ST13, Fig. 2C)

In the high-temperature diffusion step ST13, by-products such as PSG (Phosphor-Silicate Glass) which lowers the cell efficiency are generated, and the n + doping layer 12 is formed also at the edge portion of the substrate 10, .

Therefore, in order to increase the efficiency of the cell, a PSG removing process and an edge isolation process for removing the n + doping layer 12 of the edge must be performed. (ST14, ST15, Fig. 2D)

Subsequently, an antireflection film 14 made of SiN is formed on the n + -doped layer 12. (ST16, Fig. 2E)

Next, a front electrode 18 and a rear electrode 16 are formed on the front and rear surfaces of the substrate 10, respectively. To this end, a conductive paste containing Al or Ag is applied to the front and rear surfaces of the substrate 10 in a predetermined pattern, and the substrate 10 is sintered in a high-temperature furnace.

Specifically, the conductive paste applied on the top of the antireflection film 14 is electrically connected to the front electrode 18 through the antireflection film 14 by the redox reaction in the sintering process and in contact with the n + doping layer 12 .

The Al paste applied to the rear surface of the substrate 10 diffuses Al into the n + doped layer 12 during the sintering process to form a p ++ doped layer 13 to form a back surface field on the rear surface of the substrate 10, . (ST17, Fig. 2F)

The solar cell thus manufactured is manufactured as a module after being tested and classified. (ST18)

The conventional solar cell manufacturing process has some problems as follows.

First, in the case of applying the wet etching method in the texturing process, there is a problem that it is difficult to obtain a uniform surface roughness because the etching speed differs by several tens to several hundred times according to the crystal plane in the polycrystalline silicon substrate. In case of the dry etching method, the verification of the texturing efficiency has not yet been performed.

Second, the high-temperature diffusion process for forming a PN junction requires a long process time and a separate process for removing by-products such as PSG or BSG. In addition, the edge isolation process must be performed after the high temperature diffusion process, and such an additional process is a limiting factor for the productivity improvement.

In addition, since the substrate must be transferred to a quartz-shaped chamber in order to conduct high-temperature diffusion using a horizontal furnace, there is a problem in that the diffusion process and the back-and-forth process are not suitable for continuously proceeding in-line.

In addition, since a corrosive substance such as POCl3 must be used in the high-temperature diffusion process, there is always a problem in handling risks.

Thirdly, if the redox reaction for forming the front electrode 18 is not precisely controlled, the metal component of the front electrode 18 passes through the n + doping layer 12 and the p + layer 10 of the substrate 10 ') To generate a leakage current.

Therefore, in order to prevent this, the n + doping layer 12 must be formed deep enough in the high-temperature diffusion process, which results in a longer process time.

Fourth, when the Al paste is applied to the rear surface of the substrate 10 to form a rear surface electric field and then sintered, bowing of the substrate 10 occurs. Further, when an Al paste is applied to form a rear surface electric field, there is a problem that the thickness of the substrate becomes thick and the cost burden increases.

In order to induce the redox reaction so as to bring the front electrode 18 into contact with the n + doping layer 12, the substrate 10 must be sintered at a high temperature of 800 ° C. or higher. 10) may cause problems in the subsequent modularization process.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a crystalline solar cell manufacturing method which can simplify a complicated process and improve productivity and reduce cost.

It is also aimed to increase the productivity and reduce the footprint of the entire system by allowing the solar cell manufacturing system to be designed in an integrated system or in a continuous inline manner.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: preparing a crystalline silicon substrate of a first conductivity type; A second step of depositing a second conductive type semiconductor layer on one surface of the substrate; A third step of depositing a transparent film having a concavo-convex structure on the surface of the second conductive type semiconductor layer; A fourth step of depositing a first conductive type semiconductor layer having a larger energy bandgap than the substrate on the other surface of the substrate; And a fifth step of forming a first electrode on the transparent film and a second electrode on the first conductive type semiconductor layer.

The second conductive semiconductor layer may be microcrystalline silicon or amorphous silicon. The second conductive semiconductor layer may be deposited to a thickness of 50-500 Å.

The method may further include forming a buffer layer between the first step and the second step, wherein the buffer layer may be intrinsic or p-type doped microcrystalline silicon deposited to a thickness of 30 to 100 angstroms. The buffer layer and the second conductivity type semiconductor layer may be continuously deposited in the same chamber.

In the third step, the transparent layer may be a ZnO layer deposited to a thickness of 500 to 3000 ANGSTROM. The ZnO layer may be formed by using diethyl zinc (DEZ), H 2 O or O 3 as a raw material And may be deposited by MOCVD.

The first conductive semiconductor layer may be an amorphous silicon layer or an amorphous SiC layer deposited to a thickness of 50 to 500 ANGSTROM.

And forming a buffer layer having a thickness of 30 to 100 ANGSTROM on the other surface of the substrate before forming the first conductive semiconductor layer, wherein the buffer layer is intrinsic or p-type doped microcrystalline silicon .

The present invention also provides a semiconductor device comprising: a crystalline silicon substrate of a first conductivity type; A second conductivity type semiconductor layer formed on one surface of the substrate; A transparent film formed on the second conductive semiconductor layer and having a concave-convex structure on the surface; A first conductive semiconductor layer having an energy bandgap greater than that of the substrate and formed on the other surface of the substrate; A first electrode formed on the transparent film; And a second electrode formed on the second conductive type doping layer.

The present invention also relates to a transfer chamber comprising a substrate transfer means; A first process chamber connected to the first side of the transfer chamber for depositing a second conductive type semiconductor layer on one surface of the first conductive type crystalline silicon substrate; A second process chamber connected to the second side of the transfer chamber for depositing a transparent film having a concave-convex structure on the surface of the second conductive type semiconductor layer; A third processing chamber connected to the third side of the transfer chamber for depositing a first conductive type semiconductor layer on the other surface of the substrate, the third conductive type semiconductor layer having a larger energy bandgap than the substrate; And a load lock chamber connected to a side of the transfer chamber and alternating between an atmospheric pressure state and a vacuum state for exchanging a substrate with the outside.

The present invention also relates to a method of manufacturing a semiconductor device, comprising: a loading chamber alternating between an atmospheric pressure and a vacuum to transfer a substrate from the outside; A first process chamber disposed on a side of the loading chamber for depositing a second conductive type semiconductor layer on one surface of the first conductive type crystalline silicon substrate; A second process chamber disposed on a side of the first process chamber for depositing a transparent film having a concavo-convex structure on a surface of the second conductive semiconductor layer; A flipper installed on a side of the second process chamber and inverting the substrate; A third process chamber disposed on a side of the flipper for depositing a first conductive type semiconductor layer having a larger energy bandgap than the substrate on the other surface of the substrate; And an unloading chamber provided at a side of the third process chamber and alternating between an atmospheric pressure state and a vacuum state to carry out the substrate to the outside, and the substrate is placed in the loading chamber, the first process chamber, , The flipper, the third process chamber, and the unloading chamber in this order.

According to the present invention, the manufacturing process of the crystalline silicon solar cell can be simplified and the process time can be greatly shortened.

That is, since there is no need to perform texturing on Si wafers as in the prior art, the process is simplified and the process time is shortened.

Since the high temperature diffusion is not performed in order to form the PN junctions, the generation of PSG, BSG, and the like is prevented, and therefore, the step of removing these by-products can be omitted, and the productivity can be improved by shortening the process time and cost have.

In addition, the edge isolation process can be omitted, and the productivity can be improved by shortening the process time and cost.

In addition, since there is no need to deposit an Al layer to form a rear electric field, the production cost can be greatly reduced, and the device can be made thinner.

In addition, since conductive ZnO is used as an antireflection film, it is not necessary to induce a high-temperature oxidation-reduction reaction in order to bring the front electrode into contact with the doped layer, and there is no need to diffuse Al to form a rear electric field. The warping phenomenon can be prevented.

In addition, since there is no need to contact the front electrode with the doping layer, there is less concern of short circuit due to diffusion of the electrode material, so that it is possible to form the doping layer much thinner than the conventional one, thereby greatly shortening the processing time.

In addition, due to the fact that the substrate must be transferred to a separate vessel, the high-temperature diffusion process through doping, which was difficult to proceed continuously with other processes, is replaced by a deposition process, so that most of the manufacturing process can be carried out through a clustered or inline-type manufacturing system Thus, the effect of shortening the substrate transfer time and reducing the footprint can be obtained.

First, a crystalline silicon solar cell according to an embodiment of the present invention has a sectional structure as shown in FIG.

A buffer layer 110, an N-type semiconductor layer 120 and a ZnO layer 130 are sequentially formed on the front surface of the substrate 100. The buffer layer 140 and the P layer 140 are formed on the rear surface of the substrate 100, And a front electrode 160 and a rear electrode 170 are formed on the front and back surfaces of the substrate 100, respectively.

Hereinafter, a process for fabricating a crystalline silicon solar cell according to an embodiment of the present invention will be described with reference to the flowchart of FIG. 4 and the process sectional views of FIGS. 5A to 5E.

First, as shown in FIG. 5A, a crystalline silicon substrate 100 is prepared, and damage caused during a substrate cutting process is removed by wet etching using a base or an acid solution. Hereinafter, a process of manufacturing a solar cell using the substrate 100 doped with p-type will be described for convenience. It is needless to say that an n-type substrate may be used instead of the p-type substrate 100. (ST110)

Next, as shown in FIG. 5B, an N-type semiconductor layer 120 is deposited on the substrate 100 to a thickness of 50 to 500 ANGSTROM. If necessary, the buffer layer 110 may be deposited to a thickness of 30 to 100 Å on the substrate 100, and then the N-type semiconductor layer 120 may be deposited on the buffer layer 110.

The N-type semiconductor layer 120 is preferably made of microcrystalline silicon (μc-Si: H) or amorphous silicon (a-Si: H), for example, a silicon source material (SiH 4 , Si 2 H 6 , And H 2 , by a plasma enhanced chemical vapor deposition (PECVD) method. At this time, if the N type dopant material is supplied together with the source material, the N type semiconductor layer 120 can be formed.

The buffer layer 110 is preferably an intrinsic or p-type doped microcrystalline silicon layer. In this case, since the buffer layer 110 can be deposited by PECVD using a Si source material, H 2, or the like It is possible to continuously deposit the same in the same chamber as the N-type semiconductor layer 120 thereon. (ST120)

A ZnO layer 130 is formed on the N-type semiconductor layer 120 as shown in FIG. 5C, and the thickness thereof is preferably 500 to 3000 ANGSTROM.

As shown in FIGS. 6A and 6B, since ZnO has a refractive index of 1.9 and a transmittance of 80% or more in a wavelength band of 500 nm to 1200 nm and has an optical property close to zero, ZnO can replace the conventional antireflection film have.

Also, since the ZnO layer 130 has a very rough surface roughness as shown in the surface photograph of Fig. 7, there is an advantage that the surface of the substrate 100 need not be textured separately.

ZnO is a type of transparent conductive oxide (TCO) and has a resistivity of 10 -3 to 10 -4 Ωcm and a sheet resistance of 45 Ω / sq.

If the ZnO layer 130 is electrically conductive, the charges diffused into the N-type semiconductor layer 120 can be transferred to the front electrode (not shown) through the ZnO layer 130 without the direct contact between the N-type semiconductor layer 120 and the front electrode 160. [ 160). ≪ / RTI > Therefore, the front electrode 160 may be formed only on the upper portion of the ZnO layer 130 without passing through the ZnO layer 130.

That is, it is not necessary to sinter the conductive paste at a high temperature of 800 ° C or more to induce a redox reaction as in the conventional art.

Meanwhile, the ZnO layer 130 is preferably deposited by MOCVD (Metal Organic Chemical Vapor Deposition) method, and diethyl zinc (DEZ) and H 2 O or O 3 are used as a source material. (ST130)

After forming the ZnO layer 130, the substrate 100 is turned over to deposit the P-type semiconductor layer 150 on the back surface of the substrate 100 as shown in FIG. 5D, and the thickness thereof is preferably 50 to 500 ANGSTROM Do.

The P-type semiconductor layer 150 is preferably a P-type doped amorphous SiC or amorphous silicon layer.

The amorphous SiC has an energy band gap of 2.0 eV or more and the amorphous silicon layer has an energy band gap of about 1.7 eV.

Therefore, when the P-type semiconductor layer 150 having a much larger energy band gap is formed on the rear surface of the crystalline substrate 100 having an energy band gap of 1.1 eV, an electron energy barrier is formed as shown in FIG. 8 A back surface field for preventing recombination of electrons and holes can be formed.

In addition, since it is not necessary to deposit Al on the rear surface of the substrate 100 for the formation of the rear electric field, it is possible to prevent the substrate from being warped due to Al.

On the other hand, an amorphous SiC is SiH 4 and can deposit a methane-based materials (CxHy) with PECVD beopeu to the source material, the amorphous silicon is a silicon source material (SiH 4, Si 2 H 6, and so on) using the H 2 PECVD Can be deposited by the method.

At this time, if the source material and the P-type dopant material (for example, B2H6) are simultaneously supplied into the PECVD apparatus, doping to amorphous SiC or amorphous silicon is possible in-situ.

However, when the P-type semiconductor layer 150 is formed using amorphous SiC, since the lattice constants of the crystalline substrate 100 and the amorphous SiC layer are different from each other, heterogeneous junctions are formed, Reunion of major pairs may occur.

Therefore, in order to prevent this, the buffer layer 140 may be deposited between the crystalline substrate 100 and the P-type semiconductor layer 150. The buffer layer 140 is preferably a microcrystalline silicon layer doped intrinsically or p-type, and the thickness thereof is preferably 30 to 100 Å.

The buffer layer 140 and the P-type semiconductor layer 150 can be continuously processed in the same chamber because the buffer layer 140 can be deposited by PECVD using an Si source material, H 2 , or the like. (ST140)

After forming the P-type semiconductor layer 150, the front electrode 160 and the rear electrode 170 are formed on the front and rear surfaces of the substrate, respectively, as shown in FIG. 5E.

For this purpose, a metal shadow mask may be provided on the front and rear surfaces of the substrate 100, and Al or Ag may be deposited by sputtering. Alternatively, a conductive paste containing Al or Ag may be applied in a predetermined pattern using a screen printing technique The substrate may be sintered in a high temperature furnace.

According to the present invention, since the front electrode 160 is formed on the upper surface of the conductive ZnO layer 130, it is necessary to induce the redox reaction to contact the N-type semiconductor layer 120 and the front electrode 160 As described above.

In addition, since there is no need to diffuse Al to form a rear electric field on the rear surface of the substrate 100, the sintering process can be performed at a much lower temperature than in the prior art, and warping of the substrate due to the Al layer can be prevented. (ST150)

Then, the efficiency of the manufactured solar cell is tested, classification is performed according to the result, and a plurality of completed solar cells are connected and modularized to manufacture a solar cell module. (ST160)

Although the P-type semiconductor layer 150 is formed on the rear surface of the substrate 100 after the N-type semiconductor layer 120 and the ZnO layer 130 are formed on the entire surface of the substrate 100, You can also proceed in order.

That is, the P-type semiconductor layer 150 is first formed on the rear surface of the substrate 100 and then the substrate 100 is turned over to form the N-type semiconductor layer 120 and the ZnO layer 130 on the entire surface of the substrate 100 .

Hereinafter, a manufacturing system applicable to a solar cell manufacturing process according to an embodiment of the present invention will be described.

9 illustrates a system 200 for manufacturing a clustered solar cell. The system 200 includes a load lock chamber 220, a first process chamber 230, a second process chamber (not shown) 240, and a third process chamber 250 are connected.

The transfer chamber 210 is a space for transferring the substrate 100 to the respective chambers by the transfer robot 212 therein while maintaining the vacuum state and selectively opens and closes the entrance and exit passages between the transfer chamber 210 and the chambers. A slot valve (not shown) is provided.

The first process chamber 230 is a chamber for depositing the N-type semiconductor layer 120 on the entire surface of the substrate 100 by the PECVD method and the second process chamber 240 is formed on the N-type semiconductor layer 120, Layer 130 is deposited by the MOCVD method and the third process chamber 250 is a chamber for depositing the P-type semiconductor layer 150 on the rear surface of the substrate 100.

At this time, the first process chamber 230 may deposit the buffer layer 110 of microcrystalline silicon first on the substrate 100, and then continuously deposit the N-type semiconductor layer 120 on the substrate 100.

The third process chamber 250 may deposit the buffer layer 140 of microcrystalline silicon first on the rear surface of the substrate 100 and then continuously deposit the P-type semiconductor layer 150 on the substrate 100.

According to the embodiment of the present invention, after the ZnO layer 130 is formed on the entire surface of the substrate 100, the substrate 100 must be turned over. For this purpose, the substrate 100 is moved through the load lock chamber 220 It is necessary to carry it out to the third process chamber 250 after flipping it out from the unexplored flipper.

However, the flipper communicating with the transfer chamber 210 may be directly connected to the side of the transfer chamber 210 to the extent that the volume of the system permits.

After the P-type semiconductor layer 150 is deposited in the third process chamber 250, the substrate is transferred to an apparatus for forming the front electrode 160 and the rear electrode 170. If a chamber (not shown) for electrode formation is coupled to the side of the transfer chamber 210, the P-type semiconductor layer 150 is formed and then the front electrode 160 and the rear electrode 170 are formed in the electrode- May be formed.

Meanwhile, in the solar cell manufacturing system, the substrate transfer may be performed on a substrate by the transfer robot, or may be performed by a tray (not shown) on which a plurality of substrates are mounted. That is, the process can be performed by bringing a tray having a plurality of substrates into the first process chamber 230, the second process chamber 240, the third process chamber 250, and the like.

Also, a transfer robot for transferring a substrate or a tray for transferring a substrate or a tray may be used, or a substrate or a tray may be transferred in an inline manner using a roller or a linear motor. In the latter case, these devices must also be installed inside each chamber.

10 is a diagram illustrating the configuration of the in-line type solar cell manufacturing system 300. As shown in FIG.

That is, a first process chamber 320, a second process chamber 330, a flipper 350, and a second process chamber 350 are disposed between the loading chamber 310 in which the substrate or the tray is loaded from the outside and the unloading chamber 360, A second process chamber 340, a third process chamber 350, and the like.

The functions of the first to third process chambers 320, 330, and 350 and the flipper 340 are the same as those described above in connection with the cluster solar cell fabrication system 200, and thus description thereof will be omitted.

An electrode forming chamber (not shown) may be additionally provided between the third process chamber 350 and the unloading chamber 360.

Inside each of the chambers, an inline type transfer means, for example, a roller, a linear motor, or the like, capable of moving a substrate or a tray to an adjacent chamber, should be installed.

In addition, a slot valve is provided between the chambers to open and close the access passage.

Since the inline solar cell manufacturing system 300 can omit expensive transfer robots, the cost of the entire system can be lowered. Also, since the system can be installed in a straight-type space in which a cluster type system is difficult to install, There is an advantage that it can increase.

The N-type semiconductor layer 120 and the ZnO layer 130 may be formed on the other surface of the substrate 100 after the P-type semiconductor layer 150 is first formed on one surface of the substrate 100 . Thus, the in-line type solar cell manufacturing system 300 includes a loading chamber 310, a third process chamber 350, a flipper 340, a first process chamber 320, a second process chamber 330, (360).

Although the case of manufacturing a crystalline solar cell using the p-type substrate 100 has been described above, the present invention can be applied to the case where the crystalline solar cell is manufactured using the n-type substrate Of course.

FIG. 1 is a flow chart showing a manufacturing process of a conventional crystalline silicon solar cell.

FIGS. 2A to 2F are cross-sectional views showing a manufacturing process of a conventional crystalline silicon solar cell

3 is a cross-sectional view of a crystalline silicon solar cell according to an embodiment of the present invention

4 is a view illustrating a method of manufacturing a crystalline silicon solar cell according to an embodiment of the present invention

FIGS. 5A to 5E are cross-sectional views illustrating a process for producing a crystalline silicon solar cell according to an embodiment of the present invention

6A and 6B are graphs showing transmittance and absorbance of ZnO

7 is a plan view of the ZnO layer

8 is a graph showing an energy band gap of a crystalline silicon solar cell according to an embodiment of the present invention

9 is a schematic diagram of a crystalline silicon solar cell manufacturing system according to an embodiment of the present invention

Fig. 10 is a schematic diagram of an in-line type crystalline silicon solar cell manufacturing system

Description of the Related Art [0002]

100: p-type substrate 110, 140: buffer layer

120: N-type semiconductor layer 130: ZnO layer

150: P-type semiconductor layer 160: front electrode

170: rear electrode

Claims (33)

  1. A first step of preparing a crystalline silicon substrate of a first conductivity type;
    A second step of depositing a second conductive type semiconductor layer on one surface of the substrate;
    A third step of depositing a transparent film having a concavo-convex structure on the surface of the second conductive type semiconductor layer and having conductivity;
    A fourth step of depositing a first conductivity type semiconductor layer on the other surface of the substrate;
    A fifth step of forming a first electrode on the transparent film and a second electrode on the first conductive semiconductor layer;
    A method for producing a crystalline silicon solar cell
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  5. The method according to claim 1,
    And forming a buffer layer between the first step and the second step. 2. The method of manufacturing a crystalline silicon solar cell according to claim 1,
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  7. 6. The method of claim 5,
    Wherein the buffer layer is intrinsic or p-type doped microcrystalline silicon.
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  10. The method according to claim 1,
    Wherein the transparent film is a ZnO layer.
  11. 11. The method of claim 10,
    Wherein the ZnO layer is deposited to a thickness of 500 to 3000 ANGSTROM.
  12. 11. The method of claim 10,
    Wherein the ZnO layer is deposited by MOCVD using diethyl zinc (DEZ), H 2 O or O 3 as a raw material, and a method of manufacturing the crystalline silicon solar cell
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  20. A first step of preparing a crystalline silicon substrate of a first conductivity type;
    A second step of depositing a first conductivity type semiconductor layer on one surface of the substrate;
    A third step of depositing a second conductivity type semiconductor layer on the other surface of the substrate;
    A fourth step of depositing a transparent film having a convexo-concave structure on the surface of the second conductive type semiconductor layer and having conductivity;
    And a fifth step of forming a first electrode on the transparent film and a second electrode on the first conductive type semiconductor layer,
    Wherein the third step is performed immediately after the second step.
  21. A first step of preparing a crystalline silicon substrate of a first conductivity type;
    A second step of depositing a second conductive type semiconductor layer on one surface of the substrate by supplying a first silicon source material;
    A third step of depositing a conductive transparent film on the second conductive type semiconductor layer;
    A fourth step of depositing a first conductivity type semiconductor layer on the other surface of the substrate by supplying a second silicon source material;
    A fifth step of forming a first electrode on the transparent film and a second electrode on the first conductive semiconductor layer;
    A method for producing a crystalline silicon solar cell
  22. A first step of preparing a crystalline silicon substrate of a first conductivity type;
    A second step of depositing a first conductivity type semiconductor layer on one surface of the substrate by supplying a first silicon source material;
    A third step of supplying a second silicon source material and depositing a second conductivity type semiconductor layer on the other surface of the substrate;
    A fourth step of depositing a transparent conductive layer on the second conductive semiconductor layer;
    And a fifth step of forming a first electrode on the transparent film and a second electrode on the first conductive semiconductor layer,
    Wherein the third step is performed immediately after the second step.
  23. A first step of preparing a crystalline silicon substrate of a first conductivity type;
    A second step of depositing a second conductive type semiconductor layer on one surface of the substrate;
    A third step of depositing a transparent film having a concavo-convex structure on the surface of the second conductive type semiconductor layer and having conductivity;
    A fourth step of depositing a first conductivity type semiconductor layer having a higher doping concentration than the substrate on the other surface of the substrate;
    A fifth step of forming a first electrode on the transparent film and a second electrode on the first conductive semiconductor layer;
    A method for producing a crystalline silicon solar cell
  24. 24. The method according to claim 20 or 22,
    Wherein the fourth step is performed immediately after the third step.
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KR20070075173A 2007-07-26 2007-07-26 Crystalline silicon solar cell and manufacturing method and system thereof KR101492946B1 (en)

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