JPH09232606A - Forming method of solar cell device - Google Patents
Forming method of solar cell deviceInfo
- Publication number
- JPH09232606A JPH09232606A JP8038466A JP3846696A JPH09232606A JP H09232606 A JPH09232606 A JP H09232606A JP 8038466 A JP8038466 A JP 8038466A JP 3846696 A JP3846696 A JP 3846696A JP H09232606 A JPH09232606 A JP H09232606A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- layer
- solar cell
- forming
- surface side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は太陽電池素子の形成
方法の改良に関する。TECHNICAL FIELD The present invention relates to an improvement in a method for forming a solar cell element.
【０００２】[0002]
【従来の技術及び発明が解決しようとする課題】従来の
太陽電池素子の形成方法を図２（ａ）〜（ｇ）に基づい
て説明する。まず、同図（ａ）に示すように、０．２〜
１．０ｍｍ程度の厚みを有する半導体基板１１を用意す
る。この半導体基板１１は、例えばボロン（Ｂ）等のＰ
型不純物を含有し、ＣＺ法、ＦＺ法、ＥＦＧ法、或いは
鋳造法などで形成された単結晶又は多結晶のシリコンの
インゴットをスライスして形成される。半導体基板１１
の表面側に例えばリン（Ｐ）などを熱拡散させたＮ層１
１ｂを設ける。2. Description of the Related Art A conventional method of forming a solar cell element will be described with reference to FIGS. First, as shown in FIG.
A semiconductor substrate 11 having a thickness of about 1.0 mm is prepared. The semiconductor substrate 11 is made of P such as boron (B).
It is formed by slicing a single crystal or polycrystalline silicon ingot containing a mold impurity and formed by the CZ method, the FZ method, the EFG method, the casting method, or the like. Semiconductor substrate 11
N layer 1 in which, for example, phosphorus (P) is thermally diffused on the surface side of the
1b is provided.
【０００３】次に、同図（ｂ）に示すように、Ｎ層１１
ｂのうち他の主面側のＮ層１１ｂのみを残して他の部分
を除去する。すなわち、他の主面側のみにエッチングの
レジスト膜を塗布してフッ酸（ＨＦ）と硝酸（ＮＯ3 ）
の混合液に浸漬することにより、他の主面側以外のＮ層
１１ｂを除去する。Next, as shown in FIG.
Other portions of b are removed while leaving only the N layer 11b on the other main surface side. That is, by applying an etching resist film only on the other main surface side, hydrofluoric acid (HF) and nitric acid (NO 3 ) are applied.
The N layer 11b other than the other main surface side is removed by immersing in the mixed solution of.
【０００４】次に、同図（ｃ）に示すように、半導体基
板１１の他の主面側に反射防止膜１２を形成する。この
反射防止膜１２は半導体基板１１に入射される光を効率
よく吸収するための膜であり、例えばシランとアンモニ
アとの混合ガスをプラズマ化して析出させた窒化シリコ
ン膜などで形成される。Next, as shown in FIG. 1C, an antireflection film 12 is formed on the other main surface side of the semiconductor substrate 11. The antireflection film 12 is a film for efficiently absorbing the light incident on the semiconductor substrate 11, and is formed of, for example, a silicon nitride film or the like deposited by converting a mixed gas of silane and ammonia into plasma.
【０００５】次に、同図（ｄ）に示すように、半導体基
板１１の一主面側に、アルミニウムペースト１５をスク
リーン印刷法などで塗布して加熱焼成することにより、
半導体基板１１の一主面側にアルミニウム元素を拡散さ
せて半導体基板１１の一主面側にＰ+ 領域１１ａを形成
する。Next, as shown in FIG. 1D, the aluminum paste 15 is applied to one main surface side of the semiconductor substrate 11 by a screen printing method or the like, and is baked by heating.
Aluminum element is diffused on the one main surface side of the semiconductor substrate 11 to form the P + region 11a on the one main surface side of the semiconductor substrate 11.
【０００６】次に、同図（ｅ）に示すように、半導体基
板１１の他の主面側に形成した反射防止膜１２を表面電
極の形状に応じて除去する。すなわち、表面電極のパタ
ーンと逆パターンを形づくるように反射防止膜１２を除
去する。Next, as shown in FIG. 1E, the antireflection film 12 formed on the other main surface side of the semiconductor substrate 11 is removed according to the shape of the surface electrode. That is, the antireflection film 12 is removed so as to form a pattern opposite to the pattern of the surface electrode.
【０００７】次に、同図（ｆ）に示すように、半導体基
板１１の他の主面側の反射防止膜１２の除去部分に表面
電極１３及び裏面電極１４を形成する。表面電極１３及
び裏面電極１４は、銀粉末を主成分とするペーストを半
導体基板１１の表裏面に厚膜手法で塗布して加熱焼成す
ることにより焼き付けて形成する。Next, as shown in FIG. 1F, a front surface electrode 13 and a back surface electrode 14 are formed on the removed portion of the antireflection film 12 on the other main surface side of the semiconductor substrate 11. The front surface electrode 13 and the back surface electrode 14 are formed by applying a paste containing silver powder as a main component on the front and back surfaces of the semiconductor substrate 11 by a thick film method and baking by heating and baking.
【０００８】この表面電極１３および裏面電極１４上に
は、必要に応じて半田層（不図示）などが形成される。
なお、表面電極１３および裏面電極１４は、メッキ法や
真空蒸着法を用いて形成してもよい。A solder layer (not shown) or the like is formed on the front surface electrode 13 and the rear surface electrode 14 if necessary.
The front surface electrode 13 and the back surface electrode 14 may be formed by using a plating method or a vacuum evaporation method.
【０００９】ところが、この従来の太陽電池素子の形成
方法では、図２（ｄ）に示す工程で、半導体基板１１の
裏面側にＰ+ 層１１ａを形成する場合、半導体基板１１
の裏面側全面にアルミニウムペースト１５を塗布して加
熱焼成することから、半導体基板１１とアルミニウム１
４の熱膨張係数の相違に起因して、半導体基板１１にソ
リを生じ、製造歩留り低下の原因になるという問題があ
った。However, in this conventional method for forming a solar cell element, when the P + layer 11a is formed on the back surface side of the semiconductor substrate 11 in the step shown in FIG.
Since the aluminum paste 15 is applied to the entire back surface of the substrate and heated and baked, the semiconductor substrate 11 and the aluminum 1
There is a problem in that the semiconductor substrate 11 is warped due to the difference in the thermal expansion coefficient of No. 4, which causes a reduction in manufacturing yield.
【００１０】また、半導体基板１１にソリなどを生じさ
せない太陽電池素子の形成方法として、ＢＢｒ3 などを
用いた熱拡散方法によってＰ+ 層１１ａを形成すること
も考えられる（例えば"HIGH-EFFICIENCY SOLAR CELLS F
ROM FZ, CZ, AND MC SILICONMATERIAL", 0-7 803-1220-
1/93, 1993, IEEE, P271-P276）。この太陽電池素子の
形成方法では、まず図３（ａ）に示すように、半導体基
板１１を１０００℃程度の酸化雰囲気中で加熱して８０
ｎｍ程度の厚みを有する酸化膜１６を形成する。次に、
同図（ｂ）に示すように、酸化膜１６のうち、半導体基
板１１の他の主面側の酸化膜１６を除去し、この酸化膜
１６をマスクとしてＢＢｒ3 などを用いてボロン（Ｂ）
を熱拡散させて、Ｐ+ 層１１ａを形成する。次に、同図
（ｃ）に示すように、半導体基板１１の表面部に再度酸
化シリコン膜１６を形成して一主面側の酸化シリコン膜
を除去し、この半導体基板１１の一主面側に酸化膜１６
をマスクとしてＰＯＣｌ3 などを用いてリン（Ｐ）を熱
拡散する。なお、反射防止膜、表面電極及び裏面電極の
形成方法は、図２（ｃ）（ｅ）（ｆ）に示す形成工程と
同一である。Further, as a method of forming a solar cell element which does not cause warping or the like on the semiconductor substrate 11, it is conceivable to form the P + layer 11a by a thermal diffusion method using BBr 3 or the like (for example, "HIGH-EFFICIENCY SOLAR"). CELLS F
ROM FZ, CZ, AND MC SILICONMATERIAL ", 0-7 803-1220-
1/93, 1993, IEEE, P271-P276). In this method of forming a solar cell element, first, as shown in FIG. 3A, the semiconductor substrate 11 is heated in an oxidizing atmosphere at about 1000 ° C. and heated to 80 ° C.
An oxide film 16 having a thickness of about nm is formed. next,
As shown in FIG. 3B, the oxide film 16 on the other main surface side of the semiconductor substrate 11 is removed from the oxide film 16, and boron (B) is used by using BBr 3 or the like with the oxide film 16 as a mask.
Is thermally diffused to form the P + layer 11a. Next, as shown in FIG. 3C, the silicon oxide film 16 is formed again on the surface of the semiconductor substrate 11 to remove the silicon oxide film on the one main surface side, and the one main surface side of the semiconductor substrate 11 is removed. Oxide film 16
The phosphorus (P) is thermally diffused by using POCl 3 or the like with the mask used as a mask. The method for forming the antireflection film, the front surface electrode, and the back surface electrode is the same as the forming process shown in FIGS. 2C, 2E, and 2F.
【００１１】ところが、このような太陽電池素子の形成
方法では、２回の酸化膜形成工程と２回のフォトリソ工
程があり、形成工程が煩雑になると共に、図３（ｃ）の
工程では、ボロンの拡散層１１ａの上に酸化膜１６をつ
けるため、半導体基板１１中に拡散したボロンが酸化膜
１６中に取り込まれ、Ｐ+ 層のボロンの拡散濃度の制御
が困難であるという問題がある。However, in such a method for forming a solar cell element, there are two oxide film forming steps and two photolithography steps, which complicates the forming step, and in the step of FIG. 3C, boron is used. Since the oxide film 16 is formed on the diffusion layer 11a, the boron diffused in the semiconductor substrate 11 is taken into the oxide film 16 and it is difficult to control the diffusion concentration of boron in the P + layer.
【００１２】本発明は、このような従来技術の問題点に
鑑みて発明されたものであり、太陽電池素子の製造工程
において、半導体基板にソリが発生して製造歩留りが低
下することを解消すると共に、太陽電池素子の製造工程
の煩雑化を解消することを目的とする。The present invention has been invented in view of the above problems of the prior art, and solves the problem that the semiconductor substrate is warped and the manufacturing yield is lowered in the manufacturing process of the solar cell element. At the same time, it is an object to eliminate the complexity of the manufacturing process of the solar cell element.
【００１３】[0013]
【課題を解決するための手段】上記目的を達成するため
に、本発明に係る太陽電池素子の形成方法では、Ｐ型不
純物を含有する半導体基板の一主面側にＰ+ 層を形成す
ると共に他の主面側にＮ層を形成して、この半導体基板
の両主面に電極を形成する太陽電池素子の形成方法にお
いて、前記半導体基板の表面部にボロンシリケートガラ
ス層を形成しながらＰ+ 層を形成し、この半導体基板表
面部のボロンシリケートガラス層とＰ+層を前記半導体
基板の一主面側を除いて除去し、この半導体基板に前記
ボロンシリケートガラス層をマスクとしてリンを拡散さ
せ、この半導体基板側面部のリンが拡散した領域を除去
して、この半導体基板の他の主面側に前記Ｎ層を形成す
る。In order to achieve the above object, in the method for forming a solar cell element according to the present invention, a P + layer is formed on one main surface side of a semiconductor substrate containing a P-type impurity. In a method of forming a solar cell element in which an N layer is formed on the other main surface side and electrodes are formed on both main surfaces of the semiconductor substrate, P + while forming a boron silicate glass layer on the surface portion of the semiconductor substrate. A layer is formed, the boron silicate glass layer and the P + layer on the surface of the semiconductor substrate are removed except for the one main surface side of the semiconductor substrate, and phosphorus is diffused in the semiconductor substrate using the boron silicate glass layer as a mask. Then, the phosphorus-diffused region on the side surface of the semiconductor substrate is removed, and the N layer is formed on the other main surface side of the semiconductor substrate.
【００１４】[0014]
【発明の実施の形態】以下、本発明の実施形態を添付図
面に基づき詳細に説明する。図１（ａ）〜（ｇ）は本発
明に係る太陽電池素子の形成方法の一実施形態を示す図
であり、１は半導体基板、１ａはＰ+ 層、１ｂはＮ層、
２は反射防止膜、３は表面電極、４は裏面電極である。Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. 1A to 1G are views showing an embodiment of a method for forming a solar cell element according to the present invention, in which 1 is a semiconductor substrate, 1a is a P + layer, 1b is an N layer,
Reference numeral 2 is an antireflection film, 3 is a front surface electrode, and 4 is a back surface electrode.
【００１５】まず、同図（ａ）に示すように、０．２〜
１ｍｍ程度の厚みを有する半導体基板１を用意する。こ
の半導体基板１は、ＣＺ法、ＦＺ法、ＥＦＧ法、あるい
は鋳造法などで形成された単結晶又は多結晶のシリコン
インゴットなどをスライスして形成され、例えばボロン
（Ｂ）などのＰ型不純物を１×１０16〜１×１０18ｃｍ
-3程度含有する。ＢＢｒ3 を窒素ガスや酸素ガスなどで
バブリングしながら、半導体基板１が搬入された石英チ
ューブに導入して、半導体基板１の表面部に、ボロンを
熱拡散し、Ｐ+ 層１ａを形成する。この場合、バブリン
グガスまたはキャリアガスとして用いられる酸素がシリ
コンと反応して半導体基板１の表面に、ボロンシリケー
トガラス層５が形成される。このＰ+ 層１ａはボロンを
１×１０19〜１×１０22ｃｍ-3程度含有するように、
０．５μｍ〜５μｍ程度の深さに形成される。このよう
に、半導体基板１の表面部近傍にＢＢｒ3 を熱拡散し
て、Ｐ+ 層１ａを形成すると、従来のようにアルミニウ
ムペーストを用いることなく、Ｐ+ 層１ａを形成するこ
とができる。もって、本発明の太陽電池の形成方法で
は、Ｐ+ 層１ａの形成工程で半導体基板１にソリなどを
生じることがない。First, as shown in FIG.
A semiconductor substrate 1 having a thickness of about 1 mm is prepared. The semiconductor substrate 1 is formed by slicing a single crystal or polycrystal silicon ingot formed by a CZ method, an FZ method, an EFG method, a casting method, or the like, for example, a P-type impurity such as boron (B). 1 x 10 16 to 1 x 10 18 cm
Contains about -3 . While bubbling BBr 3 with nitrogen gas or oxygen gas, the semiconductor substrate 1 is introduced into a quartz tube into which the semiconductor substrate 1 has been introduced, and boron is thermally diffused on the surface portion of the semiconductor substrate 1 to form a P + layer 1a. In this case, oxygen used as a bubbling gas or a carrier gas reacts with silicon to form the boron silicate glass layer 5 on the surface of the semiconductor substrate 1. The P + layer 1a contains boron in an amount of about 1 × 10 19 to 1 × 10 22 cm −3 .
It is formed to a depth of about 0.5 μm to 5 μm. Thus, the BBr 3 in the surface vicinity of the semiconductor substrate 1 is thermally diffused to form a P + layer 1a, without using a conventional aluminum paste as it is possible to form the P + layer 1a. Therefore, according to the method for forming a solar cell of the present invention, warpage or the like does not occur in the semiconductor substrate 1 in the step of forming the P + layer 1a.
【００１６】次に、同図（ｂ）に示すように、一主面側
のＰ+ 層１ａとボロンシリケートガラス５のみを残して
他の部分を除去する。すなわち、一主面側のみにエッチ
ングのレジスト膜を塗布してフッ酸（ＨＦ）と硝酸（Ｎ
Ｏ3 ）の混合液に浸漬し、一主面側のＰ+ 層１ａとボロ
ンシリケートガラス層５以外のＰ+ 層１ａとボロンリケ
ートガラス層５を除去する。その後、レジスト膜を除去
して半導体基板１を純水で洗浄する。Next, as shown in FIG. 2B, only the P + layer 1a on the one main surface side and the boron silicate glass 5 are left and the other portions are removed. That is, a resist film for etching is applied only on one main surface side to form hydrofluoric acid (HF) and nitric acid (N
It is immersed in a mixed solution of O 3 ) to remove the P + layer 1a and the boron silicate glass layer 5 other than the P + layer 1a and the boron silicate glass layer 5 on the one main surface side. Then, the resist film is removed and the semiconductor substrate 1 is washed with pure water.
【００１７】次に、同図（ｃ）に示すように、半導体基
板１の表面にＮ層１ｂを設ける。このＮ層１ｂは、リン
を含むを気体例えばオキシ塩化リン（ＰＯＣｌ3 ）など
のバブリングガスを流しながら、半導体基板１を８５０
〜９００℃の温度に加熱してリンを半導体基板１に拡散
させることによって形成する。このＮ層１ｂを形成する
ことによって、半導体基板１内にＰＮ接合部が形成され
る。このＮ層１ｂはリンなどを１×１０16〜１×１０18
ｃｍ-3程度含有するように形成され、２０００Å〜１μ
ｍ程度の深さに形成される。このＮ層１ｂは、半導体基
板１の一主面側のボロンシリケートガラス層５を露出さ
せたままで形成する。この場合、リンはシリコンに対す
る拡散係数よりボロンシリケートガラスに対する拡散係
数が小さいため、ボロンシリケートガラス層５をリン拡
散のマスク層として半導体基板１にリンを拡散させるこ
とができる。このように、ボロンシリケトガラス層５を
残したままＮ層１ｂを形成すると、従来のようにマスク
としての酸化膜などを新たに形成する必要がなく、太陽
電池素子の形成工程を簡略化できる。Next, as shown in FIG. 1C, an N layer 1b is provided on the surface of the semiconductor substrate 1. The N layer 1b is formed on the semiconductor substrate 1 by 850 while flowing a gas containing phosphorus, for example, a bubbling gas such as phosphorus oxychloride (POCl 3 ).
It is formed by heating to a temperature of up to 900 ° C. and diffusing phosphorus into the semiconductor substrate 1. By forming this N layer 1b, a PN junction is formed in the semiconductor substrate 1. The N layer 1b contains phosphorus or the like from 1 × 10 16 to 1 × 10 18.
It is formed to contain about cm -3 , 2000Å ~ 1μ
It is formed to a depth of about m. The N layer 1b is formed while leaving the boron silicate glass layer 5 on the one main surface side of the semiconductor substrate 1 exposed. In this case, since phosphorus has a smaller diffusion coefficient for boron silicate glass than that for silicon, phosphorus can be diffused into the semiconductor substrate 1 using the boron silicate glass layer 5 as a phosphorus diffusion mask layer. Thus, when the N layer 1b is formed while leaving the boron silicate glass layer 5, there is no need to newly form an oxide film or the like as a mask as in the conventional case, and the process of forming a solar cell element can be simplified. .
【００１８】次に、同図（ｄ）に示すように、半導体基
板１の周辺側部のＮ層１ｂをエッチング除去する。すな
わち、半導体基板１の両主面側にエチングのレジスト膜
を塗布し、フッ酸（ＨＦ）と硝酸（ＮＯ3 ）の混合液に
浸漬して、半導体基板１の周辺側部のＮ層１ｂを除去す
る。半導体基板１周辺側部のＮ層１ａを除去した後にレ
ジスト膜を除去し、半導体基板１を純水で洗浄する。Next, as shown in FIG. 3D, the N layer 1b on the peripheral side of the semiconductor substrate 1 is removed by etching. That is, an etching resist film is applied to both main surface sides of the semiconductor substrate 1 and immersed in a mixed solution of hydrofluoric acid (HF) and nitric acid (NO 3 ) to remove the N layer 1b on the peripheral side portion of the semiconductor substrate 1. Remove. After removing the N layer 1a on the peripheral side of the semiconductor substrate 1, the resist film is removed and the semiconductor substrate 1 is washed with pure water.
【００１９】次に、同図（ｅ）に示すように、半導体基
板１の主面側に反射防止膜２を形成する。この反射防止
膜２は、半導体基板１に入射される光を効率よく吸収す
るための膜であり、その厚みが５００〜１０００Å、屈
折率が１．９０〜２．３０程度になるように形成され
る。例えばシラン（ＳｉＨ4 ）とアンモニア（ＮＨ3 ）
との混合ガスをプラズマ化して析出させた窒化シリコン
膜等で形成される。具体的には、プラズマＣＶＤ装置内
で半導体基板１を１５０〜４００℃にまで加熱し、シラ
ンとアンモニアとキャリアガスとしての水素（Ｈ2 ）の
ガス圧を０．２〜２．０Ｔｏｒｒに維持しながら、高周
波電圧を印加する。この反射防止膜２の材料としては窒
化シリコン膜の他に、一酸化シリコン（ＳｉＯ）、二酸
化シリコン（ＳｉＯ2 ）、二酸化チタン（ＴｉＯ2 ）な
どを用いてもよい。Next, as shown in FIG. 1E, an antireflection film 2 is formed on the main surface side of the semiconductor substrate 1. The antireflection film 2 is a film for efficiently absorbing the light incident on the semiconductor substrate 1, and is formed so as to have a thickness of 500 to 1000Å and a refractive index of about 1.90 to 2.30. It For example, silane (SiH 4 ) and ammonia (NH 3 )
It is formed of a silicon nitride film or the like deposited by converting a mixed gas of the plasma into plasma. Specifically, the semiconductor substrate 1 is heated to 150 to 400 ° C. in the plasma CVD apparatus, and the gas pressure of silane, ammonia, and hydrogen (H 2 ) as a carrier gas is maintained at 0.2 to 2.0 Torr. Meanwhile, a high frequency voltage is applied. As the material of the antireflection film 2, other than the silicon nitride film, silicon monoxide (SiO), silicon dioxide (SiO 2 ), titanium dioxide (TiO 2 ) or the like may be used.
【００２０】次に、同図（ｆ）に示すように、半導体基
板１の表面側に形成した反射防止膜２を表面電極５の形
状に応じて除去する。すなわち、表面電極５のパターン
と逆パターンで反射防止膜２を除去する。Next, as shown in FIG. 1F, the antireflection film 2 formed on the surface side of the semiconductor substrate 1 is removed according to the shape of the surface electrode 5. That is, the antireflection film 2 is removed in a pattern opposite to the pattern of the surface electrode 5.
【００２１】次に、同図（ｇ）に示すように、半導体基
板１の一主面側の反射防止膜２の除去部分に表面電極３
を形成すると共に、半導体基板１の裏面側に裏面電極４
を形成する。表面電極３および裏面電極４は、銀粉末を
主成分とするペーストを半導体基板１の表裏面に厚膜手
法などで印刷塗布して焼き付けることにより形成する。Next, as shown in FIG. 1G, the surface electrode 3 is formed on the removed portion of the antireflection film 2 on the one main surface side of the semiconductor substrate 1.
And the backside electrode 4 is formed on the backside of the semiconductor substrate 1.
To form The front surface electrode 3 and the back surface electrode 4 are formed by printing and applying a paste containing silver powder as a main component to the front and back surfaces of the semiconductor substrate 1 by a thick film method or the like and baking it.
【００２２】この表面電極３および裏面電極４上には、
必要に応じて半田層（不図示）などが形成される。な
お、表面電極３および裏面電極４は、メッキ法や真空蒸
着法を用いて形成してもよい。On the front surface electrode 3 and the back surface electrode 4,
A solder layer (not shown) or the like is formed as needed. The front surface electrode 3 and the back surface electrode 4 may be formed by using a plating method or a vacuum evaporation method.
【００２３】[0023]
【発明の効果】以上のように、本発明に係る太陽電池素
子の形成方法によれば、半導体基板の表面部にボロンシ
リケートガラス層を形成しながらＰ+ 層を形成し、この
半導体基板表面部のボロンシリケートガラス層とＰ+ 層
を前記半導体基板の一主面側を除いて除去し、この半導
体基板に前記ボロンシリケートガラス層をマスクとして
リンを拡散させ、この半導体基板側面部のリンが拡散し
た領域を除去して、この半導体基板の他の主面側に前記
Ｎ層を形成することから、従来のような酸化膜形成工程
や酸化膜除去工程がなく、太陽電池素子の形成工程を簡
素化できる。As described above, according to the method for forming a solar cell element of the present invention, the P + layer is formed while forming the boron silicate glass layer on the surface portion of the semiconductor substrate, and the surface portion of the semiconductor substrate is formed. Of the boron silicate glass layer and the P + layer except the one main surface side of the semiconductor substrate, phosphorus is diffused in the semiconductor substrate using the boron silicate glass layer as a mask, and the phosphorus on the side surface of the semiconductor substrate is diffused. Since the N layer is formed on the other main surface side of the semiconductor substrate by removing the formed region, there is no oxide film forming step or oxide film removing step as in the past, and the solar cell element forming step is simplified. Can be converted.
【００２４】また、半導体基板にＰ+ 層を形成する際に
従来のようなアルミニウムペーストを使用しないことか
ら、半導体基板にソリなどを発生することがなく、製造
歩留りの低下を防止できる。Further, since the conventional aluminum paste is not used when forming the P + layer on the semiconductor substrate, warping or the like does not occur on the semiconductor substrate, and a decrease in manufacturing yield can be prevented.
【図１】本発明に係る太陽電池素子の形成方法の一実施
形態を示す図である。FIG. 1 is a diagram showing an embodiment of a method for forming a solar cell element according to the present invention.
【図２】従来の太陽電池素子の形成方法を示す図であ
る。FIG. 2 is a diagram showing a conventional method for forming a solar cell element.
【図３】従来の他の太陽電池素子の形成方法を示す図で
ある。FIG. 3 is a diagram showing another conventional method for forming a solar cell element.
１・・・半導体基板、１ａ・・・Ｐ+ 層、１ｂ・・・Ｎ
層、２・・・反射防止膜、３・・・表面電極、４・・・
裏面電極、５・・・ボロンシリケートガラス層1 ... Semiconductor substrate, 1a ... P + layer, 1b ... N
Layer, 2 ... Antireflection film, 3 ... Surface electrode, 4 ...
Back electrode, 5 ... Boron silicate glass layer
Claims (1)
面側にＰ+ 層を形成すると共に他の主面側にＮ層を形成
して、この半導体基板の両主面に電極を形成する太陽電
池素子の形成方法において、前記半導体基板の表面部に
ボロンシリケートガラス層を形成しながらＰ+ 層を形成
し、この半導体基板表面部のボロンシリケートガラス層
とＰ+ 層を前記半導体基板の一主面側を除いて除去し、
この半導体基板に前記ボロンシリケートガラス層をマス
クとしてリンを拡散させ、この半導体基板側面部のリン
が拡散した領域を除去して、この半導体基板の他の主面
側に前記Ｎ層を形成することを特徴とする太陽電池素子
の形成方法。1. A P + layer is formed on one main surface side of a semiconductor substrate containing a P-type impurity, and an N layer is formed on the other main surface side, and electrodes are formed on both main surfaces of this semiconductor substrate. In the method for forming a solar cell element, the P + layer is formed while forming a boron silicate glass layer on the surface portion of the semiconductor substrate, and the boron silicate glass layer and the P + layer on the surface portion of the semiconductor substrate are formed on the semiconductor substrate. Except for one main surface side,
Phosphorus is diffused on the semiconductor substrate using the boron silicate glass layer as a mask, and a region of the side surface of the semiconductor substrate on which phosphorus is diffused is removed to form the N layer on the other main surface side of the semiconductor substrate. A method for forming a solar cell element, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03846696A JP3170445B2 (en) | 1996-02-26 | 1996-02-26 | Method of forming solar cell element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03846696A JP3170445B2 (en) | 1996-02-26 | 1996-02-26 | Method of forming solar cell element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09232606A true JPH09232606A (en) | 1997-09-05 |
| JP3170445B2 JP3170445B2 (en) | 2001-05-28 |
Family
ID=12526032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03846696A Expired - Lifetime JP3170445B2 (en) | 1996-02-26 | 1996-02-26 | Method of forming solar cell element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3170445B2 (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010067972A (en) * | 2008-09-09 | 2010-03-25 | Palo Alto Research Center Inc | Interdigitated back contact solar cell and method of manufacturing the same |
| JP2011029553A (en) * | 2009-07-29 | 2011-02-10 | Sharp Corp | Method of manufacturing semiconductor device |
| JP2011035252A (en) * | 2009-08-04 | 2011-02-17 | Sharp Corp | Method of manufacturing semiconductor device |
| KR101352034B1 (en) * | 2007-06-29 | 2014-01-17 | 주성엔지니어링(주) | Crystalline silicon solar cell and manufacturing method and system thereof |
| WO2014123060A1 (en) | 2013-02-06 | 2014-08-14 | ＰＶＧ Ｓｏｌｕｔｉｏｎｓ株式会社 | Method for forming boron diffusion layer and method for manufacturing solar battery cell |
| KR101492946B1 (en) * | 2007-07-26 | 2015-02-13 | 주성엔지니어링(주) | Crystalline silicon solar cell and manufacturing method and system thereof |
| US9150966B2 (en) | 2008-11-14 | 2015-10-06 | Palo Alto Research Center Incorporated | Solar cell metallization using inline electroless plating |
| WO2018043523A1 (en) * | 2016-08-31 | 2018-03-08 | パナソニックプロダクションエンジニアリング株式会社 | Method for forming boron diffusion layer and phosphorus diffusion layer |
| TWI649894B (en) * | 2016-10-25 | 2019-02-01 | 日商信越化學工業股份有限公司 | Solar cell with high photoelectric conversion efficiency and manufacturing method of solar cell with high photoelectric conversion efficiency |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6437193B1 (en) | 1997-07-15 | 2002-08-20 | E. I. Du Pont De Nemours And Company | Vapor phase oxidation of propylene to acrolein |
| CA2271397A1 (en) | 1998-05-21 | 1999-11-21 | Rohm And Haas Company | A process for preparing a catalyst |
| US6281384B1 (en) | 1998-06-26 | 2001-08-28 | E. I. Du Pont Nemours And Company | Vapor phase catalytic oxidation of propylene to acrylic acid |
| US6310240B1 (en) | 1998-12-23 | 2001-10-30 | E. I. Du Pont De Nemours And Company | Vapor phase oxidation of acrolein to acrylic acid |
| US6337424B1 (en) | 2000-04-28 | 2002-01-08 | Saudi Basic Industries Corporation | Catalysts oxidation of lower olefins to unsaturated aldehydes, methods of making and using the same |
| US8470289B2 (en) | 2007-07-16 | 2013-06-25 | Exxonmobil Chemical Patents Inc. | Manganese oxides and their use in the oxidation of alkanes |
-
1996
- 1996-02-26 JP JP03846696A patent/JP3170445B2/en not_active Expired - Lifetime
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101352034B1 (en) * | 2007-06-29 | 2014-01-17 | 주성엔지니어링(주) | Crystalline silicon solar cell and manufacturing method and system thereof |
| KR101492946B1 (en) * | 2007-07-26 | 2015-02-13 | 주성엔지니어링(주) | Crystalline silicon solar cell and manufacturing method and system thereof |
| US9054237B2 (en) | 2008-09-09 | 2015-06-09 | Palo Alto Research Center Incorporated | Interdigitated back contact silicon solar cells fabrication using diffusion barriers |
| JP2010067972A (en) * | 2008-09-09 | 2010-03-25 | Palo Alto Research Center Inc | Interdigitated back contact solar cell and method of manufacturing the same |
| US9150966B2 (en) | 2008-11-14 | 2015-10-06 | Palo Alto Research Center Incorporated | Solar cell metallization using inline electroless plating |
| JP2011029553A (en) * | 2009-07-29 | 2011-02-10 | Sharp Corp | Method of manufacturing semiconductor device |
| JP2011035252A (en) * | 2009-08-04 | 2011-02-17 | Sharp Corp | Method of manufacturing semiconductor device |
| WO2014123060A1 (en) | 2013-02-06 | 2014-08-14 | ＰＶＧ Ｓｏｌｕｔｉｏｎｓ株式会社 | Method for forming boron diffusion layer and method for manufacturing solar battery cell |
| JPWO2014123060A1 (en) * | 2013-02-06 | 2017-02-02 | ＰＶＧ Ｓｏｌｕｔｉｏｎｓ株式会社 | Method for manufacturing solar battery cell |
| US9837575B2 (en) | 2013-02-06 | 2017-12-05 | Panasonic Production Engineering Co., Ltd. | Method of manufacturing solar battery cell |
| WO2018043523A1 (en) * | 2016-08-31 | 2018-03-08 | パナソニックプロダクションエンジニアリング株式会社 | Method for forming boron diffusion layer and phosphorus diffusion layer |
| JPWO2018043523A1 (en) * | 2016-08-31 | 2019-06-24 | パナソニックプロダクションエンジニアリング株式会社 | Method of forming boron diffusion layer and phosphorus diffusion layer |
| TWI649894B (en) * | 2016-10-25 | 2019-02-01 | 日商信越化學工業股份有限公司 | Solar cell with high photoelectric conversion efficiency and manufacturing method of solar cell with high photoelectric conversion efficiency |
| TWI695518B (en) * | 2016-10-25 | 2020-06-01 | 日商信越化學工業股份有限公司 | Solar cell with high photoelectric conversion efficiency and method for manufacturing solar cell with high photoelectric conversion efficiency |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3170445B2 (en) | 2001-05-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3170445B2 (en) | Method of forming solar cell element | |
| US4152824A (en) | Manufacture of solar cells | |
| JP3459947B2 (en) | Solar cell manufacturing method | |
| JP5940519B2 (en) | Method for producing n + pp + type or p + nn + type structure on silicon wafer | |
| US20120048369A1 (en) | Solar cell element, segmented solar cell element, solar cell module, and electronic appliance | |
| JP3578539B2 (en) | Solar cell manufacturing method and solar cell structure | |
| HUT63711A (en) | Method for making semiconductor device, as well as solar element made from said semiconductor device | |
| JPH07226528A (en) | Manufacture of thin film solar cell and thin film solar cell | |
| JP2000183379A (en) | Method for manufacturing solar cell | |
| US3746587A (en) | Method of making semiconductor diodes | |
| JP2006332510A (en) | Manufacturing method for solar cell element | |
| JP2001127317A (en) | Method of manufacturing solar cell | |
| JP3238003B2 (en) | Method of manufacturing solar cell element | |
| JP2008244282A (en) | Photoelectric conversion element and manufacturing method therefor | |
| JP2003101055A (en) | Method for manufacturing solar battery | |
| JP2692964B2 (en) | Solar cell | |
| JP2002261305A (en) | Thin-film polycrystalline silicon solar cell and manufacturing method therefor | |
| JP3368145B2 (en) | Method of manufacturing solar cell | |
| JP4467164B2 (en) | Method for forming solar cell | |
| JPH08274356A (en) | Solar cell element | |
| JP3786809B2 (en) | Solar cell manufacturing method | |
| JP2006024757A (en) | Solar cell and method of manufacturing the same | |
| JPH1070296A (en) | Solar cell and fabrication thereof | |
| JPH0945945A (en) | Solar cell element and fabrication thereof | |
| JPH07153980A (en) | Manufacture of solar battery |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090316 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090316 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100316 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110316 Year of fee payment: 10 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110316 Year of fee payment: 10 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110316 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120316 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120316 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130316 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140316 Year of fee payment: 13 |
|
| EXPY | Cancellation because of completion of term |