KR101427875B1

KR101427875B1 - Light emitting device having vertical topology and method for manufacturing the same

Info

Publication number: KR101427875B1
Application number: KR1020070124414A
Authority: KR
Inventors: 최정현; 최재완; 김두현; 김재욱; 강정모
Original assignee: 엘지전자 주식회사; 엘지이노텍 주식회사
Priority date: 2007-12-03
Filing date: 2007-12-03
Publication date: 2014-08-08
Also published as: KR20090057713A

Abstract

The present invention relates to a vertical type light emitting device and a method of manufacturing the same, and more particularly, to a vertical type light emitting device capable of improving the luminous efficiency and reliability of a light emitting device and a method of manufacturing the same. According to another aspect of the present invention, there is provided a method of manufacturing a vertical type light emitting device, comprising: sequentially forming a first conductive semiconductor layer, a light emitting layer, and a second conductive semiconductor layer on a substrate; Forming a stepped shape in which a width is narrower at least a part of the upper side of the second conductive semiconductor layer; Forming a first electrode on the second conductive semiconductor layer so as to cover the step shape; Forming a support layer on the first electrode; Separating the substrate; And forming a second electrode on the first conductive semiconductor layer by exposing the substrate.

Light emitting device, vertical type, semiconductor layer, electrode, LED.

Description

[0001] The present invention relates to a vertical light emitting device and a method of manufacturing the same,

The present invention relates to a vertical type light emitting device and a method of manufacturing the same, and more particularly, to a vertical type light emitting device capable of improving the luminous efficiency and reliability of a light emitting device and a method of manufacturing the same.

Light emitting diodes (LEDs) are well-known semiconductor light emitting devices that convert current into light. In 1962, red LEDs using GaAsP compound semiconductors were commercialized. GaP: N series green LEDs and information communication devices As a light source for a display image of an electronic device.

The wavelength of the light emitted by these LEDs depends on the semiconductor material used to fabricate the LED. This is because the wavelength of the emitted light depends on the band gap of the semiconductor material, which represents the energy difference between the valence band electrons and the conduction band electrons.

Gallium nitride semiconductors (GaN) have high thermal stability and wide bandgap (0.8 to 6.2 eV), and have attracted much attention in the field of high output electronic component development including LEDs.

One of the reasons for this is that GaN can be combined with other elements (indium (In), aluminum (Al), etc.) to produce semiconductor layers emitting green, blue and white light.

Since the emission wavelength can be controlled in this manner, it can be tailored to the characteristics of the material according to the specific device characteristics. For example, GaN can be used to create a white LED that can replace the blue LEDs and incandescent lamps that are beneficial for optical recording.

Due to the advantages of such GaN-based materials, the GaN-based LED market is rapidly growing. Therefore, GaN-based optoelectronic device technology has rapidly developed since its commercial introduction in 1994.

Recently, the vertical type LED has the shape of the electrode located on the upper side and the lower side of the semiconductor layer, and the flow of current occurs in the vertical direction. Therefore, the current flow in the device is good and the operating voltage can be lowered. And the uniformity of the current is excellent.

However, there is a need to effectively relax the stress acting on the semiconductor thin film in the process of removing the substrate.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and it is an object of the present invention to improve the reliability of the device by improving the characteristics of the device and optimizing the passivation layer of the light emitting device by controlling the leakage current, And lowering the operating voltage, and a method of manufacturing the same.

According to a first aspect of the present invention, there is provided a method of manufacturing a vertical type light emitting device, comprising: sequentially forming a first conductive semiconductor layer, a light emitting layer, and a second conductive semiconductor layer on a substrate; Forming a stepped shape in which a width is narrower at least a part of the upper side of the second conductive semiconductor layer; Forming a first electrode on the second conductive semiconductor layer so as to cover the step shape; Forming a support layer on the first electrode; Separating the substrate; And forming a second electrode on the first conductive semiconductor layer by exposing the substrate.

According to a second aspect of the present invention, A first conductive semiconductor layer located on the supporting layer, the first conductive semiconductor layer having a stepped shape that narrows at least in part; A light emitting layer disposed on the first conductive semiconductor layer; A second conductive semiconductor layer disposed on the light emitting layer; A first electrode formed between the supporting layer and the first conductive semiconductor layer and having a structure covering a stepped shape of the first conductive semiconductor layer; A passivation layer located on at least a part of the surfaces of the first conductive semiconductor layer, the light emitting layer, and the second conductive semiconductor layer; And a second electrode located on the second conductive semiconductor layer.

The present invention has the following effects.

First, by improving the interface between the semiconductor layer and the support layer, the stress generated when the substrate is removed can be effectively controlled and the contact area between the semiconductor layer and the support layer can be increased, The characteristics of the current spreading can be improved.

In addition, due to such an improvement in the electrode interface property, the operating voltage of the light emitting device can be reduced, the thermal characteristics can be improved, and the reliability of the light emitting device can be improved overall.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. Rather, the intention is not to limit the invention to the particular forms disclosed, but rather, the invention includes all modifications, equivalents and substitutions that are consistent with the spirit of the invention as defined by the claims.

It will be understood that when an element such as a layer, region or substrate is referred to as being present on another element "on," it can be understood that it may be directly on the other element or there may be an intermediate element in between will be. It will be appreciated that if a portion of a component, such as a surface, is referred to as " inner ", it means that it is farther from the outside of the device than other portions of the element.

Further, relative terms such as " beneath " or " overlies " are used herein to refer to a layer or region relative to a substrate or reference layer, Can be used to illustrate.

It will be appreciated that these terms are intended to encompass different orientations of the device in addition to those depicted in the Figures. Finally, the term 'directly' means that there are no intervening elements in the middle. As used herein, the term " and / or " includes any and all combinations and all combinations of related items noted.

Although the terms first, second, etc. may be used to describe various elements, components, regions, layers and / or regions, such elements, components, regions, layers and / And should not be limited by these terms.

Embodiments of the present invention will be described with reference to a gallium nitride (GaN) based light emitting device formed on a non-conductive substrate such as a sapphire (Al ₂ O ₃ ) based substrate. However, the present invention is not limited to this structure.

Embodiments of the present invention can use another substrate including a conductive substrate. Thus, combinations of AlGaInP diodes on GaP substrates, GaN diodes on SiC substrates, SiC diodes on SiC substrates, SiC diodes on sapphire substrates, and / or nitride diodes on GaN, SiC, AlN, ZnO and / have. Furthermore, the present invention is not limited to the use of the active region in the diode region. Other types of active regions may also be used in accordance with some embodiments of the present invention.

&Lt; Embodiment 1 >

The structure before the step of removing the substrate for fabricating the vertical type light emitting device is shown in FIG.

That is, a semiconductor layer including an n-type semiconductor layer 2, a light emitting layer 3, and a p-type semiconductor layer 4 is sequentially formed on a substrate 1 made of a material such as sapphire, SiC, GaN, After stacking, the element isolation regions are etched.

Thereafter, the first electrode 5 is formed on the p-type semiconductor layer 4, the passivation layer 6 is formed on the exposed surface including the side surface of the semiconductor layer, Thereby forming a bonding metal layer 7 covering the layer 6. This bonding metal layer 7 can act as a reflective layer.

Then, when the supporting layer 8 is formed or adhered to the bonding metal layer 7 with a metal or a semiconductor, the state as shown in Fig. 1 is obtained.

Next, the substrate 1 is removed, and the second electrode 9 is formed on the n-type semi-conductor layer 2 in which the substrate 1 is separated and exposed. It becomes the same state.

At this time, thermal or mechanical stress occurs in the process of separating the substrate. In order to secure the stability of the device from such stress, the bonding force between the p-type semiconductor layer 4 and the support layer 8 is important, The bonding strength between the first electrode 5 and the bonding metal layer 7 is important.

2, the bonding area a between the first electrode 5 and the bonding metal layer 7, the bonding metal layer 7, and the support layer 8, which ensure the stability of the device during the process of separating the substrate, And a current flows through the coupling area a when the light emitting device is driven.

Here, the portions represented by a and b are the marked portions to visualize the contact area, not a separate layer actually present.

The bonding area a between the first electrode 5 and the bonding metal layer 7 may be an area on one plane but the thickness of the first electrode 5 is different from the thickness of the passivation layer 6, The difference in thickness between the first electrode 5 and the passivation layer 6 causes a gap between the first electrode 5 and the bonding metal layer 7 Area can be added. That is, the contact area with the bonding metal layer 7 may be added to the side surface of the first electrode 5.

The contact area between the first electrode 50 and the bonding metal layer 7 can be increased by the difference in the thickness of the first electrode 5 or the passivation layer 6, The contact and current spreading characteristics between the p-type semiconductor layer 4 and the first electrode 5, the bonding metal layer 7, and the support layer 8 can be improved during operation.

In addition, the improvement of the electrode flow characteristics can reduce the operating voltage of the light emitting device and improve the thermal characteristics.

&Lt; Embodiment 2 >

3, an n-type semiconductor layer 21, a light emitting layer 22, and a p-type semiconductor layer 23 are formed on a substrate 10 made of a material such as sapphire, SiC, GaN, The semiconductor layer 20 is formed.

In this case, on the contrary, the p-type semiconductor layer, the light emitting layer, and the n-type semiconductor layer may be laminated in this order on the substrate 10.

After the semiconductor layer 20 is formed, a part of the p-type semiconductor layer 23 located on the upper side is etched to form a stepped shape 24 as shown in FIG. That is, a portion 23a whose width is narrowed is formed on the upper part of the p-type semiconductor layer 23. Such a stepped shape 24 may contribute to increase the bonding area between the semiconductor layer 20 and the supporting layer in the application of the process of separating the substrate 10 later, Can also be increased.

Then, a passivation layer 30 is formed on at least a part of the exposed surface of the semiconductor layer 20 by the above process. At this time, the passivation layer 30 may prevent the leakage current and improve the stability of the device. As shown in the figure, the passivation layer 30 may be formed to reach the lower side of the stepped shape 24 described above.

That is, as shown in FIG. 3, the passivation layer 30 may be formed to cover the narrow portion 23a of the p-type semiconductor layer 23.

Next, the first electrode 40 is formed on the p-type semiconductor layer 23 described above. At this time, the first electrode 40 can be formed to have a structure that covers the narrowed portion 23a of the p-type semiconductor layer 23, that is, the stepped shape 24 described above. That is, the first electrode 40 may be formed on the remaining exposed portion of the p-type semiconductor layer 23 not covered with the passivation layer 30. [

The first electrode 40 may be a transparent electrode. That is, a transparent conductive oxide may be used or a thin metal layer may be used.

Then, a bonding metal layer 50 is formed on the first electrode 40. The bonding metal layer 50 may also be formed on the passivation layer 30. The bonding metal layer 50 may be formed of a metal layer for bonding or plating and may be formed of a metal having high reflectivity and may reflect light emitted from the semiconductor layer 20 to the main light emitting surface .

After the bonding metal layer 50 is formed to cover the first electrode 40 and the passivation layer 30 as described above, the supporting layer 60 is formed on the bonding metal layer 50.

The support layer 60 may be formed of a metal or a semiconductor, and may be formed on the bonding metal layer 50 by a plating method. Or may be formed on the bonding metal layer 50 by bonding. Such bonding may be applied to both the metal and the semiconductor.

In this way, in the state where the supporting layer 60 is located, a step of removing the substrate 10 is performed as shown in Fig. The removal of the substrate 10 can be performed by a laser lift off process using a laser.

Then, as shown in FIG. 5, a surface process is performed on the surface C of the semiconductor layer 20 from which the substrate is removed.

That is, when a low-temperature buffer layer (not shown) is located before forming the n-type semiconductor layer 21 on the substrate, a process of etching and removing the buffer layer can be performed, The light extracting structure may be formed on the surface of the semiconductor layer 21. [

Next, a second electrode 70 (see FIG. 6) is formed on the n-type semiconductor layer 21, and the element is separated along the individual element region D by a method such as scribing.

The vertical light emitting device fabricated by the above process is in a state as shown in FIG.

At this time, since the n-type second electrode 70 can not be subjected to the heat treatment at a high temperature during the fabrication of the vertical type light emitting device, the process of improving the interfacial characteristics can not be performed.

7, a coupling groove 25 is formed in the n-type semiconductor layer 21 and a second electrode 71 is formed on the coupling groove 25. Thus, The contact effective area between the first electrode 21 and the second electrode 70 can be maximized.

That is, the second electrode 71 is formed by applying a p-type semiconductor layer having a T-shaped cross-section to the p-type semiconductor layer, which is an important element in light efficiency determined by electron-hole pair recombination in the light- It is possible to simultaneously improve the current spreading in the region of the layer 23 and the n-type semiconductor layer 21, which is effective in lowering the device operation voltage. This is advantageous in that the heat source inside the device which is generated due to the increase in electric power is relaxed, and deterioration of the device in the operating environment can be suppressed.

8 shows the process of removing the substrate and the contact area A between the first electrode 40 and the bonding metal layer 50 which are important in the current flow of the device and the contact area A between the bonding metal layer 50 and the support layer 60 (B). Here, the portions represented by A and B are the marked portions to visualize the contact area, not a separate layer actually present.

In the fabrication of the vertical type light emitting device as described above, since the high temperature process can not be performed after the substrate is separated from the substrate, it is necessary to optimize the contact structure between the first electrode 40 and the electrode upper layer (bonding metal layer, support layer) .

The process of separating and removing a substrate in a laser lift-off process using a laser can cause physical stress to the device layer, which can deepen internal defects, that is, Peeling of the substrate can be induced, which requires high-precision process technology.

Since defects generated at this time are mainly reflected in the device characteristics after fabrication of the light emitting device chip, it may cause serious problems in reliability as well as initial characteristics.

Therefore, the contact characteristic between the support layer 60 and the semiconductor layer 20 (actually between the semiconductor layer 20 and the first electrode 40) becomes important after the substrate is separated, This is because the strength is determined.

The structure described above can reduce the junction area between the semiconductor layer 20 and the upper and lower surfaces of the first electrode 40 to a small extent and increase the junction area of the side surface to thereby more reliably withstand the stress applied during the substrate separation process , Which is connected to chip yield.

As a result, the stepped portion 24 of the p-type semiconductor layer 23 has an effect of increasing the area of the contact portion between the first electrode 40 and the bonding metal layer 50.

This can reduce not only the physical stress applied to the device layer during substrate separation but also the operating voltage of the actual light emitting device at the same time. The junction area between the p-type semiconductor layer 23 and the first electrode 40 The voltage drop due to the p-type contact acting as an interface with a high resistance can be reduced.

As shown in FIG. 8, when the cross-sectional structure of the light emitting device finally fabricated in this embodiment is compared with that of the vertical light emitting device of the first embodiment, the passivation layer 30 deposited to buffer the surface electron traps, Type semiconductor layer 23 is not covered with the entirety of the layer 20 but only a partial region of the etched p-type semiconductor layer 23 is defined.

Since the region of the p-type semiconductor layer 23 in which the passivation layer 30 is not formed is brought into contact with the first electrode 40, the surface is not exposed to the outside, and regardless of the leakage current control by the actual surface trap do.

In this situation, since the thickness of the passivation layer 30 can be further reduced, the protruded surface potentials of the respective layers located on the surface of the semiconductor layer 20 can be covered, thereby improving the efficiency. Further, The area of the passivation layer 30 itself, which may be a cause of deterioration, can be reduced.

&Lt; Third Embodiment >

The third embodiment will be described below. The parts not described here can be applied in the same manner as in the second embodiment.

9, an n-type semiconductor layer 21, a light emitting layer 22, and a p-type semiconductor layer 23 (not shown) are formed on a substrate 10 made of a material such as sapphire, SiC, ) Is formed on the semiconductor layer 20.

After the semiconductor layer 20 is formed, a step portion 24 is formed by etching a part of the p-type semiconductor layer 23 located on the upper side. That is, a portion 23a whose width is narrowed is formed on the upper part of the p-type semiconductor layer 23.

Then, a passivation layer 30 is formed on at least a part of the exposed surface of the semiconductor layer 20 by the above process. At this time, the passivation layer 30 can prevent the leakage current and improve the stability of the device. As shown in the figure, the passivation layer 30 can be formed to reach the lower side of the stepped shape 24 described above.

Next, the first electrode 41 is formed on the p-type semiconductor layer 23 described above. At this time, the first electrode 41 may be formed to have a structure that covers the narrowed portion 23a of the p-type semiconductor layer 23 described above. In addition, it can be formed in a structure that covers the passivation layer 30.

The first electrode 41 may be a reflective ohmic electrode, which may serve as a bonding metal layer for bonding or plating.

Then, a supporting layer 60 is formed on the first electrode 41. The support layer 60 may be formed of a metal or a semiconductor.

In this manner, the substrate 10 is removed in a state where the supporting layer 60 is located. The removal of the substrate 10 can be performed by a laser lift off process using a laser.

Thereafter, the surface process is performed on the surface of the semiconductor layer 20 on which the substrate is removed and exposed.

Next, a second electrode 70 (see FIG. 6) is formed on the n-type semiconductor layer 21 and devices are separated along the individual device dividing regions by a method such as scribing, State.

11, a coupling groove 25 is formed in the n-type semiconductor layer 21 and a second electrode 71 is formed on the coupling groove 25, The contact effective area between the first electrode 21 and the second electrode 70 can be maximized.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It is natural to belong to the scope.

1 is a cross-sectional view showing a manufacturing process of a light emitting device according to a first embodiment of the present invention.

2 is a cross-sectional view showing an example of a light emitting device according to the first embodiment of the present invention.

3 to 5 are cross-sectional views illustrating a manufacturing process of a light emitting device according to a second embodiment of the present invention.

6 is a cross-sectional view showing an example of a light emitting device according to a second embodiment of the present invention.

7 is a cross-sectional view showing another example of the light emitting device according to the second embodiment of the present invention.

8 is a cross-sectional view illustrating the operation of the light emitting device according to the second embodiment of the present invention.

9 is a cross-sectional view illustrating a manufacturing process of a light emitting device according to a third embodiment of the present invention.

10 is a cross-sectional view showing an example of a light emitting device according to a third embodiment of the present invention.

11 is a cross-sectional view showing another example of the light emitting device according to the third embodiment of the present invention.

Claims

In the method of manufacturing a vertical light emitting device,

Sequentially forming a first conductive semiconductor layer, a light emitting layer, and a second conductive semiconductor layer on a substrate;

Forming a stepped shape in which a width is narrower at least a part of the upper side of the second conductive semiconductor layer;

Forming a passivation layer on at least a portion of the exposed portions of the first conductive semiconductor layer, the light emitting layer, and the second conductive semiconductor layer;

Forming a first electrode on the second conductive semiconductor layer to cover the stepped portion and the passivation layer;

Forming a support layer on the first electrode;

Separating the substrate;

And forming a second electrode on the first conductive semiconductor layer separated and exposed from the substrate.

The method of manufacturing a vertical type light emitting device according to claim 1, wherein the stepped shape is formed by etching a side surface of the second conductive semiconductor layer.

delete

2. The method of claim 1, wherein the passivation layer is formed on a portion of the step shape.

A support layer;

A first conductive semiconductor layer located on the supporting layer, the first conductive semiconductor layer having a stepped shape that narrows at least in part;

A light emitting layer disposed on the first conductive semiconductor layer;

A second conductive semiconductor layer disposed on the light emitting layer;

A passivation layer located on at least a part of the surface of the first conductive semiconductor layer, a side surface of the light emitting layer and the second conductive semiconductor layer;

A first electrode formed between the supporting layer and the first conductive semiconductor layer and between the supporting layer and the passivation layer and having a structure covering a stepped shape of the first conductive semiconductor layer and the passivation layer;

And a second electrode located on the second conductive semiconductor layer.

delete

The vertical light emitting device according to claim 5, further comprising a bonding metal layer between the first electrode and the supporting layer.

The vertical light emitting device according to claim 7, wherein the bonding metal layer is located on the first electrode and / or the passivation layer.

The vertical light emitting device according to claim 7, wherein the bonding metal layer is a reflective metal.

The vertical light emitting device according to claim 5, wherein the second electrode is formed in a coupling groove formed on an upper surface of the second conductive semiconductor layer.