KR101424274B1 - Liquid Crystal Display and Manufacturing Method for the same - Google Patents

Abstract

The present invention relates to a substrate and an upper plate; A gate wiring connected to the gate wiring and a gate located on one surface of the substrate; An insulating film located on the gate wiring and the gate; A color filter positioned on the insulating film so as to divide the gate wiring and the gate; A transistor including a source and a drain which are in contact with the semiconductor layer and between the color filter located on the insulating film; A data line crossing the gate line and located on the color filter; A pixel electrode which is located above the color filter and is connected to a source or a drain of the transistor; A common electrode disposed on one surface of the upper plate; And a spacer positioned between the color filter and the common electrode.

A liquid crystal display, a color filter, a pixel electrode

Description

[0001] The present invention relates to a liquid crystal display device and a manufacturing method thereof,

The present invention relates to a liquid crystal display and a method of manufacturing the same.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, a flat panel display (FPD) such as a liquid crystal display (LCD), an organic light emitting diode (OLED), and a plasma display panel (PDP) Usage is increasing. Among them, liquid crystal display devices capable of realizing high resolution and capable of not only miniaturization but also enlargement are widely used.

Here, the liquid crystal display device is classified into a light receiving display device. Such a liquid crystal display device can display an image by receiving a light source from a backlight unit located under the liquid crystal panel.

The liquid crystal display device comprises a color filter substrate and an array substrate. Here, the color filter substrate is formed corresponding to each pixel region on one side of a transparent substrate, and the array substrate is formed with a transistor including a gate, a semiconductor layer, a source and a drain, and a pixel electrode connected to a source or a drain of the transistor.

Conventionally, a liquid crystal display device is fabricated by providing spacers between the color filter substrate and the array substrate, bonding the two substrates together, injecting a liquid crystal layer through a part of the substrate that is opened when the substrates are bonded together, and sealing the open part.

However, in the conventional liquid crystal display device, a loss due to a process time (for example, the number of used masks) is large in order to form a wiring and an element connected thereto during fabrication, thereby lowering the production yield and decreasing competitiveness. In addition, in manufacturing a conventional liquid crystal display device, there is a problem that the aperture ratio is reduced and off-current of the transistor and the wave noise due to the occurrence of the off-current of the transistor are reduced to deteriorate the display quality.

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same that can reduce the number of masks used to improve the production yield and increase the competitiveness of products. The present invention also solves the problem that the aperture ratio is reduced during manufacture of a liquid crystal display device and the off-current of the transistor and the wave noise due to the off-current are caused, thereby degrading the display quality.

According to an aspect of the present invention, there is provided a plasma display panel comprising: a substrate; A gate wiring connected to the gate wiring and a gate located on one surface of the substrate; An insulating film located on the gate wiring and the gate; A color filter positioned on the insulating film so as to divide the gate wiring and the gate; A transistor including a source and a drain which are in contact with the semiconductor layer and between the color filter located on the insulating film; A data line crossing the gate line and located on the color filter; A pixel electrode which is located above the color filter and is connected to a source or a drain of the transistor; A common electrode disposed on one surface of the upper plate; And a spacer positioned between the color filter and the common electrode.

The pixel electrode, the source and the drain are successively deposited on the semiconductor layer and the color filter and are formed by selective etching, and the source and drain may be located in the remaining fraction of the pixel electrode.

The remaining portion of the pixel electrode may be an auxiliary electrode of a source and a drain.

The transistor includes a gate connected to the gate wiring on the substrate, an insulating film located on the gate, a semiconductor layer located on the insulating film, a source located on the semiconductor layer and connected to the data wiring, . ≪ / RTI >

The color filter may include red, green, and blue.

On the other hand, in another aspect, the present invention provides a method of manufacturing a semiconductor device, comprising: preparing a substrate and a top plate; Forming a gate wiring and a gate connected to the gate wiring on one surface of the substrate; Forming an insulating film on the gate wiring and the gate, forming a semiconductor layer on the insulating film, and forming a first photoresist on the semiconductor layer; Patterning the first photoresist to form a semiconductor layer in an island shape on the insulating film; Forming a color filter such that a gate wiring and a semiconductor layer are separated from each other on an insulating film; Sequentially depositing a first metal and a second metal on the gate wiring, the semiconductor layer and the color filter, and forming a second photoresist on the first metal and the second metal; The second photoresist is patterned selectively to form a portion of the first metal with a source and a drain contacting the semiconductor layer and the remaining portion of the first metal with a data line located on the color filter, Forming a pixel electrode on a color filter; Forming a protective film on the source, the drain, the data line, and the pixel electrode; Forming a common electrode on one surface of the upper plate; Forming a spacer on the protective film or the common electrode; And disposing and bonding a liquid crystal layer between the substrate and the upper plate.

The pixel electrode, the source, and the drain are successively deposited on the semiconductor layer and the color filter and separately formed by selective etching, and the source and the drain may be located in the remaining fraction of the pixel electrode.

The remaining portion of the pixel electrode may be an auxiliary electrode of a source and a drain.

The transistor includes a gate connected to the gate wiring on the substrate, an insulating film located on the gate, a semiconductor layer located on the insulating film, a source located on the semiconductor layer and connected to the data wiring, . ≪ / RTI >

The color filter may include red, green, and blue.

The present invention provides a liquid crystal display device and a method of manufacturing the same that can reduce the number of masks used to improve the production yield and enhance the competitiveness of products. In addition, there is an effect of solving the problem that the aperture ratio is reduced at the time of manufacturing the liquid crystal display device, and the off-current of the transistor and the wave noise due to the occurrence of the off-current cause deterioration of the display quality.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1A is an exploded perspective view of a liquid crystal display device according to an embodiment of the present invention, and FIG. 1B is an example of an edge light source.

As shown in FIG. 1A, the liquid crystal display device may include a light source 171 that emits light. It may also include an optical film layer 176 that guides light emitted from the light source 171. The optical film layer 176 may include a diffuser plate 172, a diffuser sheet 173, an optical sheet 174 and a protective sheet 175 that are positioned on the light source 171.

In the case of the light source 171, for example, a cold cathode fluorescent lamp (CCFL), a hot cathode fluorescent lamp (HCFL), an external electrode fluorescent lamp (EEFL) And a diode (Light Emitting Diode) may be selected, but the present invention is not limited thereto.

In addition, the light source 171 may select any one of an edge type in which the lamp is located on the outside of one side, a dual type in which the lamp is located on both sides, and a direct type in which the lamps are arranged in a straight line. The light source 171 may be connected to an inverter to emit light by receiving power.

The light source 171 shown in FIG. 1A is an example of a direct type. 1B, an edge-type light source 171 is shown. The edge type light source 171 may include a lamp 171a and a light guide plate 171b for guiding light emitted from the lamp 171a. However, the present invention is not limited thereto.

In the case of the optical sheet 174 described above, for example, it may be a prism shape as shown in the figure, but it may be located in a shape such as a lenticular lens microlens or the like. This optical sheet 174 may include beads.

The liquid crystal display device may include an upper case 190 and a lower case 170 in which a liquid crystal panel 183 for displaying an image and a light source 171 are accommodated.

Here, the lower case 170 can house the light source 171. The liquid crystal panel 183 may be positioned on the light source 171 at regular intervals. The liquid crystal panel 183 and the light source 171 may be fixed and protected by the upper case 190 fastened to the lower case 170.

An opening for exposing the image display area of the liquid crystal panel 183 may be provided on the upper surface of the upper case 190. And a mold frame (not shown) in which a peripheral portion of the optical film layer 176 positioned between the liquid crystal panel 183 and the light source 171 is seated.

The liquid crystal panel 183 may have a structure in which a top plate 120 and a substrate 110 on which transistors and color filters are formed are bonded together with a liquid crystal therebetween. In this liquid crystal panel 183, subpixels independently driven by transistors are arranged in a matrix, and each of the subpixels has a common voltage supplied to the common electrode and a difference voltage between the common voltage supplied to the common electrode and the data signal supplied to the pixel electrode through the transistor An image can be displayed by controlling the light transmittance by controlling the liquid crystal array.

A driving unit 189 may be connected to the substrate 110 of the liquid crystal panel 183. The driving unit 189 includes a plurality of film circuits 186 each having a driving chip 187 for driving the data line and the gate line of the liquid crystal panel 183 mounted thereon and connected to one side of the substrate 110, And a printed circuit board 188 connected to the other side of the circuit 186.

The film circuit 186 on which the driving chip 187 is mounted is a COF (Chip On Film) or TCP (Tape Carrier Package) type. However, the driving chip 187 may be directly mounted on the substrate 110 by a COG (Chip On Glass) method or may be formed on the substrate 110 in the transistor forming process.

On the other hand, the liquid crystal panel 183 described above can display an image in each sub-pixel according to a scan signal supplied through the gate lines and a data voltage supplied through the data lines.

Here, the scan signal may be a pulse signal that alternates between a gate high voltage supplied only during one horizontal time period and a gate low voltage supplied during the remaining period, but is not limited thereto.

The transistor included in the subpixel may be turned on when a gate high voltage is supplied from the gate wirings to supply the data voltage applied from the data wirings to the liquid crystal layer.

The liquid crystal layer may be formed between a pixel electrode to which a data voltage is supplied from the data lines and a common electrode to which a common voltage is applied.

Accordingly, when a transistor of each sub-pixel is turned on and a data voltage is applied to the pixel electrode, the liquid crystal display can display an image while the difference voltage between the data voltage and the common voltage is charged in the liquid crystal layer.

On the other hand, when the gate line voltage is supplied from the gate lines, the data voltage charged in the liquid crystal layer can be maintained by the storage capacitor for one frame period while the transistor is turned off.

In this way, the liquid crystal panel 183 may repeat different operations depending on the scan signals supplied through the gate wirings.

Hereinafter, the sub-pixel structure of the liquid crystal display device according to one embodiment of the present invention will be described in more detail with reference to an enlarged view of the "Z"

2 is a cross-sectional view of the "Z"

2, the liquid crystal display device may include a substrate 110 and a top plate 120. The substrate 110 may further include a gate 111b and a gate 111b and a gate 111b and a pad 111a connected to the gate 111b and the gate 111b, respectively. The gate wiring 111b, the gates 111c and 111d and the pad portion 111a may be formed of a metal such as molybdenum (Mo), aluminum (Al), chrome (Cr), gold (Au), titanium (Ti), nickel (Ni) (Nd), and copper (Cu). However, the present invention is not limited thereto.

 The insulating layer 112 may include a gate wiring 111b and gates 111c and 111d and a pad portion 111a. The insulating film 112 may be a silicon oxide film (SiOx) or a silicon nitride film (SiNx), but is not limited thereto.

The color filter 114 may include a gate line 111b and gates 111c and 111d and a pad portion 111a on the insulating layer 112. [ The color filter 114 may include, but is not limited to, red, blue, and green.

Further, it may include semiconductor layers 113a and 113b located between the color filters 114 on the insulating film 112. [ The semiconductor layers 113a and 113b may be formed of pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: H) containing impurities, but are not limited thereto. Here, the semiconductor layers 113a and 113b are formed in an island shape, and the off-current of the semiconductor layers 113a and 113b due to the tail (or active tail) and the resulting wave noise ) Can be prevented, and the aperture ratio can be improved by removing the tail.

In addition, it may include a transistor including a source 116a and a drain 116b which are in contact with the semiconductor layers 113a and 113b. The transistor includes gates 111c and 111d connected to the gate wiring 111b located on the substrate 110, an insulating film 112 located on the gates 111c and 111d, Layers 113a and 113b and a source 116a disposed on the semiconductor layers 113a and 113b and connected to the data line 118 and a drain 116b spaced apart from the source 116a.

The source 116a and the drain 116b may be formed of a single layer or a multilayer and may be formed of a single layer such as molybdenum (Mo), aluminum (Al), chromium (Cr) , Gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). When the source 116a and the drain 116b are multilayered, a double layer of molybdenum-titanium / copper, molybdenum / titanium, molybdenum / aluminum-neodymium or molybdenum / aluminum / molybdenum or molybdenum / aluminum- neodymium / molybdenum Triple layer.

And may include a data line 118 crossing the gate line 111b and located on the color filter 114. [ Here, when the data line 118 is formed, a capacitor upper electrode having the gate line 111b as the lower electrode may be formed.

And may include a pixel electrode 115 located above the color filter 114 and connected to the source 116a or the drain 116b of the transistor. The pixel electrode 115 can be formed by a process preceding the source 116a and the drain 116b and more specifically the pixel electrode 115 and the source 116a and the drain 116b are continuously deposited and selectively And can be distinguished from each other by being patterned.

That is, the pixel electrode 115, the source 116a and the drain 116b are continuously deposited on the semiconductor layers 113a and 113b and the color filter 114 and formed by selective etching, And the drain 116b may be located in the remaining portion of the pixel electrode 115. [ Here, the remaining portion of the pixel electrode 115 may serve as an auxiliary electrode of the source 116a and the drain 116b.

On the other hand, when the pixel electrode 115, the source 116a and the drain 116b are successively deposited on the semiconductor layers 113a and 113b and the color filter 114 and selectively etched, the color filter 114 It is possible to omit the primary protective film.

And may include a protective film 117 covering the source 116a and the drain 116b and the pixel electrode 115. [ Here, the protective film 117 may be formed of an inorganic material such as silicon oxide or silicon nitride by a silicate on glass (SOG) method, but is not limited thereto.

And may include a common electrode 121 located on one surface of the upper plate 120. The common electrode 121 may be positioned to face the pixel electrode 115.

And may include a spacer 125 disposed on the data line 118 and in contact with the common electrode 121 located on the top plate 120. The spacers 125 may serve to maintain the spacing between the substrate 110 and the top plate 120.

And may include a liquid crystal layer 122 positioned between the substrate 110 and the upper plate 120. [ The liquid crystal layer 122 may be positioned between the substrate 110 and the upper plate 120 by a method of injecting the liquid crystal layer 122 between the bonded substrate 110 and the upper plate 120. However,

Hereinafter, a method of manufacturing a liquid crystal display device according to an embodiment of the present invention will be described.

3A to 3H are process cross-sectional views schematically showing a method of manufacturing a liquid crystal display device according to an embodiment of the present invention.

First, a step of preparing a substrate and an upper plate may be performed prior to the production of a liquid crystal display device.

Next, as shown in FIG. 3A, a step of forming gate lines 111b and 111d connected to the gate lines 111b and 111b may be performed on one surface of the substrate 110. FIG. When the gate wiring 111b and the gates 111c and 111d are formed, a pad portion 111a can be formed together. The pad portion 111a may include a gate pad portion connected to the gate wiring 111b and a data pad portion connected to a data line (not shown).

Here, the gate wiring 111b, the gates 111c and 111d and the pad portion 111a may be formed of a metal such as Mo, Al, Cr, Au, Ti, Ni, , Neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present invention is not limited thereto.

3B, an insulating layer 112 is formed on the gate wiring 111b and the gates 111c and 111d, a semiconductor layer 113 is formed on the insulating layer 112, a semiconductor layer 113 is formed on the insulating layer 112, The step of forming the first photoresist PR1 may be carried out.

Here, the semiconductor layer 113 may be formed of pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: H) containing impurities, but is not limited thereto.

Next, the first photoresist PR1 shown in FIG. 3B may be patterned to form island-like semiconductor layers 113a and 113b on the insulating layer 112 as shown in FIG. 3C .

The pad portion 111a is exposed between the insulating film 112 and the semiconductor layers 113a and 113b using a halftone mask and the semiconductor layers 113a and 113b are formed in an island shape, Off-current by the active tail (or the active tail) and the wave trouble due to the off-current can be prevented, and the aperture ratio can be improved by removing the tail.

Next, as shown in FIG. 3D, a step of forming the color filter 114 so that the gate wiring 111b and the semiconductor layers 113a and 113b are separated on the insulating film 112 can be performed.

The color filter 114 may include, but is not limited to, red, green, and blue. However, the color filter 114 is formed separately for each pixel region when the color filter 114 is formed, and then the upper electrode of the capacitor is formed on the gate wiring 111b, and the metal is brought into contact with the semiconductor layers 113a and 113b.

Next, as shown in FIG. 3E, a first metal 115 and a second metal 116 are successively deposited on the gate wiring 111b, the semiconductor layers 113a and 113b, and the color filter 114, A step of forming a second photoresist PR2 on the metal 115 and the second metal 116 may be performed.

Here, the first metal layer 115 may be formed of a transparent conductive layer such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO).

When the second metal layer 116 is a single layer, the second metal layer 116 may be formed of a metal such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au) And may be made of any one selected from the group consisting of titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) When the second metal 116 is a multilayer, it may be a double layer of molybdenum-titanium / copper, molybdenum / titanium, molybdenum / aluminum-neodymium or a triple layer of molybdenum / aluminum / molybdenum or molybdenum / aluminum- neodymium / molybdenum But is not limited thereto.

Next, as shown in FIG. 3F, the second photoresist PR2 shown in FIG. 3E is selectively patterned so that a part of the first metal 115 is exposed to the source 116a (116a) contacting the semiconductor layers 113a and 113b And the drain 116b and the remaining portion of the first metal 115 is formed as the data line 118 located on the color filter 114 and the second metal 116 is formed on the color filter 114 And the pixel electrode 116 located in the pixel region.

Here, the first metal 115 may be divided into a plurality of pixel electrodes 116 on the color filter 114 using a halftone mask. Here, the second metal 116 may be formed as an upper electrode of the capacitor opposing the gate wiring 111b located at the lower portion, as the second photoresist PR2 is patterned selectively. Here, the data line 118 may be located on the remaining fraction of the first metal 115 located on the color filter 114.

Here, the pixel electrode 115 may be formed by a process preceding the source 116a and the drain 116b. More specifically, the pixel electrode 115, the source 116a and the drain 116b are continuously deposited And can be individually distinguished by being selectively patterned.

That is, the pixel electrode 115, the source 116a and the drain 116b are continuously deposited on the semiconductor layers 113a and 113b and the color filter 114 and formed by selective etching, And the drain 116b may be located in the remaining portion of the pixel electrode 115. [ Here, the remaining portion of the pixel electrode 115 can serve as an auxiliary electrode of the source 116a and the drain 116b.

On the other hand, when the pixel electrode 115, the source 116a and the drain 116b are successively deposited on the semiconductor layers 113a and 113b and the color filter 114 and selectively etched, the color filter 114 It is possible to omit the primary protective film and to omit one masking process.

Next, as shown in Fig. 3G, a step of forming a protective film 117 on the source 116a, the drain 116b, the data line 118, and the pixel electrode 115 including the color filter 114 .

Here, the protective film 117 may be formed of an inorganic material such as silicon oxide or silicon nitride by a silicate on glass (SOG) method, but is not limited thereto.

Next, as shown in FIG. 3H, a step of forming the common electrode 121 on one surface of the upper plate 120 may be performed.

The common electrode 121 may be connected to the substrate 110 to transmit an electrical signal for controlling the alignment of the liquid crystal layer 122 at a position opposite to the pixel electrode 115.

Next, as shown in FIG. 3H, a step of forming a spacer 125 on the protective film 117 or the common electrode 121 may be performed. The spacers 125 may be formed on the common electrode 121 and may be formed on the protective film 117 corresponding to the upper portion of the data lines 118 on the substrate 110. However,

Next, as shown in FIG. 3H, a step of arranging and bonding the liquid crystal layer 122 between the substrate 110 and the upper plate 120 may be performed.

The liquid crystal layer 122 may be positioned between the substrate 110 and the upper plate 120 by a method of injecting the liquid crystal layer 122 between the bonded substrate 110 and the upper plate 120. However,

In the liquid crystal display device as described above, when a scan signal and a data signal are supplied to the gate wiring 111b and the data wiring 118, the data voltage can be stored in the storage capacitor. The data voltage stored in the storage capacitor changes the arrangement of the liquid crystal layer 122 located between the pixel electrode 115 and the common electrode 121 so that the light source located below the substrate 110 is reflected by the color filter 114, So that a desired image can be displayed.

SUMMARY OF THE INVENTION The present invention provides a liquid crystal display device and a method of manufacturing the same that can reduce the number of masks used to improve the production yield and enhance the competitiveness of products. The present invention also solves the problem that the aperture ratio is reduced during manufacture of a liquid crystal display device and the off-current of the transistor and the wave noise due to the off-current are caused, thereby degrading the display quality.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

FIG. 1A is an exploded perspective view of a liquid crystal display device according to an embodiment of the present invention; FIG.

1B is an example of an edge type light source.

Fig. 2 is a cross-sectional view of the "Z" region of Fig.

FIGS. 3A to 3H are cross-sectional views schematically showing a method of manufacturing a liquid crystal display device according to an embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS

110: substrate 112: insulating film

113a, 113b: semiconductor layer 114: color filter

115: pixel electrodes 116a and 116b: source and drain

117: protective film 120: top plate

121: common electrode 122: liquid crystal layer

Claims (10)

A substrate and an upper plate; A gate wiring located on one surface of the substrate and a gate connected to the gate wiring; An insulating film located on the gate wiring and the gate; A color filter disposed on the insulating film; A transistor including a semiconductor layer positioned between the color filters located on the insulating film and a source and a drain in contact with the semiconductor layer; A data line crossing the gate line and located on the color filter; A pixel electrode located above the color filter and connected to the source or drain; A common electrode disposed on one surface of the upper plate; And And a spacer positioned between the color filter and the common electrode, And the source and the drain are located on the pixel electrode. The method according to claim 1, The pixel electrode, the source, and the drain, The semiconductor layer and the color filter, and is formed by selective etching. 3. The method of claim 2, The remaining amount of the pixel electrode And the auxiliary electrode of the source and the drain. delete delete Preparing a substrate and an upper plate; Forming a gate wiring and a gate connected to the gate wiring on one surface of the substrate; Forming an insulating film on the gate wiring and the gate, forming a semiconductor layer on the insulating film, and forming a first photoresist on the semiconductor layer; Patterning the first photoresist to form the island-like semiconductor layer on the insulating film; Forming a color filter such that the gate wiring and the semiconductor layer are separated from each other on the insulating film; Sequentially depositing a first metal and a second metal on the gate wiring, the semiconductor layer, and the color filter, and forming a second photoresist on the first metal and the second metal; The second photoresist is patterned to form a portion of the first metal with a source and a drain contacting the semiconductor layer and a remaining portion of the first metal with a data line located on the color filter , Forming the second metal as a pixel electrode located on the color filter; Forming a protective film on the source, the drain, the data line, and the pixel electrode; Forming a common electrode on one surface of the upper plate; Forming a spacer on the protective film or the common electrode; And And arranging and bonding the liquid crystal layer between the substrate and the upper plate. The method according to claim 6, The pixel electrode, the source, and the drain, The semiconductor layer and the color filter, and are separated and formed by selective etching, Wherein the source and the drain are located in a remaining portion of the pixel electrode. 8. The method of claim 7, The remaining amount of the pixel electrode And the auxiliary electrode of the source and the drain. delete delete

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