KR20080029100A - Thin film transistor substrate and method of manufacturing the same, and liquid crystal display having the same - Google Patents

Abstract

A TFT(Thin Film Transistor), a manufacturing method thereof and an LCD(Liquid Crystal Display) having the same are provided to reduce the thickness of an insulating layer by etching a gate insulating layer in an over etching process. A gate electrode and a storage electrode are formed at an upper predetermined area of the substrate. Gate insulating layers are formed on the upper portion of the gate electrode and the storage electrode with different thickness. An active layer is formed on the upper portion of the gate electrode. A source electrode(122) and a drain electrode(124) are formed on the upper portion of the active layer separately. A pixel electrode is connected with the drain electrode and formed at the upper portion of the storage electrode. The thickness of a gate insulating layer at the upper portion of the storage electrode is thinner than that of the gate insulating layer at the upper portion of the gate electrode above 10%.

Description

Thin film transistor substrate and method of manufacturing the same and a liquid crystal display having the same

1 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a cross-sectional view of a liquid crystal display according to an exemplary embodiment of the present invention.

3A to 3G are cross-sectional views of devices sequentially illustrated to explain a method of manufacturing a thin film transistor substrate according to an embodiment of the present invention.

4 is a schematic diagram for comparing sizes of storage electrodes of a conventional liquid crystal display and a liquid crystal display according to the present invention;

<Explanation of symbols for the main parts of the drawings>

110: gate line 120: data line

130: pixel electrode 140: storage capacitor line

112: gate electrode 122: source electrode

124: drain electrode 125: thin film transistor

128: contact hole 131 and 132: incision pattern

141: storage electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate and a method of manufacturing the same, and more particularly, to a thin film transistor substrate and a method of manufacturing the same, which can improve the aperture ratio by reducing the thickness of the gate insulating film formed on the storage electrode.

Liquid crystal display (LCD) is one of the widely used flat panel display devices. The liquid crystal display (LCD) is composed of two substrates on which two electrodes facing each other are formed and a liquid crystal layer interposed therebetween. An image is displayed in a manner of controlling the amount of light transmitted through the liquid crystal layer by rearranging the liquid crystal molecules of the liquid crystal layer by applying a voltage to the electrode.

In a typical case, a plurality of pixel lines are defined by crossing a plurality of gate lines and a plurality of data lines in a thin film transistor substrate, which is one of two substrates of a liquid crystal display, and each pixel region is electrically connected to a gate line and a data line. The thin film transistor and the pixel electrode electrically connected to the thin film transistor are formed.

In such a liquid crystal display, a storage capacitor is formed on the thin film transistor substrate to stably maintain the liquid crystal voltage applied to the liquid crystal positioned between the two substrates. To this end, a storage electrode is formed on the same surface as the gate line to form a storage capacitor. In addition, a gate insulating layer, an organic protective layer, and an inorganic protective layer are stacked on the storage electrode, and a pixel electrode is formed thereon. The stacked insulating layers serve as a dielectric layer and the pixel electrode serves as an upper plate electrode of the storage capacitor.

However, in order to increase the luminance of the liquid crystal display or to increase the response speed, the capacitance of the storage capacitor should be increased. The capacitance of the storage capacitor increases as the size of the plate electrode and the storage electrode of the capacitor increases. The thicker the thickness, the smaller it becomes. In the above structure, since the gate insulating film, the organic protective film, and the inorganic protective film are formed thick, the capacitance is inevitably small. Therefore, the area of the storage electrode and the plate electrode of the storage capacitor is increased to increase the capacitance.

However, although the capacitance of the capacitor electrode can be increased by increasing the area of the capacitor electrode, there is a problem that the aperture ratio of the liquid crystal display device is reduced.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor substrate, a method of manufacturing the same, and a liquid crystal display device having the same, by reducing the thickness of an insulating layer of the storage capacitor and improving the aperture ratio while maintaining the capacitance of the storage capacitor.

Another object of the present invention is a thin film transistor substrate capable of improving the aperture ratio and transmittance by reducing the thickness of the insulating layer by etching a predetermined thickness of the gate insulating film formed on the storage electrode by an excessive etching process, a manufacturing method thereof, and a liquid crystal display device having the same. To provide.

A thin film transistor substrate according to the present invention includes a gate electrode and a storage electrode formed in a predetermined region on the substrate; A gate insulating layer formed on the gate electrode and the storage electrode to have different thicknesses; An active layer formed on the gate electrode; Source and drain electrodes spaced apart from each other on the active layer; And a pixel electrode connected to the drain electrode and formed on the storage electrode.

The gate insulating layer is formed to be 10% or more thinner than the gate electrode on the storage electrode.

The semiconductor device may further include a passivation layer formed on the source electrode, the drain electrode, and a storage electrode, and formed thinner than other regions on the storage electrode.

According to an aspect of the present invention, there is provided a method of manufacturing a thin film transistor substrate, the method comprising: forming a first conductive layer on an upper surface of the substrate and patterning the first conductive layer to form a gate line and a storage electrode including the gate electrode; After forming a gate insulating film, an active layer, and a second conductive film on the entire structure, and patterning the second conductive film and the active layer in a second mask process to form a data line including a drain electrode and a source electrode, the data on the storage electrode Removing a predetermined thickness of the gate insulating film; Forming a protective film over the entire structure and exposing the drain electrode by a third mask process and simultaneously removing a predetermined thickness of the protective film over the storage electrode; And forming a pixel electrode by forming a third conductive layer over the entire structure and patterning the same by a fourth mask process.

The gate insulating layer is formed to be 10% or more thinner than the gate electrode on the storage electrode.

The protective film is formed by stacking an inorganic protective film and an organic protective film.

According to an exemplary embodiment of the present invention, a liquid crystal display including a thin film transistor substrate includes a gate insulating layer formed on a gate electrode and a storage electrode having a different thickness, a source electrode and a drain electrode spaced apart from the gate electrode, and a drain electrode. A thin film transistor substrate that includes a pixel electrode formed on the storage electrode; And a color filter substrate facing the thin film transistor substrate and a liquid crystal layer interposed between the thin film transistor substrate and the color filter substrate.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along line II ′.

1 and 2, a liquid crystal display according to an exemplary embodiment may include a thin film transistor substrate 100, a color filter substrate 200 corresponding thereto, and a thin film transistor substrate 100 and a color filter substrate ( It includes a liquid crystal layer (not shown) formed between the 200.

The thin film transistor substrate 100 may include a plurality of gate lines 110 extending in one direction, a plurality of data lines 120 crossing the gate lines 110, and a plurality of gate lines 110 and data lines 120. A pixel electrode 130 formed in a pixel area defined by the pixel region 130, a thin film transistor 125 connected to a gate line 110, a data line 120, and a pixel electrode 130, and a pixel electrode. 130 includes a storage line 140 formed to extend over a bent region.

The gate line 110 mainly extends in the horizontal direction, and a portion of the gate line 110 protrudes up and down to form the gate electrode 112.

The data line 120 mainly extends in the vertical direction, and a part of the data line 120 protrudes to form the source electrode 122. The data line 120 may be formed in a straight line shape or may have a predetermined curved area. Here, the data line 120 having the curved area is illustrated.

The storage line 140 is parallel to the gate line 110 and includes a storage electrode 141. The storage electrode 141 is formed in the curved portion of the pixel electrode 130.

In addition, the gate line 110 and the storage line 140 is preferably formed of at least one metal of Al, Nd, Ag, Cr, Ti, Ta, and Mo or an alloy containing them. In addition, the gate line 110 and the storage line 140 may be formed of a multilayer of a plurality of metal layers as well as a single layer. That is, it may be formed of a double layer including a metal layer such as Cr, Ti, Ta, Mo, etc. having excellent physicochemical properties and an Al-based or Ag-based metal layer having a low specific resistance. In addition, the data line 120, the source electrode 122, and the drain electrode 124 may also be formed of the above-described metal, or may be formed of multiple layers.

The thin film transistor 125 allows the pixel signal supplied to the data line 120 to be charged in the pixel electrode 130 in response to the signal supplied to the gate line 110. Accordingly, the thin film transistor 125 includes a gate electrode 112 connected to the gate line 110, a source electrode 122 connected to the data line 120, and a drain electrode 124 connected to the pixel electrode 130. ), A gate insulating layer 114 and an active layer 116 sequentially formed between the gate electrode 112, the source electrode 122, and the drain electrode 124, and an ohmic contact layer formed on at least a portion of the active layer 116 ( 118). In this case, the ohmic contact layer 118 may be formed on the active layer 116 except for the channel portion.

An insulating protective film 126 is formed on the thin film transistor 125. The passivation layer 126 may be formed of an inorganic material such as silicon nitride or silicon oxide, or may be formed of a low dielectric constant organic film. Of course, it may be formed of a double layer of an inorganic insulating film and an organic film.

The pixel electrode 130 is formed on the passivation layer 126 and is connected to the drain electrode 124 through the contact hole 128. In addition, the pixel electrode 130 is formed in a band shape and has a cutout pattern 131 as domain regulating means for adjusting the alignment direction of the liquid crystal. The incision pattern 131 is formed in a vertical direction at a position that divides the pixel electrode 130 from side to side. In addition, the pixel electrode may include protrusions instead of an incision pattern as domain regulating means for alignment of liquid crystal molecules.

In addition, the passivation layer 126 is formed on the storage electrode 141 as well as the thin film transistor 125, and the storage electrode 141 and the pixel electrode 130 overlap with the passivation layer 126 therebetween to form a storage capacitor. do. However, in the present invention, the gate insulating layer 114 and the passivation layer 126 formed on the storage electrode 141 are formed thinner than the gate insulating layer 114 and the passivation layer 126 formed in the thin film transistor 125. In addition, the storage capacitor 126 is interposed between the storage electrode 141 and the pixel electrode 130 to form a storage capacitor. The storage capacitor keeps the video signal charged in the pixel electrode 130 stable.

Meanwhile, the color filter substrate 200 includes a black matrix 210, a color filter 220, an overcoat layer 230, and a common electrode 240 having cut patterns 241, 242, and 243. .

The black matrix 210 is formed in the thin film transistor region to prevent leakage of light to regions other than the pixel region and optical interference between adjacent pixel regions. That is, the black matrix 210 has an opening that opens the pixel electrode 130 region of the thin film transistor substrate 100. The color filter 220 is formed to be divided into red (R), green (G), and blue (B), and is formed to cover the openings of the black matrix 210 to transmit red, green, and blue light, respectively. An overcoat layer 230 made of an organic material is formed on the rear surface of the color filter 220.

The common electrode 240 is a transparent conductive layer coated on the rear surface of the overcoat layer 230 and has a plurality of cutout patterns 241 and 242. The cutting patterns 241 and 242 are arranged in parallel with the cutting pattern 131 of the pixel electrode 130 at predetermined intervals, and have a predetermined protrusion in the curved portion of the pixel electrode 130. In addition, a protrusion may be formed on the upper or lower portion of the common electrode 240 instead of the cutting patterns 241 and 242. When forming the protrusions, the common electrode 240 may be formed on the rear surface of the color filter 220 without forming the overcoat layer 230.

As described above, in the present invention, the thickness of the gate insulating layer 114 formed on the storage electrode 141 is made thinner than the thickness of the gate insulating layer 114 formed on the gate electrode 112 to improve the aperture ratio and transmittance. That is, while the gate insulating film 114 is formed on the gate electrode 112 and the storage electrode 141 to have a thickness of about 3900 약, in the present invention, the gate insulating film 114 is formed on the storage electrode 141. 125) 10% or more thinner than the gate insulating film 114 formed on the upper portion to improve the aperture ratio and transmittance.

3A to 3G are cross-sectional views of devices sequentially illustrated to explain a method of manufacturing a thin film transistor substrate according to an exemplary embodiment.

Referring to FIG. 3A, after forming a first conductive layer on an insulating substrate 100 made of glass, quartz, ceramic, or plastic, the first conductive layer is patterned by photolithography and etching using a first mask. . As a result, the gate line 110 including the gate electrode 112 and the storage line 140 including the storage electrode 141 are formed. The first conductive film is formed by a deposition method such as a CVD method, a PVD method, or a sputtering method, and the first conductive film is Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al ( It is preferable to use at least one of Nd) and Cr / Al (Nd).

Referring to FIG. 3B, the gate insulating layer 114, the active layer 116, the ohmic contact layer 118, and the second conductive layer 120a are sequentially formed on the entire structure. Here, the gate insulating film 114 is formed using a PECVD method, a sputtering method, or the like. In this case, the gate insulating film 114 is preferably formed using an inorganic insulating film including a silicon oxide film or a silicon nitride film, and is formed to a thickness of about 4300 kPa. The active layer 116, the ohmic contact layer 118, and the second conductive layer 120a are sequentially formed on the gate insulating layer 114 using the deposition method. An amorphous silicon layer is used as the active layer 116, an amorphous silicon layer doped with silicide or N-type impurities at a high concentration is used as the ohmic contact layer 118, and Mo, Al is used as the second conductive film 120a. Preference is given to using at least one metal monolayer or multilayer of Cr, Ti and Ti. The second conductive film 120a may use the same material as the first conductive film 110a.

Subsequently, a photoresist film is coated on the second conductive film 120a and then a photoresist pattern 123a having a predetermined step is formed through a photographic and developing process using a second mask. In this case, the portion of the photoresist pattern 123a positioned between the channel portion of the thin film transistor 125, that is, the source electrode 122 and the drain electrode 124, is higher than the portion where the data line portion, that is, the data line 120 is to be formed. It becomes low (refer to area K), and removes all the photosensitive film of the remaining area to form the photosensitive film pattern 123a having the stepped recessed channel portion. In this case, the step may be formed by adjusting the amount of light transmitted during the lithography process by using a diffraction exposure mask having a diffraction exposure portion or a transflective mask having a transflective portion. In addition, an exposure development may be performed using a photoresist film made of a reflowable material, and then reflowed so that a portion of the photoresist film flows to a portion where the photoresist film does not remain, thereby forming a step.

Referring to FIG. 3C, after the second conductive layer 120a, the ohmic contact layer 118, and the active layer 116 are removed using the photoresist pattern 123a as an etching mask, the gate insulating layer 114 is overetched. The gate insulating layer 114 is partially removed. By this process, the thickness of the photoresist pattern 123a is also lowered, so that the portion K is removed, thereby forming the photoresist pattern 123b.

Referring to FIG. 3D, the second conductive layer 120b and the ohmic contact layer 118 of the portion where the channel is to be formed are removed by an etching process using the photoresist pattern 123b. In addition, the gate insulating layer 114 is removed by an excessive etching process. In this case, the gate insulating layer 114 may be completely removed, and at least 10% of the deposition thickness may be removed. That is, since the gate insulating film 114 is initially formed to a thickness of about 4300 kPa, the gate insulating film 114 is excessively etched so that the gate insulating film 114 remains or is completely removed below 3900 kPa. Thereafter, the photoresist pattern 123b is removed. Accordingly, a channel formed of the active layer 116 is formed between the source electrode 122 and the drain electrode 124, and is connected to the source electrode 122 to form a data line 120. In addition, the gate insulating layer 114 on the storage electrode 141 is left at a thickness of at least 10% thinner than the upper portion of the gate electrode 112. Meanwhile, the gate insulating layer 114 is removed by at least 10% of the deposition thickness by two transient etching processes, but may be removed by one transient etching. That is, an etching process for removing the second conductive layer 120a, the ohmic contact layer 118, and the active layer 116 exposed by the photosensitive layer pattern 123a and the channel exposed by the photosensitive layer pattern 123b may be formed. The gate insulating layer 114 may be removed to a desired thickness in any one of the etching processes of removing the portion of the second conductive layer 120b and the ohmic contact layer 118.

Referring to FIG. 3E, the first passivation layer 126a and the second passivation layer 126b are formed on the entire structure. The first passivation film 126a forms an inorganic insulating film such as a silicon oxide film or a silicon nitride film with a thickness of about 1000 GPa, and the second passivation film 126b uses an organic insulating film such as benzocyclobutane (BCB) or acrylic resin (acryl resine). Form thickly. After the photoresist film is formed over the entire structure, the photoresist pattern 127 is formed by patterning the photoresist film using a third mask and a developing process. In this case, the photoresist pattern 127 is formed to have a double step, and is formed to have a deep step on the drain electrode 124 and a shallow step on the storage electrode 141. In this case, the step may be formed by adjusting the amount of light transmitted during the lithography process by using a diffraction exposure mask having a diffraction exposure portion or a transflective mask having a transflective portion. In addition, an exposure development may be performed using a photoresist film made of a reflowable material, and then reflowed so that a portion of the photoresist film flows to a portion where the photoresist film does not remain, thereby forming a step.

Referring to FIG. 3 (f), the protective layer 126 is removed by an etching process using the photoresist pattern 127 as a mask to form a contact hole 128 exposing the drain electrode 124 and at the same time the gate line 110. A gate pad (not shown), which is an end of the gate line, a data pad (not shown), which is an end of the data line 120, and a contact hole (not shown) exposing a portion of the storage line 140 are formed. In addition, a portion of the protective layer 126 on the storage electrode 141 is also removed, but is preferably completely removed. Thereafter, the remaining third photoresist pattern 127 is removed.

Referring to FIG. 3G, the third conductive layer 130a is formed on the entire structure, and then the second conductive layer 130a is patterned by a photolithography and an etching process using a fourth mask to form the pixel electrode 130. In addition, a pad (not shown) connecting the gate pad 111, the data pad 121, and the storage lines 140 is formed. Here, it is preferable to use a transparent conductive film containing indium tin oxide (ITO) or indium zinc oxide (IZO) as the third conductive film 130a.

As described above, according to the present invention, the gate insulating layer 114 formed over the storage electrode 141 is 10% thinner or completely removed than the gate insulating layer 114 formed over the gate electrode 112. Accordingly, as shown in FIG. 4, the storage according to the present invention is larger than the area A of the storage capacitor when the gate insulating layer 114 is formed on the gate electrode 112 and the storage electrode 141 with the same thickness. The area B of the storage capacitor when the gate insulating film 114 on the electrode 141 is formed thin can be made smaller. As a result, the aperture ratio and the transmittance can be improved. According to the conventional method, the aperture ratio was 52.7% and the transmittance was 4.65%. However, according to the present invention, the aperture ratio is 55.2% and the transmittance is 4.87%.

Meanwhile, in the above embodiment, a method of manufacturing a thin film transistor substrate using four masks has been described. However, the present invention is not limited thereto and may be changed to various mask process methods such as four or more mask processes or four or less mask processes. . For example, a method of manufacturing a thin film transistor substrate using five masks will be briefly described. A gate line including a gate electrode and a storage line including a storage electrode are formed by a photolithography and an etching process using a first mask. After the gate insulating layer, the active layer, and the ohmic electrode layer are formed on the entire structure, the gate insulating layer on the storage electrode is removed by a predetermined thickness when the active layer and the ohmic electrode layer are patterned using the second mask. Thereafter, a conductive layer is formed on the entire structure, and a data line connected to the drain electrode, the source electrode, and the source electrode is formed by a photolithography and an etching process using a third mask. At this time, the gate insulating layer formed on the storage electrode is excessively etched. After the passivation layer is formed on the entire structure, the drain electrode, the gate pad, the data pad, and the storage electrode are exposed by a photolithography and an etching process using a fourth mask. Finally, a pixel electrode having a cutout pattern is formed to partially overlap the gate line by a photolithography and an etching process using a fifth mask. That is, when manufacturing a thin film transistor substrate using five masks, the gate insulating layer on the storage electrode in the process of patterning the active layer using the second mask and the process of patterning the drain electrode and the data line using the third mask. Over-etch.

5 is an exploded perspective view of a liquid crystal display including a thin film transistor substrate according to an exemplary embodiment. The liquid crystal display described below will be mainly described with a configuration different from that of the above-described thin film transistor substrate, and other descriptions overlapping with the aforementioned thin film transistor substrate will be omitted.

Referring to FIG. 5, a liquid crystal display according to the present invention includes a liquid crystal display panel 2200, a backlight unit including a base plate 300 and a light source 340, a liquid crystal display panel 2000, The upper chassis 2400 may surround a predetermined area and a side of the upper portion of the backlight unit.

In the above, the liquid crystal display panel 2200 corresponds to the thin film transistor substrate 2220, a driving integrated circuit (IC) (not shown) connected to the thin film transistor substrate 2220, and the thin film transistor substrate 2220. And a liquid crystal layer (not shown) injected between the color filter substrate 2210 and the thin film transistor substrate 2220 and the color filter substrate 2210. The display device may further include a polarizer (not shown) formed to correspond to the upper portion of the color filter substrate 2210 and the lower portion of the thin film transistor substrate 2220, respectively.

The color filter substrate 2210 is a substrate in which red (R), green (G), and blue (B) pixels, which are color pixels in which a predetermined color is expressed while light passes, are formed by a thin film process. A common electrode (not shown) made of a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO), which is a transparent conductive thin film, is formed on an entire surface of the color filter substrate 2210. .

The thin film transistor substrate 2220 is a transparent glass substrate in which a thin film transistor (TFT) and a pixel electrode are formed in a matrix form. The data line is connected to the source terminal of the thin film transistors, and the gate line is connected to the gate terminal. In addition, a pixel electrode (not shown) made of a transparent electrode made of a transparent conductive material is connected to the drain terminal. When an electrical signal is input to the data line and the gate line, each thin film transistor is turned on or turned off to apply an electrical signal necessary for pixel formation to a drain terminal.

That is, as described above, when power is applied to the gate terminal and the source terminal of the thin film transistor substrate 2220 and the thin film transistor is turned on, an electric field is formed between the pixel electrode and the common electrode of the color filter substrate. Due to the electric field, the arrangement of the liquid crystal injected between the thin film transistor substrate 2220 and the color filter substrate 2210 is changed, and the light transmittance is changed according to the changed arrangement to obtain a desired image.

The data side and gate side tape carrier packages 2260a and 2280a are respectively connected to data lines and gate lines of the thin film transistor substrate 2220 to apply a data driving signal and a gate driving signal to the thin film transistor. In this case, an integrated circuit (IC) may be mounted in the data side and gate side tape carrier packages 2260a and 2280a. The data side and gate side printed circuit boards 2260b and 2280b are connected to the data side and gate side tape carrier packages 2260a and 2280a to apply external image signals and gate drive signals.

The backlight unit includes a base plate 300 and a plurality of light sources 340 disposed on the base plate 300. At this time, the side wall 320 is bent at a predetermined angle with the base plate 300 on the outer side of the base plate 300, and the diffusion sheet 360 is installed on the base plate 300, the light source 340 is disposed And the prism sheet 380 may be further included, and the lower chassis 400 for receiving the base plate 300, the light source 340, the diffusion sheet 360, the prism sheet 380 may be further included.

The base plate 300 serves as a substrate for arranging the plurality of light sources 340. The base plate 300 may be a printed circuit board (PCB) in which the light source 340 is arranged to be electrically connected. In addition, the base plate 300 is manufactured by using a conventional metal material including aluminum (Al), or reflecting the light emitted from the light source 340 to the light emitting surface of the backlight to improve the light utilization efficiency, or resin or metal The base plate 300 can be fabricated by applying a material of high reflectivity such as silver (Ag).

The side wall 320 is to prevent leakage of the light emitted from the light source 340 and to improve concealment. The side wall 320 is bent to the outside of the base plate 300 to form the base plate 300 and the side wall 320. The upper part becomes an open rectangular box shape.

The light source 340 is disposed in plural on the base plate 300, and consists of LEDs.

On the other hand, the diffusion sheet 360 directs the light incident from the light source 340 toward the front of the liquid crystal display panel, and diffuses the light to have a uniform distribution in a wide range to irradiate the liquid crystal display panel. As the diffusion sheet 360, it is preferable to use a film made of a transparent resin coated with a predetermined light diffusion member on both surfaces.

The prism sheet 380 serves to change the light incident at an oblique angle among the light incident to the prism sheet 380 to be emitted vertically. This is because the light efficiency increases when the light incident on the liquid crystal display panel is perpendicular to the liquid crystal display panel. Therefore, at least one prism sheet 380 may be disposed between the diffusion sheet 360 and the liquid crystal display panel to vertically convert the light emitted from the diffusion sheet 360.

The lower chassis 400 surrounds and protects the side and bottom surfaces of the light source 340, the base plate 300, and the side walls 320. The lower chassis 400 is formed in a box shape of an open rectangular parallelepiped and has a predetermined depth therein. A storage space is formed.

The mold frame 2000 is formed in a rectangular frame shape and includes a flat portion and sidewall portions bent at right angles therefrom. A mounting portion (not shown) may be formed on the flat portion to allow the liquid crystal display panel 2200 to be mounted thereon. The seating part may use a fixing protrusion for contacting and aligning the edge side surfaces of the liquid crystal display panel 2200, respectively, or may be formed using a predetermined stepped step surface. The prism sheet 380, the diffusion sheet 360, the light source 340, the sidewall 320, and the base plate 300 are fixed to the mold frame 2000 with the lower chassis 400.

The upper chassis 2400 is configured in the form of a rectangular window frame having a flat portion and sidewall portions bent at right angles therefrom. The planar portion of the upper chassis 2400 may support a portion of an edge of the liquid crystal display panel 2200 at a lower portion thereof, and the sidewall portion may be coupled to face the sidewalls of the lower chassis 400. The upper chassis 2400 and the lower chassis 400 are preferably manufactured using metal having excellent strength, light weight, and low deformation.

As described above, according to the present invention, by removing the gate insulating layer formed on the storage electrode of the thin film transistor substrate to a thickness of 10% or more compared with the deposition, the required area of the storage capacitor can be reduced to increase the aperture ratio and transmittance.

In addition, since the thickness of the gate insulating layer may be reduced by the excessive etching, the aperture ratio may be increased without performing a mask process or a separate process.

Claims (7)

A gate electrode and a storage electrode formed in a predetermined region on the substrate; A gate insulating layer formed on the gate electrode and the storage electrode to have different thicknesses; An active layer formed on the gate electrode; Source and drain electrodes spaced apart from each other on the active layer; And And a pixel electrode connected to the drain electrode and formed on the storage electrode. The thin film transistor substrate of claim 1, wherein the gate insulating layer is formed to be 10% or more thinner than the gate electrode on the storage electrode. The thin film transistor substrate of claim 1, further comprising a passivation layer formed on the source electrode, the drain electrode, and a storage electrode, and formed thinner than other regions on the storage electrode. Forming a first conductive layer on the substrate and patterning the first conductive layer by a first mask process to form a gate line and a storage electrode including the gate electrode; After forming a gate insulating film, an active layer, and a second conductive film on the entire structure, and patterning the second conductive film and the active layer in a second mask process to form a data line including a drain electrode and a source electrode, the data on the storage electrode Removing a predetermined thickness of the gate insulating film; Forming a protective film over the entire structure and exposing the drain electrode by a third mask process and simultaneously removing a predetermined thickness of the protective film over the storage electrode; And Forming a pixel electrode by forming a third conductive layer over the entire structure and then patterning the same by a fourth mask process to form a pixel electrode. The method of claim 4, wherein the gate insulating layer is formed to be 10% or more thinner than the gate electrode on the storage electrode. The method of claim 4, wherein the passivation layer is formed by stacking an inorganic passivation layer and an organic passivation layer. A thin film transistor including a gate insulating layer formed on the gate electrode and the storage electrode to have different thicknesses, a source electrode and a drain electrode spaced apart from the gate electrode, and a pixel electrode connected to the drain electrode and formed on the storage electrode; Board; A color filter substrate facing the thin film transistor substrate; And And a liquid crystal layer interposed between the thin film transistor substrate and the color filter substrate.

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