KR20080032351A - Thin film transistor substrate and method of manufacturing the same, and liquid crystal display having the same - Google Patents

Abstract

A TFT(Thin Film Transistor) substrate, a manufacturing method thereof, and an LCD(Liquid Crystal Display) having the same are provided to increase the capacity of a storage capacitor by increasing a surface area according as an upper part of a storage electrode is curved, thereby reducing the size of a capacitor and accordingly improving an aperture ratio as ensuring enough capacity. A gate electrode(122) is formed in a predetermined area on a substrate. An upper surface of a storage electrode(123) is curved. A gate insulating film(131) is formed on the gate electrode and the storage electrode. An active layer(132) is formed on the gate electrode. A source electrode(142) and a drain electrode(143) are formed on the active layer as being spaced from each other. An upper plate electrode(144) is formed on the storage electrode. A pixel electrode is connected with the drain electrode and the upper plate electrode.

Description

Thin film transistor substrate and method of manufacturing the same and a liquid crystal display having the same

1 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a cross-sectional view of a liquid crystal display according to an exemplary embodiment of the present invention.

3A to 3E are cross-sectional views of devices sequentially illustrated to explain a method of manufacturing a thin film transistor substrate according to an exemplary embodiment of the present invention.

4 is a plan view of a mask for flexibly forming a storage electrode according to the present invention.

5 (a) and 5 (b) are cross-sectional views of a thin film transistor substrate according to another embodiment of the present invention.

6 is an exploded perspective view of a liquid crystal display device having a thin film transistor substrate according to the present invention.

<Explanation of symbols for the main parts of the drawings>

121: gate line 122: gate electrode

123: storage electrode 124: storage capacitor line

131 gate insulating film 135 protective film

141: data line 142: source electrode

143: drain electrode 144: top plate electrode

151 pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate and a method of manufacturing the same, and more particularly, to a thin film transistor substrate and a method of manufacturing the same, which can increase the capacitance of a storage electrode and thereby improve the aperture ratio.

Liquid crystal display (LCD) is one of the flat panel display devices that are widely used at present, and is composed of a thin film transistor substrate having a pixel electrode, a color filter substrate having a common electrode, and a liquid crystal layer interposed therebetween. An image is displayed in a manner of controlling the amount of light transmitted through the liquid crystal layer by rearranging the liquid crystal molecules of the liquid crystal layer by applying a voltage to the pixel electrode and the common electrode.

In such a liquid crystal display, a storage capacitor is formed on the thin film transistor substrate to stably maintain the liquid crystal voltage applied to the liquid crystal positioned between the two substrates. To this end, a storage electrode is formed on the same surface as the gate line, a dielectric layer is formed on the storage electrode, and an upper plate electrode and a pixel electrode are formed on the storage electrode.

However, in order to increase the luminance of the liquid crystal display or to increase the response speed, the capacitance of the storage capacitor should be increased. The capacitance of the storage capacitor increases as the size of the plate electrode and the storage electrode of the capacitor increases. The thicker the thickness, the smaller it becomes. Therefore, the area of the storage electrode and the plate electrode of the storage capacitor is increased to increase the capacitance.

However, although the capacitance of the capacitor electrode can be increased by increasing the area of the capacitor electrode, there is a problem that the aperture ratio of the liquid crystal display device is reduced.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor substrate capable of improving the aperture ratio while maintaining the capacitance of the storage capacitor, a method of manufacturing the same, and a liquid crystal display device having the same.

Another object of the present invention is to form a storage electrode in a curved shape at the top to increase the surface area, thereby increasing the capacitance of the storage capacitor, thereby increasing the aperture ratio by an increase in capacitance, a manufacturing method thereof And to provide a liquid crystal display device having the same.

Another object of the present invention is to remove the passivation layer formed in a region other than the data line, thereby implementing a storage capacitor between the storage electrode and the pixel electrode, thereby increasing capacitance and increasing the aperture ratio as the capacitance is increased. The present invention provides a substrate, a method of manufacturing the same, and a liquid crystal display device having the same.

A thin film transistor substrate according to the present invention includes a gate electrode formed in a predetermined region on an upper surface of the substrate and a storage electrode formed to bend an upper surface thereof; A gate insulating layer formed on the gate electrode and the storage electrode; An active layer formed on the gate electrode; A source electrode and a drain electrode spaced apart from each other on the active layer, and an upper plate electrode formed on the storage electrode; And a pixel electrode connected to the drain electrode and formed to be connected to the upper plate electrode.

The storage electrode is formed to be curved by forming a plurality of grooves in a predetermined region of the upper portion.

According to one or more exemplary embodiments, a method of manufacturing a thin film transistor substrate includes forming a first conductive layer on a substrate and patterning the first conductive layer to form a gate line including a gate electrode and a storage line including a storage electrode; Curvedly patterning an upper portion of the storage electrode; Forming a gate insulating film and an active layer over the entire structure, and patterning the active layer to remain only on the gate electrode; Forming a second conductive layer over the entire structure and patterning the electrode to form a source electrode and a drain spaced apart from the gate electrode at a predetermined interval, and to form an upper plate electrode on the storage electrode; Forming a protective film over the entire structure and then patterning the semiconductor substrate to expose the drain electrode and simultaneously expose the drain plate electrode; And forming a pixel electrode by patterning the third conductive layer on the entire structure.

The storage electrode is bent to form a plurality of grooves having a predetermined width and depth thereon.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor substrate, including forming a first conductive layer on the substrate and patterning the same to form a gate line including a gate electrode and a storage line including a storage electrode; Forming a gate insulating film and an active layer over the entire structure, and patterning the active layer to remain only on the gate electrode; A second conductive layer is formed on the entire structure, and then patterned to form a data line in a direction perpendicular to the gate line, and to form a thin film transistor by forming a source electrode and a drain electrode, and an upper plate electrode on the storage electrode. Forming; Forming a passivation layer over the entire structure and patterning the remaining passivation layer to remain on the data line and a part of the thin film transistor, and to remove the passivation layer in the remaining region except for this; And forming a pixel electrode by patterning the third conductive layer on the entire structure.

The storage line is formed in a vertical and horizontal direction with the gate line, and the storage line formed in the horizontal direction with the gate line overlaps the data line.

Side portions of the pixel electrode and the storage line form a storage capacitor.

According to an exemplary embodiment of the present invention, a liquid crystal display including a thin film transistor substrate includes a storage electrode having a gate electrode and an upper portion thereof curved, a gate insulating layer formed on the gate electrode and the storage electrode, a source electrode spaced apart from the gate electrode, A thin film transistor substrate including a drain electrode, an upper plate electrode formed on the storage electrode, and a pixel electrode connected to the drain electrode and the upper plate electrode; A color filter substrate facing the thin film transistor substrate; And a liquid crystal layer interposed between the thin film transistor substrate and the color filter substrate.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along line II ′.

1 and 2, the liquid crystal display panel 300 includes a thin film transistor substrate 100 and a color filter substrate 200 facing each other, and a liquid crystal layer (not shown) disposed therebetween.

The thin film transistor substrate 100 includes a plurality of gate lines 121 extending in one direction on the first insulating substrate 111, a plurality of data lines 141 intersecting the gate lines 121, and a gate line ( The pixel electrode 151 formed in the pixel region defined by the 121 and the data line 141, the thin film transistor 125 connected to the gate line 121, the data line 141 and the pixel electrode 151, It is formed in parallel with the gate line 121, and includes a storage line 123 including a storage electrode 123.

The gate line 121 mainly extends in the horizontal direction, and a portion of the gate line 121 protrudes up and down to form the gate electrode 122.

The storage line 124 is formed in a direction parallel to the gate line 121 and in a direction perpendicular to the gate line 121, and includes a storage electrode 123. In addition, the storage line 124 formed in a direction perpendicular to the gate line 121 is formed to overlap the data line 141. The storage electrode 123 is formed to have a predetermined curvature to increase the surface area, and the storage electrode 123 is formed when the data line 141 is formed with the gate insulating layer 131 interposed therebetween. The upper plate electrode 144 and the pixel electrode 151 connected to each other form a storage capacitor.

The data line 141 mainly extends in a vertical direction, and a part of the data line 141 protrudes to form a source electrode 142. When the data line 141 is formed, the data line 141 is spaced apart from the data line 141 by a predetermined interval and is the upper plate electrode 144. ) Is formed, and the upper plate electrode 144 is formed to partially overlap the storage line 124.

In addition, the gate line 121 and the storage line 124 is preferably formed of at least one metal of Al, Nd, Ag, Cr, Ti, Ta, and Mo or an alloy containing them. In addition, the gate line 121 and the storage line 124 may be formed of a multilayer of a plurality of metal layers as well as a single layer. That is, it may be formed of a double layer including a metal layer such as Cr, Ti, Ta, Mo, etc. having excellent physicochemical properties and an Al-based or Ag-based metal layer having a low specific resistance. In addition, the data line 121, the source electrode 142, and the drain electrode 143 may also be formed of the above-described metal, or may be formed of multiple layers.

The thin film transistor 125 allows the pixel signal supplied to the data line 141 to be charged in the pixel electrode 151 in response to the signal supplied to the gate line 121. Accordingly, the thin film transistor 125 includes a gate electrode 122 connected to the gate line 121, a source electrode 142 connected to the data line 141, and a drain electrode 143 connected to the pixel electrode 151. ), A gate insulating layer 131 and an active layer 132 sequentially formed between the gate electrode 122, the source electrode 142, and the drain electrode 143, and an ohmic contact layer formed on at least a portion of the active layer 132 ( 133). In this case, the ohmic contact layer 133 may be formed on the active layer 132 except for the channel part.

The passivation layer 134 is formed on the thin film transistor 125. The passivation layer 134 may be formed of an inorganic material such as silicon nitride or silicon oxide, or may be formed of a low dielectric constant organic insulating layer. Of course, it may be formed of a double film of an inorganic insulating film and an organic insulating film.

The pixel electrode 151 is formed on the passivation layer 134 and is connected to the drain electrode 143 through the first contact hole 161 and is connected through the upper plate electrode 144 and the second contact hole 162. have. In addition, the pixel electrode 151 has a cutout pattern 152 as domain restricting means for adjusting the alignment direction of the liquid crystal. In addition, the pixel electrode 151 may include protrusions instead of the incision pattern 152 as domain regulating means for alignment of liquid crystal molecules. The cutting pattern 152 of the pixel electrode 151 is formed to divide the liquid crystal layer 260 into a plurality of domains together with the cutting pattern 252 of the common electrode 251 which will be described later.

The color filter substrate 200 may include a common electrode having a black matrix 221, a color filter 231, an overcoat layer 241, and a cutout pattern 252 on the second insulating substrate 211. 251).

The black matrix 221 is formed in the thin film transistor region to prevent light leakage from an area other than the pixel region and optical interference between adjacent pixel regions. That is, the black matrix 221 has an opening that opens an area of the pixel electrode 151 of the thin film transistor substrate 100.

The color filter 231 is formed by repeating the red, green, and blue filters on the black matrix 221. The color filter 231 serves to impart color to light emitted from the light source and passed through the liquid crystal layer 260. The color filter 231 is formed of a photosensitive organic material.

The overcoat film 241 is formed on the black matrix 221 not covered by the color filter 231 and the color filter 231. The overcoat layer 241 serves to protect the color filter 231 while planarizing the color filter 231 and is formed using an acrylic epoxy material.

The common electrode 251 is formed on the overcoat layer 241. The common electrode 251 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The common electrode 251 directly applies a voltage to the liquid crystal layer 260 together with the pixel electrode 151 of the thin film transistor substrate. A cutting pattern 252 is formed on the common electrode 251. The common electrode cut pattern 252 divides the liquid crystal layer 260 into a plurality of domains along with the pixel electrode cut pattern 152 of the pixel electrode 151.

The pixel electrode cut pattern 152 and the common electrode cut pattern 252 may be formed in various shapes. For example, both the pixel electrode cutting pattern 152 and the common electrode cutting pattern 252 may be formed diagonally and orthogonally to each other.

In addition, a liquid crystal layer (not shown) is positioned between the thin film transistor substrate 100 and the color filter substrate 200. The liquid crystal molecules forming the liquid crystal layer (not shown) are vertical in the length direction when no voltage is applied. When voltage is applied, the liquid crystal molecules lie perpendicular to the electric field because the dielectric anisotropy is negative. However, when the pixel electrode incision pattern 152 and the common electrode incision pattern 252 are not formed, the liquid crystal molecules are arranged randomly in various directions because the azimuth angle of the lying down is not determined, and the foreground lines are disclination at different boundary surfaces. line). The pixel electrode cut pattern 152 and the common electrode cut pattern 252 form a fringe field when a voltage is applied to the liquid crystal layer 260 to determine the azimuth angle of the liquid crystal alignment. In addition, the liquid crystal layer 260 is divided into multiple regions according to the arrangement of the pixel electrode cutting pattern 152 and the common electrode cutting pattern 252.

3A to 3E are cross-sectional views of devices sequentially illustrated to explain a method of manufacturing a thin film transistor substrate according to an exemplary embodiment.

Referring to FIG. 3A, after forming a first conductive layer on an insulating substrate 111 made of glass, quartz, ceramic, or plastic, the first conductive layer is patterned by a photo-etching process using a first mask. . As a result, the gate line 121 including the gate electrode 122 and the storage line 124 including the storage electrode 123 are formed. The first conductive film is formed by a deposition method such as a CVD method, a PVD method, or a sputtering method, and the first conductive film is Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al ( It is preferable to use at least one of Nd) and Cr / Al (Nd). The storage electrode 123 is patterned such that an upper portion of the storage electrode 123 has a curved shape. To this end, as shown in FIG. 4, the upper portion of the storage electrode 123 is etched to a predetermined depth by a photolithography and an etching process using the second mask 10 in which light transmitting parts 20 having a predetermined size are arranged at regular intervals. Accordingly, the storage electrode 123 has a curved shape in which a portion corresponding to the light transmitting part 20 of the second mask 10 is etched to a predetermined depth. Accordingly, the storage electrode 123 has a larger surface area than the planar structure at the same area. On the other hand, the second mask 10 is formed in a circular shape, the light emitting portion 20 is formed at equal intervals, but is not limited to this can be a variety of forms and increase the surface area of the storage electrode 123 even if not formed at equal intervals Various forms are possible.

Referring to FIG. 3B, the gate insulating layer 131, the active layer 132, and the ohmic contact layer 133 are sequentially formed on the entire structure. Here, the gate insulating film 131 is formed using a PECVD method or a sputtering method. In this case, the gate insulating film 131 is preferably formed using an inorganic insulating film including a silicon oxide film or a silicon nitride film. The active layer 132 and the ohmic contact layer 133 are sequentially formed on the gate insulating layer 131 using the deposition method. An amorphous silicon layer is used as the active layer 132, and an amorphous silicon layer doped with a high concentration of silicide or N-type impurities is used as the ohmic contact layer 133. The active layer 132 and the ohmic contact layer 133 may be patterned to overlap the gate electrode 122 on the gate electrode 122 by a photolithography and an etching process using a third mask.

Referring to FIG. 3C, after forming the second conductive layer on the entire structure, the second conductive layer is patterned by a photolithography and etching process using a fourth mask to form the source electrode 142 and the drain electrode 143. At the same time, the upper plate electrode 144 is formed on the storage electrode 123. In this case, the source electrode 142 and the drain electrode 143 are formed to be spaced apart from the gate electrode 122 by a predetermined interval, and this portion becomes a channel region. In addition, the ohmic contact layer 133 is removed from the channel region, and the active layer 132 is partially etched. On the other hand, since the upper portion of the storage electrode 123 is formed to be bent, the upper plate electrode 144 formed on the upper portion of the storage electrode 123 also has a bend. Here, it is preferable to use at least one metal single layer or multiple layers of Mo, Al, Cr and Ti as the second conductive film. In addition, the same material as that of the first conductive film may be used for the second conductive film.

Referring to FIG. 3 (d), a protective film 134 is formed on the entire structure. The protective film 134 may be formed using an organic insulating film, or may be formed by stacking an inorganic insulating film and an organic insulating film. BCB (Benzocyclobutane), acryl resin, etc. are used as an organic insulating film, and a silicon oxide film, a silicon nitride film, etc. are used as an inorganic insulating film. The first contact hole 161 exposing a part of the drain electrode 143 and the second contact hole 162 exposing a part of the upper plate electrode 144 are formed by a photolithography and an etching process using a fifth mask. do. In this case, a contact pad (not shown) exposing a gate pad (not shown) which is an end of the gate line 121 and a data pad (not shown) which is an end of the data line 410 may be formed at the same time.

Referring to FIG. 3E, a pixel electrode 151 having a predetermined cutting pattern 152 formed by forming a third conductive layer on the entire structure and then patterning the third conductive layer by a photolithography and an etching process using a sixth mask. ). The pixel electrode 151 is connected through the drain electrode 143 and the first contact hole 161, and is connected through the upper plate electrode 144 and the second contact hole 162. In addition, the pixel electrode 151 is formed and a gate pad (not shown) and a data pad (not shown) are formed. Here, it is preferable to use a transparent conductive film containing indium tin oxide (ITO) or indium zinc oxide (IZO) as the third conductive film.

As described above, the storage electrode 123 is formed to have a curved upper portion, thereby increasing the surface area of the storage electrode 123, and also forming the gate insulating layer 131 and the upper plate electrode 144 formed on the storage electrode 123. ) Also increase the surface area, which can increase the capacitance of the storage capacitor. For example, if the horizontal and vertical lengths of the storage electrode 123 are 35 μm and 30 μm, respectively, the planar surface may have a surface area of 1050 μm ² . However, if the radius and depth of the grooves are 3 μm and 0.3 μm, respectively, and 30 grooves are formed, the area of 175 μm ² is further increased by the product of the depth of the groove, the perimeter of the groove, and the number of grooves. Thus, the surface area of about 17% is increased. Accordingly, when the same capacitance is required, the surface area is increased by about 17%, thereby reducing the size of the storage electrode 123 and increasing the aperture ratio.

5 (a) and 5 (b) are cross-sectional views of a thin film transistor substrate according to another exemplary embodiment of the present invention, and FIG. 5 (a) illustrates the line II ′ of FIG. 1 according to another exemplary embodiment of the present invention. 5 (b) is a cross-sectional view taken along the line II-II 'of FIG. 1 according to another embodiment of the present invention.

1, 5 (a) and 5 (b), the storage line 124 is formed in parallel with the gate line 121, and the storage line 124 also in a direction perpendicular to the gate line 121. ) Is formed. In this case, the storage line 124 formed in a direction perpendicular to the gate line 121 is formed to be spaced apart from the gate line 121. In addition, after the gate insulating layer 131 is formed on the entire structure, the data line 141 is formed to overlap the storage line 124 formed in a direction perpendicular to the gate line 121. After the passivation layer 131 is formed over the entire structure, the passivation layer 131 remains only on the thin film transistor 151 and the data line 141, and the passivation layer 131 in the remaining region is removed. Then, the pixel electrode 151 is formed. In this manner, the storage capacitor is implemented with the side of the pixel electrode 151 and the storage line 124 interposed between the gate insulating layer 131.

Meanwhile, another embodiment may be implemented by combining the storage electrode 123 with the upper portion curved and removing the protective layer 134 formed in a region other than the region in which the structure is formed.

6 is an exploded perspective view of a liquid crystal display device including a liquid crystal display panel according to the present invention.

Referring to FIG. 6, a liquid crystal display including a liquid crystal display panel according to the present invention includes a liquid crystal display panel 1300, a backlight unit 2000 including a light source 1020 and a light guide plate 1000, and a backlight unit ( A mold frame 1100 for accommodating 1200, and an upper chassis 1400 for enclosing a predetermined region and a side portion of the liquid crystal display panel 1300 and the backlight unit 1200 are included.

The liquid crystal display panel 1300 includes a thin film transistor substrate 1310 having a gate driver formed in a predetermined region, a color filter substrate 1320 facing the thin film transistor substrate 1310, a thin film transistor substrate 1310, and a color filter. It includes a liquid crystal layer (not shown) injected between the substrate 1320. In addition, the display device may further include a polarizer (not shown) formed corresponding to the upper portion of the color filter substrate 1320 and the lower portion of the thin film transistor substrate 1310.

Here, the color filter substrate 1320 is a substrate in which RGB pixels, which are color pixels in which a predetermined color is expressed while light passes, are formed by a thin film process. On the opposite surface of the color filter substrate 1320, a common electrode (not shown) made of a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO), which is a transparent conductive thin film, is formed have.

The thin film transistor substrate 1310 is a transparent glass substrate in which a thin film transistor (TFT) and a pixel electrode are formed in a matrix form. The data line is connected to the source terminal of the thin film transistors, and the gate line is connected to the gate terminal. In addition, a pixel electrode (not shown) made of a transparent electrode made of a transparent conductive material is connected to the drain terminal. When the electrical signals are input to the data lines and the gate lines, the respective thin film transistors are turned on or turned off, and electrical signals necessary for pixel formation are applied to the drain terminals.

That is, as described above, when power is applied to the gate terminal and the source terminal of the thin film transistor substrate 1310 and the thin film transistor is turned on, an electric field is formed between the pixel electrode and the cavity electrode of the color filter substrate 1320. Due to such an electric field, an arrangement of liquid crystals injected between the thin film transistor substrate 1310 and the color filter substrate 1320 is changed, and light transmittance is changed according to the changed arrangement to obtain a desired image.

The backlight unit is installed under the light guide 1020 that generates light, the light guide plate 1000 that guides the light generated by the light source 1020 to the liquid crystal display panel, and the light guide plate 1000 and leaks from the bottom surface of the light guide plate 1000. A reflection sheet 1050 reflecting the light emitted, a diffusion sheet 1210 installed on the light guide plate 1000 to uniformly diffuse the light emitted through the light guide plate 1000, and an upper portion of the diffusion sheet 1210. And first and second prism sheets 1220 and 1230 for condensing light diffused from the diffusion sheet 1210. A protective sheet (not shown) may be further formed on the second prism sheet 1230. The lower chassis 400 may further include a backlight unit 2000.

The mold frame 1100 is formed in a rectangular frame shape and includes a planar portion and sidewall portions bent at right angles therefrom. The mounting part may be formed on the flat part so that the liquid crystal display panel 1300 may be mounted. The seating part may use a fixing protrusion for contacting and aligning the edge side surfaces of the liquid crystal display panel 1300, respectively, or may be formed using a predetermined stepped step surface. Components of the backlight unit are fixed between the mold frame 1300 and the lower chassis 400.

The upper chassis 1400 is configured in the form of a rectangular window frame having a flat portion and sidewall portions bent at right angles therefrom. The planar portion of the upper chassis 1400 supports a portion of an edge of the liquid crystal display panel 1300 at a lower portion thereof, and the sidewall portion is coupled to face the sidewalls of the lower chassis 400.

As described above, according to the present invention, the storage electrode may be formed in a curved shape at the top thereof to increase the surface area, and accordingly, the capacitance of the storage capacitor may be increased, thereby reducing the size of the storage capacitor. The aperture ratio can be improved while securing the capacity.

In addition, the present invention can increase the capacitance by implementing a storage capacitor between the side of the storage electrode and the pixel electrode can reduce the size of the storage capacitor can improve the aperture ratio while ensuring sufficient capacitance.

Claims (8)

A gate electrode formed on a predetermined region of the substrate and a storage electrode having a curved upper surface; A gate insulating layer formed on the gate electrode and the storage electrode; An active layer formed on the gate electrode; A source electrode and a drain electrode spaced apart from each other on the active layer, and an upper plate electrode formed on the storage electrode; And And a pixel electrode connected to the drain electrode and formed to be connected to the upper plate electrode. The thin film transistor substrate of claim 1, wherein the storage electrode is formed to be curved by forming a plurality of grooves in an upper portion of the storage electrode. Forming a first conductive layer on the substrate and patterning the first conductive layer to form a gate line including the gate electrode and a storage line including the storage electrode; Curvedly patterning an upper portion of the storage electrode; Forming a gate insulating film and an active layer over the entire structure, and patterning the active layer to remain only on the gate electrode; Forming a second conductive layer over the entire structure and patterning the electrode to form a source electrode and a drain spaced apart from the gate electrode at a predetermined interval, and to form an upper plate electrode on the storage electrode; Forming a protective film over the entire structure and then patterning the semiconductor substrate to expose the drain electrode and simultaneously expose the drain plate electrode; And Forming a pixel electrode by forming a third conductive layer over the entire structure and then patterning the third conductive layer. The method of claim 3, wherein the storage electrode is curved to form a plurality of grooves having a predetermined width and depth thereon. Forming a first conductive layer on the substrate and patterning the first conductive layer to form a gate line including the gate electrode and a storage line including the storage electrode; Forming a gate insulating film and an active layer over the entire structure, and patterning the active layer to remain only on the gate electrode; A second conductive film is formed on the entire structure, and then patterned to form a data line in a direction perpendicular to the gate line, a source electrode and a drain to form a thin film transistor, and an upper plate electrode on the storage electrode. Forming a; Forming a passivation layer over the entire structure and patterning the remaining passivation layer to remain on the data line and a part of the thin film transistor, and to remove the passivation layer in the remaining region except for this; And Forming a pixel electrode by forming a third conductive layer over the entire structure and then patterning the third conductive layer. The method of claim 5, wherein the storage line is formed in a direction perpendicular to and horizontal to the gate line, and the storage line formed in a direction parallel to the gate line overlaps the data line. The method of claim 5, wherein the side of the pixel electrode and the storage line form a storage capacitor. A storage electrode formed by bending a gate electrode and an upper portion thereof, a gate insulating layer formed on the gate electrode and the storage electrode, a source electrode and a drain electrode spaced apart from the gate electrode, an upper plate electrode formed on the storage electrode, A thin film transistor substrate including a pixel electrode connected to the drain electrode and the upper plate electrode; A color filter substrate facing the thin film transistor substrate; And And a liquid crystal layer interposed between the thin film transistor substrate and the color filter substrate.

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