KR101424272B1 - Organic Light Emitting Display and Manufacturing Method for the same - Google Patents

Abstract

The present invention relates to an organic light emitting display comprising a switching transistor located in a first region defined on a substrate, a capacitor located in a second region, and a sub-pixel including a driving transistor and an organic light emitting diode located in a third region, The transistor includes a first electrode located at the center of the third region, a semiconductor layer which is in contact with the first electrode at one side and surrounds the first electrode, a semiconductor layer which is in contact with the other side of the semiconductor layer, An insulating layer disposed on the first electrode, the semiconductor layer, and the second electrode; and a gate positioned over the insulating layer so as to cover the semiconductor layer.

Organic electroluminescent display device, gate, inverted

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting display,

The present invention relates to an organic light emitting display and a method of manufacturing the same.

Recently, the importance of flat panel display (FPD) has been increasing with the development of multimedia. In response to this, a liquid crystal display (LCD), a plasma display panel (PDP), a field emission display (FED), an organic light emitting display Various flat panel display devices have been put into practical use.

Particularly, the organic light emitting display device has a high response speed, low power consumption and self-emission characteristics. Further, since the organic electroluminescent display device has no problem in viewing angle, it is advantageous as a moving picture display medium regardless of its size. In addition, the organic light emitting display device can be manufactured at low temperature and can be manufactured simply using existing semiconductor process technology, and thus it is attracting attention as a next generation flat panel display device.

Meanwhile, in a conventional inverted organic light emitting display device, the cathode of the organic light emitting diode is formed on the driving transistor, and the cathode potential and the drain potential of the driving transistor are the same.

In such a structure, a field effect is applied to the semiconductor layer region of the driving transistor by the light incident from the outside, and the output saturation characteristic of the driving transistor is degraded. do.

SUMMARY OF THE INVENTION An object of the present invention is to solve the problem of degradation of output saturation characteristics of a top emission type inverted organic light emitting display.

According to a first aspect of the present invention, there is provided an organic light emitting display comprising a switching transistor located in a first region defined on a substrate, a capacitor located in a second region, a driving transistor located in a third region, And the driving transistor includes a first electrode positioned at the center of the third region, a semiconductor layer having one side contacting the first electrode and positioned in a band shape so as to surround the first electrode, An organic light emitting diode (OLED) display device including a first electrode, an insulating layer disposed on an upper portion of a semiconductor layer and a second electrode, and a gate positioned over the insulating layer to cover the semiconductor layer, to provide.

The first electrode of the driving transistor may be in the form of a rectangle.

The sub-pixel further includes a protective film located on the gate and a planarizing film located on the protective film, wherein the insulating film, the protective film, and the planarizing film include a first contact hole patterned to expose the first electrode in the central region of the third region .

The gate of the driving transistor may be positioned below the region located in the central region of the semiconductor layer than in the region located in the outer region of the semiconductor layer.

The organic light emitting diode includes a cathode connected to the first electrode of the driving transistor located on the planarization film and exposed through the first contact hole, an organic light emitting layer positioned on the cathode, And may include a connected anode.

The cathode of the organic light emitting diode may be positioned to cover the first electrode, the semiconductor layer, and the second electrode of the driving transistor on the planarization film.

The switching transistor includes a first electrode connected to a data line disposed on a substrate, a second electrode surrounded by the first electrode, and an insulating film disposed to cover the first electrode and the second electrode, And a gate coupled to the scan line.

The capacitor includes an insulating film which is extended to the second electrode of the switching transistor and is connected to the gate of the driving transistor, an insulating film which is disposed to cover one end, an insulating film which is connected to the second power supply wiring, . ≪ / RTI >

On the other hand, in another aspect, the present invention provides a method comprising: defining a first region, a second region and a third region in subpixels located on a substrate; And forming a switching transistor in the first region, forming a capacitor in the second region, and forming a driving transistor in the third region, wherein the driving transistor includes a first electrode having a rectangular shape located at the center of the third region, A semiconductor layer which is in contact with the first electrode and is disposed in a rectangular band shape so as to surround the first electrode, a second electrode which is in contact with the other side of the semiconductor layer and is separated from the first electrode, And an insulating layer located above the second electrode, and a gate positioned over the insulating layer to cover the semiconductor layer.

The gate of the driving transistor may be positioned below the region located in the central region of the semiconductor layer than in the region located in the outer region of the semiconductor layer.

The present invention has the effect of preventing the output saturation characteristic of the top emission type inverted organic light emitting display device from deteriorating. Further, there is an effect that the number of masks used in manufacturing the inverted organic light emitting display device of the top emission type can be reduced.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic plan view of an organic light emitting display according to an embodiment of the present invention.

As shown in FIG. 1, the organic light emitting display may include a display unit 120 on which a plurality of subpixels P are disposed. The plurality of subpixels P located on the substrate 110 are vulnerable to moisture or oxygen.

Thus, the substrate 110 and the sealing substrate 130 can be sealed by providing the sealing substrate 130 and forming the adhesive member 140 on the outer substrate 110 of the display unit 120. On the other hand, the plurality of sub-pixels P may be driven by the driving unit 150 positioned on the substrate 110 to display an image.

The driving unit 150 may include a scan driver for supplying a scan signal to a plurality of subpixels P and a data driver for supplying a data signal to a plurality of subpixels P. [

The scan driver and the data driver may be separately disposed outside the substrate 110 or the substrate 110. The scan driver may include a scan driver and a data driver, have.

Hereinafter, the circuit configuration of the subpixel P shown in FIG. 1 will be described.

2 is a diagram illustrating a circuit configuration of a subpixel.

As shown in FIG. 2, the sub-pixel may include a switching transistor S1 having a gate connected to the scan line SCAN and a first electrode connected to the data line. The driving transistor Tl may include a gate connected to the second electrode of the switching transistor S1 and a second electrode connected to the second power supply line VSS. And may include a capacitor Cst having one end connected to the gate of the driving transistor T1 and the other end connected to the second power supply line VSS. The organic light emitting diode D may include an anode connected to the first power supply line VDD and a cathode connected to the first electrode of the driving transistor Tl.

Here, the switching transistor S1 and the driving transistor T1 included in the sub-pixel are shown as N-type in order to explain one example of the embodiment, but the present invention is not limited thereto.

On the other hand, in the sub-pixel circuit configuration, the first electrode of the driving transistor Tl and the cathode of the organic light emitting diode D may be electrically connected through the first contact hole Contact1.

Accordingly, the organic light emitting diode D included in the organic light emitting display according to an exemplary embodiment of the present invention may have an inverted structure in which the cathode is located at the lower portion and the anode is located at the upper portion.

Hereinafter, the structure of a subpixel will be described by adding a top view and a sectional view of the subpixel based on the circuit configuration of the subpixel.

FIG. 3A is a plan view of a subpixel, FIG. 3B is a sectional view taken along line A-A in FIG. 3A, FIG. 4A is a plan view of a subpixel, and FIG. 4B is a sectional view taken along line B-B in FIG.

Prior to the description, the drawings shown in FIGS. 3A to 4B show a cross-sectional view of some regions for the sake of convenience of explanation, and a structure for covering structures located below, such as a second power supply line VSS and a scan line SCAN, Or omitted.

Referring to FIG. 3A, a subpixel Pixel may include a switching transistor located in a first region (Area 1) defined on a substrate (not shown). It may also include a capacitor located in the second area (Area 2). In addition, it may include a driving transistor and an organic light emitting diode located in the third region (Area 3).

As described with reference to FIG. 2, the switching transistor located in the first region (Area 1) includes a first electrode connected at one end to the data line (DATA), a second electrode surrounded by the third electrode at the first electrode, An insulating film positioned to cover the electrode and the second electrode, and a gate positioned on the insulating film and connected to the scan line SCAN.

The capacitor located in the second region (Area 2) includes one end connected to the second electrode of the switching transistor and connected to the gate of the driving transistor as described with reference to FIG. 2, an insulating film positioned to cover one end, And the other end connected to the second power supply line and connected to the second electrode of the driving transistor. Here, one end connected to the gate of the driving transistor may be electrically connected to each other through the second contact hole (Contact 2) located in the fourth region (Area 4) as shown in FIG.

The driving transistor located in the third region (Area3) includes a first electrode located at the center as described with reference to Fig. 2, a second electrode connected to the other end of the second power supply wiring and the capacitor, and a second electrode connected to one end of the capacitor And may include a gate positioned above the first electrode and the second electrode. Here, the second electrode of the driving transistor and the other end of the capacitor may be electrically connected to each other through the third contact hole (Contact 3) located in the fourth region (Area 4) as shown in FIG.

On the other hand, although not shown in the upper portion of the driving transistor located in the third region (Area 3), the organic light emitting diode may be located. A description thereof will be described in more detail with reference to FIG. 3B.

Referring to FIG. 3B, the driving transistor located in the third region (Area 3) includes a first electrode 113b positioned at the center of a third region (Area 3) located on the substrate 110 as shown in FIG. 3B, . ≪ / RTI > The semiconductor layer 111 may include a semiconductor layer 111 that is in contact with the first electrode 113b and is disposed in a strip shape so as to surround the first electrode 113b. And may include a second electrode 113a contacting the other side of the semiconductor layer 111 and spaced apart from the first electrode 113b. The insulating layer 114 may include an upper portion of the first electrode 113b, the semiconductor layer 111, and the second electrode 113a. In addition, it may include a gate 115 positioned to cover the semiconductor layer 111 on the insulating film 114.

Next, the organic light emitting diode located in the third region (Area 3) is connected to the cathode (cathode) connected to the first electrode 115 of the driving transistor, which is located on the planarization film 116 b and exposed through the first contact hole 117). Further, it may include the organic light emitting layers 118a, 118b, and 118c located on the cathode 117. [ And may include an anode 119 located on the organic light emitting layers 118a, 118b, 118c and connected to a first power supply line (not shown).

Here, the first electrode 113b of the driving transistor may be in a rectangular shape as shown in Fig. 3A. Accordingly, the semiconductor layer 111 and the second electrode 113a, which are in contact with the first electrode 113b on one side, may also be formed in a rectangular shape. 3B, which is the A-A region in FIG. 3A, the regions GA1 and GA2 occupied by the gate 115 of the driving transistor may be formed to cover all the semiconductor layers 111. [

Here, the gate 115 of the driving transistor may be located below the region located in the central region of the semiconductor layer 111 and below the region located in the outer region of the semiconductor layer 111. [ The gate 115 of the driving transistor includes a first impurity region 112b in contact with the semiconductor layer 111 and the first electrode 113b and a second impurity region 112b in contact with the semiconductor layer 111 and the second electrode 113a The second impurity region 112a may be formed to have a central region located below the outer region.

Here, FIG. 3B is a sectional view of the AA region, which is a partial region, to help a structural understanding of the driving transistor and the organic light emitting diode. However, the subpixel shown in FIG. 3A includes a gate 115 And a planarizing film 116b located on the protective film 116a.

On the other hand, FIG. 4B is a cross-sectional view taken along line B-B of FIG. 4A with reference to a first contact hole (Contact 1) of a third region (Area 3).

4B, the sub pixel includes a protective film 116a located on the gate 115 and a planarization film 116b located on the protective film 116a, and the insulating film 114, the protective film 116a, And the planarization layer 116b may include a first contact hole Contact 1 patterned to expose the first electrode 113b in the central region of the third region A13.

As described above, the first contact hole (Contact 1) may be formed to electrically connect the first electrode 113b of the driving transistor and the cathode 117 of the organic light emitting diode.

As a result, the organic light emitting diode located in the third region (Area 3) is located on the planarization film 116b as shown in FIG. 3B, and is electrically connected to the first electrode of the driving transistor exposed through the first contact hole A cathode 117 connected to the organic light emitting layer 113b and the organic light emitting layers 118a, 118b and 118c located on the cathode 117 and the organic light emitting layers 118a, 118b and 118c, And an anode 119 connected to the anode (not shown).

3A and 4A, the cathode 117 of the organic light emitting diode described above is electrically connected to the first electrode 113b, the semiconductor layer 111, and the second electrode (not shown) of the driving transistor on the planarization layer 116b 113a, respectively.

Hereinafter, the structure of the organic light emitting layer shown in FIG. 4B will be described in more detail.

118a included in the organic light emitting layers 118a, 118b and 118c may be a lower common layer, 118b may be an emission layer, and 118c may be an upper common layer.

Here, the lower common layer 118a may include an electron injection layer and an electron transport layer, and the upper common layer 118c may include a hole injection layer and a hole transport layer.

The electron injection layer included in the lower common layer 118a functions to smooth the injection of electrons and may use Alq3 (tris (8-hydroxyquinolino) aluminum), PBD, TAZ, spiro-PBD, BAlq or SAlq But is not limited thereto.

The electron injection layer can be formed by vacuum evaporation of organic and inorganic materials constituting the electron injection layer.

The electron transport layer included in the lower common layer 118a functions to smooth the transport of electrons and is selected from the group consisting of Alq3 (tris (8-hydroxyquinolino) aluminum), PBD, TAZ, spiro-PBD, BAlq and SAlq But it is not limited thereto.

The electron transporting layer can be formed by an evaporation method or a spin coating method. Such an electron transporting layer can also prevent holes injected from the cathode 117 from passing through the light emitting layer 118b and moving to the anode 119. [ That is, it may serve as a hole blocking layer and may serve to efficiently combine holes and electrons in the light emitting layer.

The hole injection layer included in the upper common layer 118c may function to smooth the injection of holes from the anode 119 to the light emitting layer 118b and may be formed of CuPc (cupper phthalocyanine), PEDOT (poly (3,4) but is not limited to, at least one selected from the group consisting of N-methylenedioxythiophene, PANI (polyaniline), and NPD (N, N-dinaphthyl-N, N'-diphenyl benzidine).

The hole injection layer described above can be formed by evaporation or spin coating, but is not limited thereto.

The hole transport layer included in the upper common layer 118c plays a role of facilitating the transport of holes and can be formed by using NPD (N, N-dinaphthyl-N, N'-diphenyl benzidine), TPD (N, 3-methylphenyl-N, N'-bis- (phenyl) -benzidine), s-TAD and MTDATA (4,4 ' But the present invention is not limited thereto.

The hole transporting layer can be formed by evaporation or spin coating, but is not limited thereto.

As described above, the hole injection layer or the electron injection layer may further include an inorganic material, and the inorganic material may further include a metal compound. The metal compound may include an alkali metal or an alkaline earth metal. Metal compound including an alkali metal or alkaline earth metal LiQ, LiF, NaF, KF, RbF, CsF, FrF, BeF 2, MgF 2, CaF 2, SrF 2, BaF any one selected from the group consisting of ₂ and RaF ₂ or more But is not limited thereto.

The inorganic material included in the electron injection layer facilitates hopping of electrons injected from the cathode into the light emitting layer 118b and improves the luminous efficiency by balancing the holes and electrons injected into the light emitting layer 118b .

The inorganic material in the hole injection layer reduces the mobility of holes injected from the anode into the light emitting layer 118b, thereby balancing the holes and electrons injected into the light emitting layer 118b, thereby improving the luminous efficiency.

The light emitting layer 118b may be formed of a material emitting red, green, blue, and white light, and may be formed using phosphorescent or fluorescent materials.

When the light-emitting layer 118b is red, it includes a host material including carbazole biphenyl (CBP) or mCP (1,3-bis (carbazol-9-yl)) and bis (1-phenylisoquinoline) acetylacetonate wherein the dopant comprises at least one selected from the group consisting of iridium, iridium, PQIr (acac) (bis (1-phenylquinoline) acetylacetonate iridium), PQIr (tris (1-phenylquinoline) iridium) and PtOEP (octaethylporphyrin platinum) Or PBD: Eu (DBM) 3 (Phen) or Perylene. However, the present invention is not limited thereto.

When the light emitting layer 118b is green, it may be made of a phosphorescent material including a dopant material including a host material including CBP or mCP and containing Ir (ppy) 3 (fac tris (2-phenylpyridine) iridium) Alternatively, it may be made of a fluorescent material including Alq3 (tris (8-hydroxyquinolino) aluminum), but is not limited thereto.

When the light emitting layer 118b is blue, it may comprise a host material including CBP or mCP and a phosphorescent material including a dopant material including (4,6-F2ppy) 2Irpic.

Alternatively, the fluorescent material may include any one selected from the group consisting of spiro-DPVBi, spiro-6P, distyrylbenzene (DSB), distyrylarylene (DSA), PFO polymer, and PPV polymer. It is not limited.

The structure of the organic emission layer is not limited to that shown in FIG. 4B, and at least one of the electron injection layer, the electron transport layer, the hole transport layer, and the hole injection layer included in the lower common layer 118a and the upper common layer 118c may be omitted It is possible.

Hereinafter, a method of manufacturing an organic light emitting display device according to an embodiment of the present invention will be described. However, in order to improve the ease of explanation, the cross-sectional view taken along the line B-B of FIG. 4A will be mainly described, but the same reference will be made to FIGS. 3A to 4A together with the description.

5A to 5C are schematic process diagrams illustrating a method of manufacturing an organic light emitting display according to an exemplary embodiment of the present invention.

3A and FIG. 4A, a method of manufacturing an organic light emitting display according to an embodiment of the present invention includes forming a first region (Area 1) in a subpixel located on a substrate 110, 2 area (Area 2) and a third area (Area 3).

Thereafter, a switching transistor is formed in the first region (Area 1). A capacitor is formed in the second area (Area 2). A driving transistor is formed in the third region (Area 3).

However, the step of forming the switching transistor, the capacitor, and the driving transistor may be divided into the first area Area 1, the second area Area 2, and the third area A 3, Therefore, the following description will be given to the process of the driving transistor portion in a form in which the description is added.

As shown in FIG. 5A, a substrate 110 is prepared. The substrate 110 may be made of glass, plastic, metal, or the like. Although not shown, a buffer layer may be disposed on the substrate 110.

A semiconductor layer 111 is formed in a strip shape on a substrate 110. The semiconductor layer 111 may include amorphous silicon or crystallized polycrystalline silicon. The semiconductor layer 111 may include a first impurity region 112b and a second impurity region 112a including a p-type or n-type impurity.

The first electrode 113b having a rectangular shape is formed at the center of the third region (Area3) so as to be in contact with one side of the semiconductor layer 111 so that the first electrode 113b is in contact with the other side of the semiconductor layer 111 and is separated from the first electrode 113b The second electrode 113a is formed. One end of the capacitor may be formed in the second area (Area 2), and a second electrode and a first electrode of the switching transistor may be formed in the first area (Area 1), one end of the capacitor and the one end of the capacitor.

Here, the first and second electrodes 113b and 113a may be a single layer or a multilayer. In the case where the first and second electrodes 113b and 113a are a single layer, a metal such as Mo, Al, Cr, Au, Ti, Ni, Nd ) And copper (Cu), or an alloy thereof. When the first and second electrodes 113b and 113a are multi-layered, they may be formed of a triple layer of molybdenum / aluminum-neodymium, molybdenum / aluminum / molybdenum or molybdenum / aluminum-neodymium / molybdenum.

As described above, the first electrode 113b and the second electrode 113a may be formed, and the data line, the first electrode of the switching transistor, and one end of the capacitor may be formed, but the present invention is not limited thereto.

On the other hand, the data lines located in the non-pixel areas except for the sub pixel area may be formed as a single layer or a multilayer. In the case where the data wiring is a single layer, in the case of a group consisting of Mo, Al, Cr, Au, Ti, Ni, Ne, And may be made of any one selected or an alloy thereof. When the data line is a multilayer, it may be formed of a triple layer of molybdenum / aluminum-neodymium, molybdenum / aluminum / molybdenum or molybdenum / aluminum-neodymium / molybdenum.

5B, an insulating layer 114 is formed on the first electrode 113b, the semiconductor layer 111, and the second electrode 113a, which are located on the substrate 110. Next, as shown in FIG. The insulating film 114 may be a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multilayer thereof, but is not limited thereto.

A gate 115 is formed on the insulating film 114 so as to cover the semiconductor layer 111. At this time, the gate 115 may be located below the region located in the central region of the semiconductor layer 111, than the region located in the outer region of the semiconductor layer 111.

Here, the gate 115 may be formed of a material selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, Ne, And may be made of any one selected or an alloy thereof. The gate 115 may be formed of a material selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, Ne, And may be a multilayer composed of any one selected or an alloy thereof. In addition, the gate 115 may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum, but is not limited thereto.

Meanwhile, the gate 115 and the gate of the switching transistor and the other end of the capacitor may be formed, but the present invention is not limited thereto. Here, the gate of the switching transistor may be patterned to be connected to the scan wiring, and the other end of the capacitor may be patterned to be connected to the second power supply wiring.

Here, the scan wiring located in the non-pixel region except for the sub-pixel may be formed of a material selected from the group consisting of Mo, Al, Cr, Au, Ti, Nd) and copper (Cu), or an alloy thereof. The scan wiring may be any one selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, Ne, One or an alloy of these. Further, the scan wiring may be a molybdenum / aluminum-neodymium or molybdenum / aluminum double layer, but is not limited thereto.

Next, as shown in FIG. 5C, a protective film 116a is formed on the gate 115 and a planarization film 116b is formed on the protective film 116a. At this time, the insulating layer 114, the protective layer 116a, and the planarization layer 116b may be patterned to form the first contact hole Contact1 so that the first electrode 113b is exposed in the central region of the third region (Area3) have.

Here, the first contact hole (Contact 1) may be formed to electrically connect the first electrode 113b of the driving transistor and the cathode 117 of the organic light emitting diode.

Then, the cathode 117 of the organic light emitting diode is formed on the planarization layer 116b to be connected to the first electrode 113b of the driving transistor. Although not shown, thereafter, the organic light emitting layer and the anode connected to the first power supply line can be sequentially formed on the cathode 117.

As described above, when the inverted organic light emitting display device of the upper emission type is formed with the same structure as the one embodiment of the present invention, the phenomenon that the external light is incident on the semiconductor layer region of the driving transistor can be blocked by the gate, It is possible to prevent the problem that the output saturation characteristic of the output signal from being degraded. Further, there is an effect that the number of masks used in manufacturing the inverted organic light emitting display device of the top emission type can be reduced.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

1 is a schematic plan view of an organic light emitting display according to an embodiment of the present invention.

Fig. 2 is an exemplary circuit configuration of a subpixel. Fig.

Figure 3a is a top view of a subpixel.

FIG. 3B is a sectional view taken along line A-A in FIG. 3A. FIG.

4A is a plan view of a subpixel.

FIG. 4B is a cross-sectional view taken along line B-B of FIG. 4A. FIG.

5A to 5C are schematic process diagrams for explaining a method of manufacturing an organic light emitting display according to an embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS

110: substrate 111: semiconductor layer

113a: second electrode 113b: first electrode

114: insulating film 115: gate

116a: protective film 116b: planarization film

117: cathode 119: anode

Claims (10)

A sub-pixel including a switching transistor located in a first region defined on a substrate, a capacitor located in a second region, a driving transistor located in a third region, and an organic light emitting diode, The driving transistor includes: A first electrode located at a center of the third region; a semiconductor layer which is in contact with one side of the first electrode and is disposed in a strip shape so as to surround the first electrode; A second electrode spaced apart from the first electrode, an insulating layer disposed on the first electrode, the semiconductor layer, and the second electrode, and a gate positioned over the insulating layer to cover the semiconductor layer, And the region occupied by the gate covers all the semiconductor layers. The method according to claim 1, A first electrode of the driving transistor, Wherein the organic light emitting display device has a rectangular shape. The method according to claim 1, The sub- And a planarization layer disposed on the protective layer and located on the gate, Wherein the insulating layer, the protective layer, and the planarization layer include a first contact hole patterned to expose the first electrode in a central region of the third region. The method of claim 3, The gate of the driving transistor And a region located in a central region of the semiconductor layer is located below a region located in an outer region of the semiconductor layer. The method of claim 3, The organic light emitting diode includes: A cathode connected to the first electrode of the driving transistor and exposed on the planarization layer through the first contact hole; an organic light emitting layer disposed on the cathode; And an organic electroluminescent display device including a connected anode. 6. The method of claim 5, The cathode of the organic light- The semiconductor layer and the second electrode of the driving transistor on the planarization film. The method according to claim 1, The switching transistor includes: A first electrode connected to the data line located on the substrate; a second electrode surrounded by the first electrode; and the insulating film positioned to cover the first electrode and the second electrode, And a gate connected to the scan wiring. The method according to claim 1, The capacitor An insulating film which is formed on the insulating film and extends to the second electrode of the switching transistor and is connected to the gate of the driving transistor and which covers the one end of the insulating film; And the other end connected to the organic light emitting diode. Defining a first region, a second region and a third region in subpixels located on the substrate; And Forming a switching transistor in the first region, forming a capacitor in the second region, and forming a driving transistor in the third region, The driving transistor includes: A first electrode of a rectangular shape located at the center of the third region, a semiconductor layer which is in contact with one side of the first electrode and which is located in the form of a rectangular band so as to surround the first electrode, A second electrode spaced apart from the first electrode; an insulating layer located on the first electrode, the semiconductor layer, and the second electrode; and a gate positioned over the insulating layer to cover the semiconductor layer, , Wherein a region occupied by the gate covers all the semiconductor layers. 10. The method of claim 9, The gate of the driving transistor Wherein a region located in a central region of the semiconductor layer is located below a region located in an outer region of the semiconductor layer.

Images