KR101399957B1 - Double layered non-conductive polymer adhesive film, and package for device - Google Patents

Double layered non-conductive polymer adhesive film, and package for device Download PDF

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Publication number
KR101399957B1
KR101399957B1 KR1020120133850A KR20120133850A KR101399957B1 KR 101399957 B1 KR101399957 B1 KR 101399957B1 KR 1020120133850 A KR1020120133850 A KR 1020120133850A KR 20120133850 A KR20120133850 A KR 20120133850A KR 101399957 B1 KR101399957 B1 KR 101399957B1
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South Korea
Prior art keywords
adhesive layer
electronic
metal solder
electronic device
functional material
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KR1020120133850A
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Korean (ko)
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백경욱
신지원
최용원
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한국과학기술원
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Priority to KR1020120133850A priority Critical patent/KR101399957B1/en
Priority to PCT/KR2012/010500 priority patent/WO2014081064A1/en
Application granted granted Critical
Publication of KR101399957B1 publication Critical patent/KR101399957B1/en

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    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35—Heat-activated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • C—CHEMISTRY; METALLURGY
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    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • C09J7/22—Plastics; Metallised plastics
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    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
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    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K5/00—Use of organic ingredients
    • C08K5/04—Oxygen-containing compounds
    • C08K5/09—Carboxylic acids; Metal salts thereof; Anhydrides thereof
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    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
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    • C08K5/41—Compounds containing sulfur bound to oxygen
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    • C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
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    • C09J2301/40—Additional features of adhesives in the form of films or foils characterized by the presence of essential components
    • C09J2301/408—Additional features of adhesives in the form of films or foils characterized by the presence of essential components additives as essential feature of the adhesive layer
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Abstract

The present invention relates to a bilayered non-conductive polymer adhesive film for laminating three-dimensional through silicon via (TSV) semiconductors having a metallic solder and a copper pillar (Cu pillar) or for connecting flip-chip boards, which comprises a first adhesive layer deposited in the upper end of a base film and generating a flux functional material removing the oxide of the metallic solder in the electronic packaging junction, or comprising the flux functional material; and an electronic package which is first adhesive layer and the; the upper end does not include the flux functional material; and a second adhesive layer deposited in the upper end of the first adhesive layer, not comprising the flux functional material, and being firstly hardened than the first adhesive layer, and an electronic package.

Description

이중층 비전도성 폴리머 접착필름 및 전자패키지{DOUBLE LAYERED NON-CONDUCTIVE POLYMER ADHESIVE FILM, AND PACKAGE FOR DEVICE}TECHNICAL FIELD [0001] The present invention relates to a double-layer nonconductive polymer adhesive film and an electronic package,

본 발명은 플립칩(flip chip) 방식의 전자패키징을 위한 접착제에 관한 것으로써, 더욱 상세하게는 금속 솔더와 카파필러(Cu-pillar)를 포함하는 전자패키징에 있어서 금속 솔더의 융착상태를 제어하는 이중층 비전도성 폴리머 접착필름 및 전자패키지에 관한 것이다.
BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an adhesive for flip chip electronic packaging, and more particularly, to an adhesive for electronic packaging of a flip chip type electronic packaging, Layer nonconductive polymer adhesive film and an electronic package.

오늘날 전자제품의 급속한 발달을 가능케 한 4가지 핵심기술로는 전자소자(예; 반도체 등) 기술, 패키징 기술, 제조기술, 소프트웨어 기술을 들 수 있다. 전자소자 기술은 마이크론 이하의 선 폭, 백만 개 이상의 셀(cell), 고속, 많은 열 방출 등으로 발달하고 있으나, 상대적으로 이를 패키징하는 기술은 낙후되어 있어 전자소자의 전기적 성능이 전자소자 자체의 성능보다는 패키징과 이에 따른 전기 접속에 의해 결정되고 있다.Four key technologies that enable the rapid development of electronic products today include electronic devices (eg, semiconductors) technology, packaging technology, manufacturing technology, and software technology. Although the electronic device technology is developed with a sub-micron line width, more than one million cells, high speed, and a lot of heat emission, the technology for packaging the electronic device technology is relatively inferior, Rather than by packaging and subsequent electrical connections.

따라서, 전자소자의 패키징 기술을 향상시키기 위하여 플립칩(flip chip)방식의 전자패키징 기술에 대한 연구가 진행되어 왔다. 플립칩 방식은 반도체 칩의 전극패드와 리드 프레임의 내부 리드를 금선 와이어를 통해 전기적으로 연결시키는 기존의 와이어 본딩 방식과는 달리, 전자소자(예; 반도체 칩)에 배치된 전극과 인쇄회로기판의 접속단자를 직접 연결시키는 방식이다.Accordingly, studies have been made on a flip chip electronic packaging technique to improve the packaging technology of electronic devices. Unlike the conventional wire bonding method in which the electrode pads of the semiconductor chip and the inner leads of the lead frame are electrically connected to each other through the gold wire, the flip chip method is a method in which an electrode disposed on an electronic element And the connection terminal is directly connected.

플립칩 방식에서는 전자소자의 전극과 인쇄회로기판의 접속단자의 연결부분이 온도 및 시간의 경과 등에 따라 이종 물질 간의 팽창정도 차이에 의하여 변형되어 접속 불량을 일으키는 원인이 되므로, 전자소자의 전극과 인쇄회로기판의 접속단자의 신뢰도를 높이기 위한 노력이 이루어져 왔다.In the flip-chip method, the connection portion between the electrode of the electronic device and the connection terminal of the printed circuit board is deformed due to the difference in degree of expansion between the different materials due to the temperature and the elapse of time, Efforts have been made to increase the reliability of the connection terminals of the circuit board.

이러한 문제점을 해결하기 위한 방법으로, 금속 솔더(solder)를 사용하여 전극을 접합시키고 전자소자와 인쇄회로기판 사이에 열경화성수지, 열가소성수지, 잠재성경화제 등을 포함하는 유전성 폴리머 물질(예; BCB, SU-8 등)을 채우는 공정이 이루어진다. As a method for solving such a problem, a method of bonding electrodes by using a metal solder and forming a dielectric polymer material (for example, BCB, a thermosetting resin, a thermosetting resin, SU-8, etc.) is performed.

한편, 이와 같이 전자소자 또는 기판에 금속 솔더를 형성할 경우, 형성된 금속 솔더가 공기 중에 노출되면 산화되어 산화물이 형성된다. 이러한 산화물은 전자소자의 전극패드와 인쇄회로기판 사이의 접합을 방해하는 요인으로 작용하여 전자부품의 신뢰도를 저하시키게 되는 문제점이 발생된다.On the other hand, when the metal solder is formed on the electronic element or the substrate, the formed metal solder is oxidized when the exposed solder is exposed to the air to form an oxide. Such an oxide acts as a factor that interferes with the bonding between the electrode pad of the electronic device and the printed circuit board, thereby lowering the reliability of the electronic component.

뿐만 아니라, 전자소자의 패키징 시 이러한 금속 솔더가 전극과 접속단자 사이에만 융착되지 않고 전극, 범프(예; 카파필러), 접속단자의 주변에 융착되기도 한다. 금속 솔더가 이와 같이 융착되면 주변 전극과 합선을 일으키게 되어 전자부품의 신뢰도를 저하시키게 되는 문제점이 발생된다.
In addition, when the electronic device is packaged, such a metal solder is not fused only between the electrode and the connection terminal but is fused to the periphery of the electrode, the bump (e.g., kappa filler), and the connection terminal. When the metal solder is fused in such a manner, a short circuit is caused between the peripheral electrode and the electronic component, thereby lowering the reliability of the electronic component.

본 발명의 목적은, 전자패키징 금속 솔더와 카파필러(Cu-pillar)를 포함하는 전자패키징에 있어서 금속 솔더 표면에 생성되는 산화물을 제거함과 동시에 금속 솔더의 융착 시 금속 솔더가 카파필러의 측면을 따라 융착되는 것을 방지하는 이중층 비전도성 폴리머 접착필름 및 전자패키지를 제공하기 위한 것이다.
It is an object of the present invention to provide a method and apparatus for removing metal oxide generated on a surface of a metal solder in an electronic packaging including an electronic packaging metal solder and a Cu-pillar, Layered non-conductive polymer adhesive film and an electronic package that prevent the adhesive layer from being fused.

상기한 과제를 실현하기 위한 본 발명의 실시예와 관련된 이중층 비전도성 폴리머 접착필름은, 금속 솔더와 카파필러(Cu pillar)가 구비된 3차원 TSV(Through Silicon Via) 반도체 적층용 또는 플립칩 기판 접속용 비전도성 폴리머 접착제에 있어서, 베이스 필름 상단에 적층 형성되며, 전자패키징 접합 시 상기 금속 솔더의 산화물을 제거하는 플럭스 기능 물질을 발생시키거나, 플럭스 기능 물질을 포함하는 제1 접착제층, 및 상기 제1 접착제층의 상단에 적층 형성되고, 상기 플럭스 기능 물질을 포함하지 않으며, 상기 제1 접착제층 보다 먼저 경화되는 것이 특징인 제2 접착제층을 포함할 수 있다.Layered, non-conductive polymer adhesive film according to an embodiment of the present invention for realizing the above-mentioned problems is a three-dimensional TSV (Through Silicon Via) semiconductor laminate having a metal solder and a Cu pillar or a flip- A first adhesive layer laminated on top of a base film for generating a fluxing functional material that removes the oxide of the metal solder upon electronic packaging bonding or a first adhesive layer comprising a fluxing functional material, 1 adhesive layer and does not contain the flux functional material and is cured prior to the first adhesive layer.

구체적으로, 상기 플럭스 기능 물질은 전자쌍주개(루이스산)를 생성하는 무수화물로 이루어지며, 경화제 기능을 수행할 수 있다.Specifically, the flux functional material is made of an anhydride to produce a pair of electron donors (Lewis acid), and can function as a hardener.

상기 무수화물은 화학식 (R1-CO)-O-(CO-R2)로 표시되는 화합물로 이루어지는 군에서 선택되는 어느 하나일 수 있다.The anhydride may be any one selected from the group consisting of compounds represented by the formula (R1-CO) -O- (CO-R2).

단, 여기서 (R1-CO)-,및 -(CO-R2)은 아실기(ACYL GROUP)에서 선택된 작용기일 수 있다.Here, (R1-CO) - and - (CO-R2) may be a functional group selected from an acyl group.

상기 플럭스 기능 물질은 열산발생제(TAG)를 포함하여 이루어지며, 경화를 촉진하는 기능을 수행할 수 있다.The flux functional material includes a thermal acid generator (TAG), and can perform a function of accelerating curing.

상기 열산발생제(TAG)는 R1-SO3-R2 또는 R1-S(=O)2-O-R2의 화학식을 포함하는 화학물질로 이루어지는 군에서 선택되는 어느 하나일 수 있다.The thermal acid generator (TAG) may be any one selected from the group consisting of chemicals, including the chemical formula of R1-SO 3 -R2 or R1-S (= O) 2 -O-R2.

여기서, R1 및 R2는 alkyl 또는 aryl 그룹에서 선택되는 작용기일 수 있다.Here, R 1 and R 2 may be a functional group selected from alkyl or aryl groups.

상기 열산발생제(TAG)는 상기 제1 접착제층의 총 중량을 기준으로 1 내지 10 wt% 만큼 포함될 수 있다.The thermal acid generator (TAG) may be included in an amount of 1 to 10 wt% based on the total weight of the first adhesive layer.

상기 제1 접착제층은 점도가 30 Pas 이상 5000 Pas 이하 사이의 값 중 하나일 수 있다.The first adhesive layer may have a viscosity between 30 Pas and 5000 Pas or less.

상기 제1 접착제층의 점도는 상기 제2 접착제층의 점도보다 낮을 수 있다.The viscosity of the first adhesive layer may be lower than the viscosity of the second adhesive layer.

상기 제1 접착제층의 경화개시온도는 상기 제2 접착제층의 경화개시온도보다 높을 수 있다.The curing initiation temperature of the first adhesive layer may be higher than the curing initiation temperature of the second adhesive layer.

또한, 상기한 과제를 실현하기 위한 본 발명의 실시예와 관련된 전자패키지는, 금속 솔더와 카파필러(Cu pillar)가 구비된 3차원 TSV(Through Silicon Via) 반도체 적층 또는 플립칩 기판 접속에 있어서, 전기 회로 또는 전극이 형성된 제1 전자소자와 제2 전자소자, 및 상기 제1 전자소자와 상기 제2 전자소자의 사이에 형성된 공간에 채워진 비전도성 폴리머 접착층을 포함하고, 상기 비전도성 폴리머 접착층은, 상기 제1 전자소자의 표면에 연접 형성되며, 전자패키징 접합 시 상기 금속 솔더의 산화물을 제거하는 플럭스 기능 물질을 발생시키거나, 플럭스 기능 물질을 포함하는 제1 접착제층, 및 상기 제1 접착제층과 상기 제2 전자소자 사이에 형성되고, 상기 플럭스 기능 물질을 포함하지 않으며, 상기 제1 접착제층 보다 먼저 경화되는 것이 특징인 제2 접착제층을 포함하여 이중층으로 이루어질 수 있다.In order to achieve the above-described object, an electronic package according to an embodiment of the present invention is a three-dimensional through silicon via (TSV) semiconductor stacked with metal solder and a copper pillar or a flip chip board connection, And a non-conductive polymer adhesive layer filled in a space formed between the first electronic device and the second electronic device, wherein the non-conductive polymer adhesive layer comprises a first electrically- A first adhesive layer formed adjacent to the surface of the first electronic component and generating a fluxing functional material that removes the oxide of the metal solder upon electronic packaging bonding or a first adhesive layer comprising flux functional material, A second adhesive layer formed between the second electronic components, the second adhesive layer being free of the flux functional material and being cured prior to the first adhesive layer, And the like.

상기 제2 접착제층은 상기 제2 전자소자의 표면으로부터 상기 카파필러의 하단 내지 상기 금속 솔더의 중간 부분 사이의 일 지점까지 덮이는 두께로 형성될 수 있다.
The second adhesive layer may be formed to have a thickness covering from the surface of the second electronic device to a point between the lower end of the kappa pillar and the middle portion of the metal solder.

상기와 같이 구성되는 본 발명에 관련된 이중층 비전도성 폴리머 접착필름 및 전자패키지에 따르면, 전자패키징 시 금속 솔더 표면에 생성되는 산화물을 제거할 수 있고, 금속 솔더가 카파필러의 측면을 따라 융착되는 것을 방지할 수 있다.According to the double layer nonconductive polymer adhesive film and the electronic package of the present invention constructed as described above, it is possible to remove oxides formed on the surface of the metal solder during electronic packaging and to prevent the metal solder from being fused along the side surface of the kappa pillar can do.

또한, 이와 같이 전자패키징 시 금속 솔더의 융착상태를 제어하여 전자부품의 전기적 신뢰성을 향상시킬 수 있다.
In addition, the electrical reliability of the electronic component can be improved by controlling the fusion state of the metal solder in the electronic packaging.

도 1은 본 발명의 이중층 비전도성 폴리머 접착필름의 실시예를 개념적으로 나타낸 도면이다.
도 2a 내지 도 2c는 본 발명과 관련된 플럭스 기능 물질의 실시예이다.
도 3은 본 발명과 관련된 플럭스 기능 물질의 다른 실시예들과 관련된 기본 구조식이다.
도 4a 내지 도 4b는 본 발명과 관련된 플럭스 기능 물질의 다른 실시예들의 구조식이다.
도 5는 본 발명의 전자패키지의 실시예를 개념적으로 나타낸 도면이다.
도 6은 본 발명의 전자패키지를 형성시키는 과정을 개략적으로 나타낸 순서도이다.
도 7은 종래의 단층 전자패키지를 나타낸 주사전자현미경 사진이다.
도 8은 종래의 단층 전자패키지의 고온 신뢰성 테스트 결과를 보여주기 위한 주사전자현미경 사진이다.
도 9는 본 발명의 이중층 비전도성 폴리머 접착필름을 이용하여 접착시킨 전자패키지 모습을 나타낸 주사전자현미경 사진이다.
도 10은 이와 같이 이중층으로 형성된 전자패키지를 40N과 100N의 압력으로 노출시킨 결과를 비교한 주사전자현미경 사진이다.1 is a conceptual illustration of an embodiment of a double-layer nonconductive polymer adhesive film of the present invention.
2A to 2C are embodiments of flux functional materials related to the present invention.
Figure 3 is a basic structural diagram related to other embodiments of the flux functional material associated with the present invention.
4A-4B are structural formulas of other embodiments of the flux functional material associated with the present invention.
5 is a conceptual diagram showing an embodiment of the electronic package of the present invention.
6 is a flowchart schematically showing a process of forming the electronic package of the present invention.
7 is a scanning electron microscope photograph showing a conventional single-layer electronic package.
8 is a scanning electron microscope (SEM) image of a conventional single-layer electronic package to show a high-temperature reliability test result.
9 is a scanning electron micrograph showing a state of an electronic package adhered using the double-layer nonconductive polymer adhesive film of the present invention.
FIG. 10 is a scanning electron microscope (SEM) image obtained by comparing the result of exposing the electronic package formed with the double layer as described above to 40 N and 100 N pressure.

이하, 본 발명의 바람직한 실시예에 따른 이중층 비전도성 폴리머 접착필름 및 전자패키지에 대하여 첨부한 도면 및 사진을 참조하여 상세히 설명한다. 본 명세서에서는 서로 다른 실시예라도 동일 유사한 구성에 대해서는 동일 유사한 참조번호를 부여하고, 그 설명은 처음 설명으로 갈음한다.Hereinafter, a double-layer nonconductive polymer adhesive film and an electronic package according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings and photographs. In the present specification, the same reference numerals are assigned to the same components in different embodiments, and the description thereof is replaced with the first explanation.

전자소자의 패키징 기술에는 크게 전자소자의 전극패드와 리드 프레임의 내부리드를 금선 와이어를 통해 전기적으로 연결시키는 방식인 와이어 본딩과 전자소자에 배치된 전극과 인쇄회로기판의 접속단자를 직접 연결시키는 방식인 플립칩(flip chip)방식으로 구분할 수 있다.BACKGROUND OF THE INVENTION [0002] Packaging technologies for electronic devices include wire bonding, which is a method of electrically connecting an electrode pad of an electronic device and an inner lead of a lead frame through a gold wire, a method of directly connecting a connection terminal of a printed circuit board And flip chip type.

이 중 플립칩 방식으로 전자소자를 패키징하는 경우, 전자소자와 인쇄회로기판을 접착시키기 위한 폴리머 접착물질로서, 도 1에 도시된 본 발명의 이중층 폴리머 접착필름(100)을 이용할 수 있다.Among them, when the electronic device is packaged by the flip chip method, the double-layer polymer adhesive film 100 of the present invention shown in FIG. 1 can be used as a polymer adhesive material for bonding the electronic device and the printed circuit board.

한편, 여기서 전자소자는 일종의 반도체로서, 전자회로 및 전극이 형성되어 있으며, 사용 용도에 따라서 TSV 및 범프가 더 형성될 수도 있다. TSV(Through Silicon Via; 웨이퍼 관통 비아)는 전자소자를 수직방향으로 관통시키는 홀에 구리, 은, 니켈 등의 금속 또는 탄소 성분의 전도성 물질을 충진시켜, 전자소자의 상부와 하부를 전기적으로 직접 연결시키는 것이다. 또한, 범프는 전자소자를 다른 전자소자 또는 기판과 전기적으로 연결시키기 위하여 전술된 TSV의 상부 또는 하부 표면에 전도성 금속물질을 융착시켜 형성된 돌기부분이다. 범프는 전자소자 간에 전기적 연결이 가능하다면, 전술된 TSV와 동종 또는 이종 재질로 형성시키는 것이 모두 가능하다.On the other hand, the electronic device is a kind of semiconductor, in which electronic circuits and electrodes are formed, and TSV and bumps may be further formed depending on the intended use. TSV (Through Silicon Via) is a method of filling a hole for vertically penetrating an electronic device with a metal such as copper, silver, or nickel or a conductive material of a carbon component to electrically connect the top and bottom of the electronic device directly I will. In addition, the bump is a protruding portion formed by fusing a conductive metal material to the upper or lower surface of the aforementioned TSV to electrically connect the electronic device to another electronic device or substrate. The bumps can be formed of the same or different materials as the TSV described above, provided that they can be electrically connected between the electronic devices.

그리고, 금속 솔더(200)는 주석, 납 등을 포함하는 금속 또는 금속합금을 전자소자의 전극 또는 접속단자 상단에 형성시킨 것으로서, 일정 온도 이상의 조건하에서 용융되어 인접된 전극과 접속단자를 서로 융착시킨다. 만일, 이때 TSV 및 범프가 형성된 전자소자라면, TSV 또는 범프 상단에 금속 솔더(200)를 형성시키는 것도 가능하다. The metal solder 200 is formed by forming a metal or a metal alloy including tin, lead, or the like on the electrode or the connection terminal of the electronic device. The metal solder 200 is melted under a condition of a predetermined temperature or higher to fuse the adjacent electrode and the connection terminal together . If the TSV and the bump are formed at this time, it is also possible to form the metal solder 200 on the top of the TSV or the bump.

상세하게 설명하면, 본 발명의 이중층 비전도성 폴리머 접착필름(100)은 베이스 필름 상단에 적층 형성되며, 전자패키징 접합 시 금속 솔더(200)의 표면에 형성된 산화물을 제거하는 플럭스 기능 물질을 발생시키거나, 플럭스 기능 물질을 포함하는 제1 접착제층(111), 및 상기 제1 접착제층(111)의 상단에 적층 형성되고, 상기 플럭스 기능 물질을 포함하지 않으며, 상기 제1 접착제층(111) 보다 먼저 경화되는 것이 특징인 제2 접착제층(115)을 포함할 수 있다. 이때, 본 발명의 이중층 비전도성 폴리머 접착필름(100)은 금속 솔더(200)와 카파필러(310; Cu pillar)가 구비된 3차원 TSV(Through Silicon Via) 반도체 적층용 비전도성 폴리머 접착제, 또는 플립칩 기판 접속용 비전도성 폴리머 접착제로 활용된다.In detail, the double-layer nonconductive polymer adhesive film 100 of the present invention is laminated on top of a base film, and generates a flux-functional material that removes the oxide formed on the surface of the metal solder 200 at the time of electronic packaging bonding A first adhesive layer 111 including a flux functional material and a first adhesive layer 111 stacked on top of the first adhesive layer 111 and not including the flux functional material, And a second adhesive layer 115 that is characterized by being cured. At this time, the double-layer nonconductive polymer adhesive film 100 of the present invention is a non-conductive polymer adhesive for a three-dimensional through silicon via (TSV) semiconductor stacked with a metal solder 200 and a copper pillar 310, It is used as a nonconductive polymer adhesive for chip board connection.

베이스 필름은 본 발명의 비전도성 폴리머 접착필름(100)을 형성시키기 위한 기저층으로서, 필름, 시트, 기판의 형태가 모두 가능하나 전자패키징 시 제거가 용이하도록 하기 위하여 필름이나 시트의 형태로 형성되는 것이 좋다.The base film is a base layer for forming the nonconductive polymer adhesive film 100 of the present invention, and may be in the form of a film, a sheet, or a substrate, but is formed in the form of a film or a sheet good.

또한, 제1 접착제층(111)은 열경화성수지, 열가소성수지, 잠재성경화제, 및 본 발명과 관련된 플럭스 기능물질을 포함하는 폴리머 물질로 이루어지며, 작업 조건에 따라 배합 비율을 달리하여 실시하거나, 본 발명의 플럭스 기능물질이 아닌 다른 요소를 일부 제외하는 것 또한 가능하다.The first adhesive layer 111 is made of a polymer material including a thermosetting resin, a thermoplastic resin, a latent curing agent, and a flux-functional material related to the present invention. It is also possible to exclude some elements other than the flux functional material of the invention.

여기서, 플럭스 기능 물질은 전자패키징 접합 시 금속 솔더(200)의 표면에 형성된 산화물을 제거하는 기능을 하는 것으로서, 전자쌍주개(루이스산)를 생성하는 무수화물로 이루어지며, 경화제 기능을 수행하는 것일 수 있다. 그리고, 이와 같이 플럭스 기능 물질로서 전자쌍주개(루이스산)를 생성하는 무수화물이 포함되는 경우, 상기 무수화물이 경화제의 기능을 수행하게 되므로, 제1 접착제층(111)에 전술된 잠재성경화제가 포함되지 않고 생략될 수 있다. 즉, 이때 본 발명과 관련된 무수화물은 잠재성경화제로서 포함되는 것이다.Here, the flux-functional material functions to remove oxides formed on the surface of the metal solder 200 at the time of electronic packaging bonding, and is made of anhydride to produce an electron-pair (Lewis acid) have. In the case where the anhydride for producing an electron pair (Lewis acid) is included as the fluxing functional material, the anhydride functions as a curing agent, so that the above-mentioned latent curing agent is added to the first adhesive layer 111 Can be omitted without including. That is, the anhydride associated with the present invention is included as a latent curing agent.

구체적으로는, 본 발명과 관련된 무수화물은 화학식 (R1-CO)-O-(CO-R2)로 표시되는 화합물로 이루어지는 군에서 선택되는 어느 하나일 수 있다. 단, 여기서 (R1-CO)-,및 -(CO-R2)은 아실기(ACYL GROUP)에서 선택된 작용기이다. 참고로 본 발명의 무수화물은 아래의 구조식으로 표현될 수도 있다.Specifically, the anhydride related to the present invention may be any one selected from the group consisting of compounds represented by the formula (R1-CO) -O- (CO-R2). Here, (R1-CO) - and - (CO-R2) are functional groups selected from acyl groups. For reference, the anhydride of the present invention may be represented by the following structural formula.

구조식constitutional formula

Figure 112012096968803-pat00001
Figure 112012096968803-pat00001

구체적으로 설명하면, 무수화물은 두개의 아실기(ACYL GROUP)가 하나의 산소와 연결된 구조(도 2a 내지 도 2c의 "A" 부분)를 갖으며, 전자패키징 공정의 경화 반응에서 전자쌍주개(루이스산)을 생성한다. 이때 무수화물로부터 생성된 전자쌍주개(루이스산)은 제1 접착제층(111)을 이루는 폴리머 물질 내에서 라디칼로 작용하면서 개시반응, 전파반응, 정지반응, 사슬이동반응을 통하여 폴리머 물질을 단량체에서 고분자로 중합시켜 경화되도록 한다. 또한, 이러한 반응 중 전자쌍주개(루이스산)의 전자(-)의 이동에 의하여 금속 솔더(200) 표면에 형성된 산화물이 제거된다.Specifically, the anhydride has a structure in which two acyl groups are connected to one oxygen ("A" part in FIGS. 2A to 2C), and in the curing reaction of the electronic packaging process, Acid). In this case, the electron pair (Lewis acid) generated from the anhydride acts as a radical in the polymer material constituting the first adhesive layer 111, and the polymer material is polymerized from the monomer through the initiation reaction, propagation reaction, So as to be cured. In addition, the oxide formed on the surface of the metal solder 200 is removed by the movement of the electrons (-) in the electron pair (Lewis acid) during this reaction.

이와 같이 금속 솔더(200) 표면의 산화물이 제거되면, 전자소자의 접합부위가 빈틈없이 촘촘하게 형성된다. 이에 반하여, 금속 솔더(200) 표면의 산화물이 제거되지 않은 채로 전자소자를 접합시킨 경우에는, 전자소자의 전극과 인쇄회로기판의 접속단자 사이에 공극이 형성되어 전기적 신뢰성이 저하되는 문제점이 발생 될 수 있다.When the oxide on the surface of the metal solder 200 is removed as described above, the bonding sites of the electronic devices are formed tightly and tightly. On the contrary, when the electronic device is joined without removing the oxide on the surface of the metal solder 200, a gap is formed between the electrode of the electronic device and the connection terminal of the printed circuit board, .

한편, 본 발명의 무수화물은 전술된 바와 같이 화학식 (R1-CO)-O-(CO-R2)로 표시되는 화합물로 이루어지는 군에서 선택된 화학물질이 모두 가능하나, 전자패키징 공정 중 금속 솔더(200)가 용융되는 온도를 고려하여 선택하는 것이 바람직하다. 실시예로는 MeTHPA(methyl-tetrahydrophthalic anhydride; 도 2a), MeHHPA(methyl-hexahydrophthalic anhydride; 도 2b), Trimellitic anhydride(도 2c) 등이 있다. 상기 실시예들은 분자량이 높고 오각형과 육각형의 고리를 갖는 것이 특징이다.Meanwhile, the anhydride of the present invention may be any chemical selected from the group consisting of compounds represented by the general formula (R1-CO) -O- (CO-R2) as described above, Is preferably selected in consideration of the temperature at which it is melted. Examples include methyl-tetrahydrophthalic anhydride (MeTHPA), methyl-hexahydrophthalic anhydride (MeHHPA), and trimellitic anhydride (FIG. 2c). The above embodiments are characterized in that they have a high molecular weight and a pentagon and hexagonal rings.

그러나 본 발명의 제1 첩착제층에 잠재성경화제로서 포함되는 무수화물은 반응성이 매우 느리기 때문에, 제1 접착제층(111)의 경화반응을 촉진하기 위한 경화촉진제가 더 첨가될 수 있다. 특징적으로 경화촉진제로는 TPTB(Tetraphenylphosphonium Tetraphenylborate)를 첨가하여 사용하는 것이 바람직하다.However, since the anhydride contained as a latent curing agent in the first adhesive layer of the present invention is very slow in reactivity, a curing accelerator for accelerating the curing reaction of the first adhesive layer 111 may be further added. Characteristically, it is preferable to use TPTB (Tetraphenylphosphonium Tetraphenylborate) as a curing accelerator.

또는, 제1 접착제층(111)은 열경화성수지, 열가소성수지, 잠재성경화제, 및 본 발명과 관련된 플럭스 기능물질을 포함하는 폴리머 물질로 이루어지며, 작업 조건에 따라 배합 비율을 달리하여 실시하거나, 본 발명의 플럭스 기능물질이 아닌 다른 요소를 일부 제외하는 것 또한 가능하다.Alternatively, the first adhesive layer 111 may be formed of a polymer material including a thermosetting resin, a thermoplastic resin, a latent curing agent, and a flux-functional material related to the present invention, It is also possible to exclude some elements other than the flux functional material of the invention.

이때, 플럭스 기능 물질은 열산발생제(TAG) 일 수 있다. 이러한 열산발생제(TAG)는 경화제로서 작용하지 않고 경화를 촉진하는 기능을 수행하게 되므로, 이와 같이 플럭스 기능 물질로서 열산발생제(TAG)가 포함되는 경우에는 잠재성경화제가 폴리머 물질의 필수성분으로 구성되어야 한다.At this time, the flux-functional material may be a thermal acid generator (TAG). Since such a thermal acid generator (TAG) does not act as a curing agent and performs a function of promoting curing, when a thermal acid generator (TAG) is included as a flux-functional material as such, the latent curing agent is an essential component of the polymer material .

이러한 열산발생제(TAG)는 상기 제1 접착제층(111)의 총 중량을 기준으로 1 내지 10 wt% 만큼 포함되는 것이 특징이다. 경화촉진제의 기능을 수행하는 열산발생제(TAG)의 함량이 1 wt% 미만이면 경화촉진능이 미미하여 경화 반응이 빠르게 진행되지 않고, 10 wt% 초과이면 경화촉진능이 과도하여 금속 솔더(200)가 융착되기 전에 제1 접착제층(111)의 경화 반응이 완료되어 전자패키징이 완료된 전자부품의 전기적 신뢰성을 저하시키게 된다. The thermal acid generator (TAG) is included in an amount of 1 to 10 wt% based on the total weight of the first adhesive layer (111). If the content of the thermal acid generator (TAG) which performs the function of the hardening accelerator is less than 1 wt%, the hardening reaction does not progress rapidly due to the small curing acceleration ability. If the content exceeds 10 wt%, the hardening promoting ability is excessively excessive, The curing reaction of the first adhesive layer 111 is completed and the electrical reliability of the electronic component having completed the electronic packaging is lowered.

구체적으로, 열산발생제(TAG)는 R1-SO3-R2 또는 R1-S(=O)2-O-R2의 화학식을 포함하는 화학물질로 이루어지는 군에서 선택되는 어느 하나이며, 도 3의 구조식으로 이루어지는 것이 특징이다. 여기서, R1 및 R2는 alkyl 또는 aryl 그룹에서 선택되는 작용기이다. 더욱 구체적으로, 실시예로서 에틸 p-톨루엔설포네이트(도 4a; ethyl p-toluenesulfonate; C9H12O3S) 또는 시클로헥실 p-톨루엔설포네이트(도 4b; cyclohexyl p-toluenesulfonate; C13H18O3S)등을 선택하여 열산발생제(TAG)로 사용할 수 있다.Specifically, the thermal acid generator (TAG) is any one selected from the group consisting of a chemical comprising a chemical formula of R1-SO 3 or -R2 R1-S (= O) 2 -O-R2, the structural formula of Figure 3 . Here, R 1 and R 2 are functional groups selected from alkyl or aryl groups. More specifically, as an example, ethyl p-toluenesulfonate (C 9 H 12 O 3 S) or cyclohexyl p-toluenesulfonate (FIG. 4 b: C 13 H 18 O 3 S) can be selected and used as a thermal acid generator (TAG).

이 외, 제1 접착제층(111)에는 점도 조절하기 위하여 충전제가 더 첨가되며, 본 발명에서는 10 내지 40 wt%의 충전제를 포함시켜 제1 접착제층(111)의 점도를 30 Pas 이상 5000 Pas 이하 사이의 값 중 하나로 맞춘다.In addition, a filler is further added to the first adhesive layer 111 to control the viscosity. In the present invention, the viscosity of the first adhesive layer 111 is preferably 30 Pas or more and 5000 Pas or less To one of the values between.

한편, 본 발명의 제2 접착제층(115)은 열경화성수지, 열가소성수지, 잠재성경화제를 포함하는 폴리머 물질로 이루어지며, 플럭스 기능 물질을 포함하지 않는 것이 특징이다. 즉, 본 발명의 제2 접착제층(115)에는 전자패키징 시 금속 솔더(200) 표면에 형성된 산화물을 제거하여 금속 솔더(200)의 융착이 잘 이루어지도록 하기 위한 플럭스 기능이 부가되지 않게 된다. 이러한 제2 접착제층(115)의 성분 또한 플럭스 기능 물질이 포함되지 않는 범위에서, 작업 조건에 따라 배합 비율을 달리하여 실시하거나 일부 성분을 제외하는 것 또한 가능하다.On the other hand, the second adhesive layer 115 of the present invention is formed of a polymer material including a thermosetting resin, a thermoplastic resin and a latent curing agent, and does not contain a flux-functional material. That is, the second adhesive layer 115 of the present invention does not have a flux function for removing the oxide formed on the surface of the metal solder 200 in the electronic packaging, so that the metal solder 200 can be easily fused. It is also possible to carry out the composition of the second adhesive layer 115 in different mixing ratios or to exclude some components in accordance with the working conditions insofar as the flux functional material is not contained.

이러한 제2 접착제층(115)은 전술된 제1 접착제층(111)의 점도에 비하여 점도가 낮도록 구성되는 것이 특징이며, 제2 접착제층(115)의 점도는 추가적으로 첨가되는 충전제의 양으로 조절하게 된다.The second adhesive layer 115 is configured to have a lower viscosity than the viscosity of the first adhesive layer 111 described above. The viscosity of the second adhesive layer 115 is adjusted by the amount of the additional filler .

그리고, 제1 접착제층(111)의 경화개시온도는 제2 접착제층(115)의 경화개시온도보다 높은 것이 특징이다. 경화개시온도란 전자패키징을 위하여 압력과 온도가 가해지기 시작한 이후 각각의 접착제층의 경화가 시작되는 온도로서, 일반적으로 경화개시온도가 높을수록 더 늦게 경화가 시작되는 것이다. 제1 접착제층(111)의 경화개시온도는 제2 접착제층(115)의 경화개시온도보다 높도록 구성되는 이유는 전자패키지에서 자세히 후술한다.
The curing initiation temperature of the first adhesive layer (111) is higher than the curing initiation temperature of the second adhesive layer (115). The curing initiation temperature is a temperature at which curing of each adhesive layer starts after pressure and temperature start to be applied for electronic packaging. Generally, the higher the curing initiation temperature, the later the curing starts. The reason why the curing start temperature of the first adhesive layer 111 is made higher than the curing start temperature of the second adhesive layer 115 will be described in detail later in the electronic package.

이하에는, 본 발명의 전자패키지에 대하여 설명한다.Hereinafter, the electronic package of the present invention will be described.

본 발명의 전자패키지는 도 5에 도시된 바와 같이, 전기 회로 또는 전극이 형성된 제1 전자소자(400)와 제2 전자소자(300), 및 제1 전자소자(400)와 상기 제2 전자소자(300)의 사이에 형성된 공간에 채워진 비전도성 폴리머 접착층을 포함하고, 비전도성 폴리머 접착층은 이중층으로 이루어진 것이 특징이다.5, the electronic package of the present invention includes a first electronic device 400 and a second electronic device 300 having an electric circuit or electrode formed thereon, and a first electronic device 400, Conductive polymer adhesive layer filled in a space formed between the non-conductive polymer adhesive layer 300 and the non-conductive polymer adhesive layer is composed of a double layer.

비전도성 폴리머 접착층의 이중층은 제1 전자소자(400)의 표면에 연접 형성되며, 전자패키징 접합 시 금속 솔더(200)의 산화물을 제거하는 플럭스 기능 물질을 발생시키거나, 플럭스 기능 물질을 포함하는 제1 접착제층(111), 및 제1 접착제층(111)과 제2 전자소자(300) 사이에 형성되고, 플럭스 기능 물질을 포함하지 않으며, 제1 접착제층(111) 보다 먼저 경화되는 것이 특징인 제2 접착제층(115)을 포함하여 이루어진다. 그리고 이러한 본 발명의 전자패키지는 금속 솔더(200)와 카파필러(310; Cu pillar)가 구비된 3차원 TSV(Through Silicon Via) 반도체 적층, 또는 플립칩 기판 접속 시에 구성될 수 있다.The double layer of the nonconductive polymer adhesive layer is formed to be connected to the surface of the first electronic device 400 and to generate a fluxing functional material that removes the oxide of the metal solder 200 when the electronic packaging is bonded, 1 adhesive layer 111 and the first adhesive layer 111 and the second electronic element 300 and does not contain a flux functional material and is cured prior to the first adhesive layer 111 And a second adhesive layer (115). The electronic package of the present invention can be formed at the time of connecting a three-dimensional TSV (Through Silicon Via) semiconductor laminate having a metal solder 200 and a copper pillar 310, or a flip chip board.

이때 제1, 2 접착제층(110)을 이루는 폴리머 물질은 전술된 이중층 비전도성 폴리머 접착필름(100)의 제1, 2 접착제층(110)의 특징을 따라 조성된다.Here, the polymer material constituting the first and second adhesive layers 110 is formed according to the characteristics of the first and second adhesive layers 110 of the double-layer nonconductive polymer adhesive film 100 described above.

한편, 본 발명의 전자패키지 구조는 도 6에 도시된 순서에 따라 형성될 수 있다. 이때의 제1 전자소자(400)와 제2 전자소자(300)는 반도체 칩, 3차원 TSV 반도체, 인쇄회로기판 중 선택하여 사용될 수 있으나, 발명의 설명을 위하여 제1 전자소자(400)를 금속패드(410)가 구비된 인쇄회로기판으로 정의하고, 제2 전자소자(300)를 카파필러(310)와 금속 솔더(200)가 전극으로서 구비된 반도체칩으로 정의하여 후술한다. On the other hand, the electronic package structure of the present invention can be formed according to the order shown in FIG. In this case, the first electronic device 400 and the second electronic device 300 can be selected from a semiconductor chip, a three-dimensional TSV semiconductor, and a printed circuit board. However, Pad 410 and a second electronic element 300 is defined as a semiconductor chip having a capper filler 310 and a metal solder 200 as electrodes.

본 순서도를 참조하면, 우선 제1 전자소자(400)와 제2 전자소자(300)를 일정 거리를 두고 서로 마주보도록 위치시켜 사이 공간을 형성시키고, 도 6 (a)과 같이 그 사이에 본 발명을 통하여 구성된 이중층 비전도성 폴리머 접착필름(100)을 위치시킨다. 여기서 제1 전자소자(400)와 제2 전자소자(300)는 전극 또는 전극패드가 서로 마주보도록 대향된다. Referring to the flowchart, first, the first electronic device 400 and the second electronic device 300 are positioned to face each other with a certain distance therebetween to form a space, and as shown in FIG. 6 (a) Layer nonconductive polymer adhesive film 100 formed through the above process. Here, the first electronic element 400 and the second electronic element 300 are opposed so that the electrode or the electrode pad face each other.

그리고, 제1 전자소자(400)와 제2 전자소자(300) 사이 공간에 위치된 이중층 비전도성 폴리머 접착필름(100)은 카파필러(310)와 금속 솔더(200)가 구비되지 않은 제1 전자소자(400)의 방향에 제1 접착제층(111)을 위치시키고, 카파필러(310)와 금속 솔더(200)가 구비된 제2 전자소자(300)의 방향에 제2 접착제층(115)을 위치시키게 된다.The double layer nonconductive polymer adhesive film 100 positioned in the space between the first electronic component 400 and the second electronic component 300 is formed of a first electronic component 400 having a cappillar 310 and a metal solder 200 The first adhesive layer 111 is positioned in the direction of the device 400 and the second adhesive layer 115 is positioned in the direction of the second electronic device 300 having the kappa pillar 310 and the metal solder 200 Respectively.

이 후, 제2 전자소자(300)와 제2 접착제층(115)을 먼저 접합시킨다. 접합은 별도의 가압과 승온이 가능한 본딩장치를 사용하여 제2 전자소자(300)와 이중층 비전도성 폴리머 접착필름(100)의 상하부에서 압력을 가하면서 승온하여 이루어진다. 이로써, 도 6 (b)에서와 같이 제2 전자소자(300)의 일면에 이중층 비전도성 폴리머 접착필름(100)이 접합된다.Thereafter, the second electronic element 300 and the second adhesive layer 115 are first bonded. The bonding is performed by applying pressure at the upper and lower portions of the second electronic element 300 and the double-layer nonconductive polymer adhesive film 100 using a bonding device capable of separate pressing and heating. As a result, the double-layer nonconductive polymer adhesive film 100 is bonded to one surface of the second electronic element 300 as shown in FIG. 6 (b).

여기서, 이중층 비전도성 폴리머 접착필름(100)의 베이스필름은 공정조건에 따라, 제2 전자소자(300)와 제2 접착제층(115)의 접합 전에 제거될 수도 있고, 제2 전자소자(300)와 제2 접착제층(115)이 접합 된 이후에 제거될 수도 있다.Here, the base film of the double-layer nonconductive polymer adhesive film 100 may be removed before bonding of the second electronic element 300 and the second adhesive layer 115, and the second electronic element 300 may be removed, And the second adhesive layer 115 are bonded to each other.

한편, 전술된 바와 같이 본 발명의 이중층 폴리머 접착필름(100)을 사용하는 방법 이외에, 카파필러(310)와 금속 솔더(200)가 구비된 제2 전자소자(300)의 표면에 카파필러(310)와 금속 솔더(200)가 형성된 표면에 페이스트 형태의 제2 접착제층(115)을 도포하고, 그 상단에 페이스트 형태의 제1 접착제층(111)을 도포하여, 도 6 (b)와 같은 구조를 실시하는 것 또한 가능하다.In addition to the method of using the double-layer polymer adhesive film 100 of the present invention as described above, the surface of the second electronic device 300 having the cappa filler 310 and the metal solder 200 is coated with a cappa filler 310 A second adhesive layer 115 in the form of a paste is applied to the surface of the metal solder 200 on which the metal solder 200 is formed and a first adhesive layer 111 in the form of paste is applied to the top of the second adhesive layer 115, It is also possible to carry out.

다음으로 제2 접착제층(115)이 일면에 접합된 제2 전자소자(300)와 제1 전자소자(400)가 전 과정에서와 같이 대향 된 상태에서 별도의 본딩장치를 사용하여 상하부에서 압력을 가하면서 승온하여 도 6 (c)와 같이 제1 전자소자(400)와 제2 전자소자(300)의 접합을 완료하게 된다.Next, the second electronic element 300 and the first electronic element 400, which are bonded to one surface of the second adhesive layer 115, are pressurized at the upper and lower portions by using a separate bonding apparatus in a state in which the first electronic element 400 is opposed as in the previous process The bonding of the first electronic device 400 and the second electronic device 300 is completed as shown in FIG. 6 (c).

이와 같은 전자패키지에 있어서, 본 발명의 제2 접착제층(115)은 제2 전자소자(300)의 표면으로부터 카파필러(310)를 포함하는 부분까지 형성된다. 이는 제1 접착제층(111)의 경화개시온도는 제2 접착제층(115)의 경화개시온도보다 높게 형성되는 것과 관계가 있다.In such an electronic package, the second adhesive layer 115 of the present invention is formed from the surface of the second electronic element 300 to the portion including the kappa pillar 310. This is related to the fact that the curing initiation temperature of the first adhesive layer 111 is higher than the curing initiation temperature of the second adhesive layer 115.

구체적으로 설명하면, 전자패키징을 위하여 별도의 본딩장치로 제1, 2 전자소자(300, 400)에 압력과 열이 가해지다가, 일정 압력과 온도가 되면 제1, 2 전자소자(300, 400) 사이의 금속 솔더(200)가 주변의 금속(특히, 전극)과 융착된다. 이때, 제1, 2 전자소자(300, 400) 사이에 이중층 구조의 폴리머 접합층을 형성시켜 금속 솔더의 융착 시 금속 솔더가 카파필러(310)의 옆면에 융착 된 부분(310; 도 7)이 형성되지 않고, 도 8에 개시된 바와 같이 카파필러(310)와 대향 된 다른 전자소자의 전극 또는 전극패드 사이에 잘 융착되어 전기적 신뢰도를 높이게 되는 것이다.More specifically, when pressure and heat are applied to the first and second electronic devices 300 and 400 by a separate bonding device for electronic packaging, when the first and second electronic devices 300 and 400 reach a predetermined pressure and temperature, The metal solder 200 is fused to the surrounding metal (in particular, the electrode). A polymer bonding layer having a double layer structure is formed between the first and second electronic devices 300 and 400 so that a portion 310 (Fig. 7) of the metal solder fused to the side surface of the cappa pillar 310 when the metal solder is fused And is firmly fused between electrodes or electrode pads of other electronic devices opposed to the cappa pillars 310 as shown in FIG. 8, thereby improving electrical reliability.

좀 더 구체적으로 설명하면, 도 7은 이중구조가 아닌 비전도성 폴리머 접합물질을 이용하여 접착된 전자패키징을 보여주기 위한 도면으로서, 카파필러(310) 옆면에 금속 솔더가 융착된 부분(205)을 확인할 수 있다. 이와 같이 카파필러(310) 옆면에 금속 솔더가 융착되면, 미세 피치로 전극이 형성된 경우 좌우 방향의 전극 간이 쇼트닝 발생률을 증가시게 된다. 뿐만 아니라, 도 8은 이와 같이 형성된 전자패키징를 150℃에서 500시간 동안 노출시킨 고온 신뢰성 테스트 결과로서, 본 결과에서 보듯이 금속 솔더(200)가 고온 신뢰성 분석 시 빠르게 소진되어 공극(250)을 형성시킴으로써 전기적 신뢰성이 저하될 수 있다. 7 is a view for showing an electronic packaging bonded using a nonconductive polymer bonding material that is not a double structure. In FIG. 7, a portion 205 where a metal solder is fused is formed on the side surface of the capapillar 310 Can be confirmed. When the metal solder is fused to the side surface of the kappa pillar 310 as described above, when electrodes are formed at a fine pitch, the rate of shortening is increased between the electrodes in the left and right directions. In addition, FIG. 8 is a high-temperature reliability test result in which the thus formed electronic packaging is exposed at 150 DEG C for 500 hours. As can be seen from this result, the metal solder 200 is rapidly consumed during the high-temperature reliability analysis to form the air gap 250 The electrical reliability may be lowered.

반면, 도 9는 본 발명의 이중층으로 형성된 전자패키지로서, 카파필러(310) 옆면에 금속 솔더(200)가 융착되지 않고 미려한 접착이 이루어졌음을 확인할 수 있다.9 is an electronic package formed of the double layer according to the present invention. It can be confirmed that the metal solder 200 is not fused to the side surface of the cappa pillar 310, but is adhered smoothly.

이는 제2 접착제층(115)이 제1 접착제층(111)보다 먼저 경화되기 때문에, 금속 솔더(200)가 융착 될 때 이미 경화가 이루어진 제2 접착제층(115)으로 밀려 올라가지 못하기 때문이다. 즉, 이와 같이 제2 접착제층(115)이 제1 접착제층(111)보다 먼저 경화되도록 하기 위하여, 제2 접착제층(115)의 경화개시온도가 제1 접착제층(111)의 경화개시온도보다 낮게 형성되어야 한다.This is because the second adhesive layer 115 is hardened prior to the first adhesive layer 111 and can not be pushed up by the second adhesive layer 115 already hardened when the metal solder 200 is fused. That is, in order to allow the second adhesive layer 115 to be cured earlier than the first adhesive layer 111, the curing start temperature of the second adhesive layer 115 is lower than the curing start temperature of the first adhesive layer 111 Should be low.

특히, 제2 접착제층(115)은 제2 전자소자(300)의 표면으로부터 카파필러(310)의 하단 내지 금속 솔더(200)의 중간 부분 사이의 일 지점까지 덮이는 두께로 형성된다. 이와 같은 두께로 형성되는 이유는, 제2 접착제층(115)이 카파필러(310)의 하단 까지 모두 포함하지 않으면 일부의 금속 솔더(200)가 카파필러(310) 옆면에 융착될수 있으며, 제2 접착제층(115)이 금속 솔더(200)의 중간부분보다 더 많은 부분을 포함하는 두께로 형성되면 금속 솔더(200)가 일정 온도에서 충분히 용융되지 못하여 융착이 원활히 이루어지지 않기 때문이다.Particularly, the second adhesive layer 115 is formed to have a thickness covering from the surface of the second electronic element 300 to a point between the lower end of the cappa pillar 310 and the middle portion of the metal solder 200. The reason for this is that if the second adhesive layer 115 does not extend all the way to the lower end of the cappa pillar 310, a part of the metal solder 200 can be fused to the side surface of the cappa pillar 310, If the adhesive layer 115 is formed to have a thickness that includes more than the middle portion of the metal solder 200, the metal solder 200 can not be sufficiently melted at a predetermined temperature and fusion is not smoothly performed.

그리고, 도 10은 이와 같이 이중층으로 형성된 전자패키지를 40N과 100N의 압력으로 노출시킨 결과를 비교한 주사전자현미경 사진으로서, 본 사진 결과로서 본 발명의 이중층으로 형성된 전자패키지는 고압력에 노출시에도 카파필러(310) 옆면에 금속 솔더(200)가 융착되는 것을 방지하게 됨을 확인할 수 있다.10 is a scanning electron micrograph of the result of exposure of the double-layered electronic package with the pressure of 40 N and 100 N. As a result of the photograph, the electronic package formed by the double layer of the present invention, It can be seen that the metal solder 200 is prevented from being welded to the side surface of the filler 310.

상기와 같이 구성되는 본 발명에 관련된 이중층 비전도성 폴리머 접착필름 및 전자패키지에 따르면, 전자패키징 시 금속 솔더 표면에 생성되는 산화물을 제거할 수 있고, 금속 솔더가 카파필러의 측면을 따라 융착되는 것을 방지할 수 있다. According to the double layer nonconductive polymer adhesive film and the electronic package of the present invention constructed as described above, it is possible to remove oxides formed on the surface of the metal solder during electronic packaging and to prevent the metal solder from being fused along the side surface of the kappa pillar can do.

또한, 이와 같이 전자패키징 시 금속 솔더의 융착상태를 제어하여 전자부품의 전기적 신뢰성을 향상시킬 수 있다.In addition, the electrical reliability of the electronic component can be improved by controlling the fusion state of the metal solder in the electronic packaging.

상기와 같은 이중층 비전도성 폴리머 접착필름 및 전자패키지는 위에서 설명된 실시예들의 구성과 작동 방식에 한정되는 것이 아니다. 상기 실시예들은 각 실시예들의 전부 또는 일부가 선택적으로 조합되어 다양한 변형이 이루어질 수 있도록 구성될 수도 있다.
Such a double-layer nonconductive polymer adhesive film and electronic package are not limited to the construction and operation of the embodiments described above. The embodiments may be configured so that all or some of the embodiments may be selectively combined so that various modifications may be made.

100: 이중층 비전도성 폴리머 접착필름
110: 이중층 비전도성 폴리머 접착제층
111: 제1 접착제층
115: 제2 접착제층
200: 금속 솔더
205: 금속 솔더 융착 부분
250: 공극
300: 제2 전자소자
310: 카파필러
400: 제1 전자소자
410: 전극패드100: Double layer nonconductive polymer adhesive film
110: double layer nonconductive polymer adhesive layer
111: first adhesive layer
115: second adhesive layer
200: Metal solder
205: metal solder fused portion
250: air gap
300: second electronic element
310: kappa filler
400: first electronic element
410: Electrode pad

Claims (11)

금속 솔더와 카파필러(Cu pillar)가 구비된 3차원 TSV(Through Silicon Via) 반도체 적층용 또는 플립칩 기판 접속용 비전도성 폴리머 접착제에 있어서,
베이스 필름 상단에 적층 형성되며, 전자패키징 접합 시 상기 금속 솔더의 산화물을 제거하는 플럭스 기능 물질을 발생시키거나, 플럭스 기능 물질을 포함하는 제1 접착제층; 및
상기 제1 접착제층의 상단에 적층 형성되고, 상기 플럭스 기능 물질을 포함하지 않으며, 상기 제1 접착제층 보다 먼저 경화되는 것이 특징인 제2 접착제층;을 포함하는 이중층 비전도성 폴리머 접착필름.
1. A non-conductive polymer adhesive for connecting a three-dimensional through silicon via (TSV) semiconductor laminate or a flip chip board with metal solder and a copper pillar,
A first adhesive layer laminated on top of the base film, for generating a flux-generating material that removes the oxide of the metal solder upon electronic packaging bonding; And
And a second adhesive layer laminated on top of the first adhesive layer and not containing the flux functional material and being cured prior to the first adhesive layer.
청구항 1에 있어서,
상기 플럭스 기능 물질은 전자쌍주개(루이스산)를 생성하는 무수화물로 이루어지며, 경화제 기능을 수행하는 이중층 비전도성 폴리머 접착필름.
The method according to claim 1,
Wherein the flux-functional material comprises an anhydride to produce an electron-pair (Lewis acid) and acts as a curing agent.
청구항 2에 있어서,
상기 무수화물은 화학식 (R1-CO)-O-(CO-R2)로 표시되는 화합물로 이루어지는 군에서 선택되는 어느 하나인 이중층 비전도성 폴리머 접착필름.
단, 여기서 (R1-CO)-,및 -(CO-R2)은 아실기(ACYL GROUP)에서 선택된 작용기임
The method of claim 2,
Wherein the anhydride is any one selected from the group consisting of compounds represented by the formula (R1-CO) -O- (CO-R2).
(R 1 -CO) -, and - (CO-R 2) is a functional group selected from an acyl group
청구항 1에 있어서,
상기 플럭스 기능 물질은 열산발생제(TAG)를 포함하여 이루어지며, 경화를 촉진하는 기능을 수행하는 이중층 비전도성 폴리머 접착필름.
The method according to claim 1,
The flux functional material includes a thermal acid generator (TAG), and performs the function of promoting curing.
청구항 4에 있어서,
상기 열산발생제(TAG)는 R1-SO3-R2 또는 R1-S(=O)2-O-R2의 화학식을 포함하는 화학물질로 이루어지는 군에서 선택되는 어느 하나인 이중층 비전도성 폴리머 접착필름.
여기서, R1 및 R2는 alkyl 또는 aryl 그룹에서 선택되는 작용기임
The method of claim 4,
The thermal acid generator (TAG) is R1-SO 3 -R2 or R1-S (= O) 2 either in double-layer non-conductive polymer adhesive film is selected from the group consisting of chemicals comprising the formula -O-R2.
Wherein R1 and R2 are a functional group selected from alkyl or aryl group
청구항 4에 있어서,
상기 열산발생제(TAG)는 상기 제1 접착제층의 총 중량을 기준으로 1 내지 10 wt% 만큼 포함되는 이중층 비전도성 폴리머 접착필름.
The method of claim 4,
Wherein the thermal acid generator (TAG) is included in an amount of 1 to 10 wt% based on the total weight of the first adhesive layer.
청구항 1에 있어서,
상기 제1 접착제층은 점도가 30 Pas 이상 5000 Pas 이하 사이의 값 중 하나인 이중층 비전도성 폴리머 접착필름.
The method according to claim 1,
Wherein the first adhesive layer is one of a viscosity between 30 Pas and 5000 Pas or less.
청구항 1에 있어서,
상기 제1 접착제층의 점도는 상기 제2 접착제층의 점도보다 낮은 이중층 비전도성 폴리머 접착필름.
The method according to claim 1,
Wherein the viscosity of the first adhesive layer is lower than the viscosity of the second adhesive layer.
청구항 1에 있어서,
상기 제1 접착제층의 경화개시온도는 상기 제2 접착제층의 경화개시온도보다 높은 이중층 비전도성 폴리머 접착필름.
The method according to claim 1,
Wherein the curing initiation temperature of the first adhesive layer is higher than the curing initiation temperature of the second adhesive layer.
금속 솔더와 카파필러(Cu pillar)가 구비된 3차원 TSV(Through Silicon Via) 반도체 적층 또는 플립칩 기판 접속에 있어서,
전기 회로 또는 전극이 형성된 제1 전자소자와 제2 전자소자; 및
상기 제1 전자소자와 상기 제2 전자소자의 사이에 형성된 공간에 채워진 비전도성 폴리머 접착층;을 포함하고,
상기 비전도성 폴리머 접착층은,
상기 제1 전자소자의 표면에 연접 형성되며, 전자패키징 접합 시 상기 금속 솔더의 산화물을 제거하는 플럭스 기능 물질을 발생시키거나, 플럭스 기능 물질을 포함하는 제1 접착제층; 및
상기 제1 접착제층과 상기 제2 전자소자 사이에 형성되고, 상기 플럭스 기능 물질을 포함하지 않으며, 상기 제1 접착제층 보다 먼저 경화되는 것이 특징인 제2 접착제층;을 포함하여 이중층으로 이루어지는 전자패키지.
In a three-dimensional through silicon via (TSV) semiconductor laminate or flip chip board connection with metal solder and Cu pillar,
A first electronic device and a second electronic device having an electric circuit or an electrode formed thereon; And
And a non-conductive polymer adhesive layer filled in a space formed between the first electronic device and the second electronic device,
The nonconductive polymer adhesive layer may be formed,
A first adhesive layer formed adjacent to the surface of the first electronic device and generating a fluxing functional material that removes the oxide of the metal solder when the electronic packaging is bonded; And
And a second adhesive layer formed between the first adhesive layer and the second electronic component and being free of the flux functional material and being cured prior to the first adhesive layer, .
청구항 10에 있어서,
상기 제2 접착제층은 상기 제2 전자소자의 표면으로부터 상기 카파필러의 하단 내지 상기 금속 솔더의 중간 부분 사이의 일 지점까지 덮이는 두께로 형성되는 전자패키지.
The method of claim 10,
Wherein the second adhesive layer is formed to a thickness that covers from a surface of the second electronic device to a point between a lower end of the kappa pillar and an intermediate portion of the metal solder.
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