KR101243803B1 - Apparatus and method for driving image display device - Google Patents

Abstract

The present invention relates to a driving apparatus and a driving method of an image display apparatus capable of improving image quality. An apparatus for driving an image display apparatus according to the present invention comprises: an image display portion having pixel cells formed in a region defined by a plurality of gate lines and a plurality of data lines; A gate driver for sequentially supplying forward scanning pulses to the odd gate line and sequentially supplying reverse scanning pulses to the even gate line; A first data driver for supplying a data voltage to an odd data line in synchronization with the forward scanning pulse; A second data driver for supplying a data voltage to the even data line in synchronization with the reverse scanning pulse; The gate driver and the first and second data drivers are controlled, and source data from the outside is separated into odd data and even data, and the separated odd data is supplied to the first data driver. And a timing controller for supplying the second data driver.

Voltage difference, forward, reverse, scanning

Description

Driving apparatus and driving method of an image display device {APPARATUS AND METHOD FOR DRIVING IMAGE DISPLAY DEVICE}

1 is a view schematically showing a driving device of an image display device according to a first embodiment of the present invention;

FIG. 2 is a block diagram schematically illustrating the timing controller shown in FIG. 1. FIG.

3 is a block diagram schematically illustrating the gate driver illustrated in FIG. 1.

4 is a view schematically showing a driving device of an image display device according to a second embodiment of the present invention;

FIG. 5 is a block diagram schematically illustrating a first gate driver shown in FIG. 4. FIG.

FIG. 6 is a block diagram schematically illustrating a second gate driver shown in FIG. 4. FIG.

<Explanation of Signs of Major Parts of Drawings>

10: image display unit 20: gate driver

30: first data driver 35: second data driver

40: timing controller 42: data processor

44: data control signal generator 46: gate control signal generator

110: data sorter 112: data separator

114: data inversion unit 116: data transmission unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display apparatus, and more particularly, to a driving apparatus and a driving method of an image display apparatus capable of improving image quality.

Conventional liquid crystal display devices display a desired image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display includes a liquid crystal panel having a liquid crystal cell and a driving circuit for driving the liquid crystal panel.

The liquid crystal panel includes a switching element formed in a region defined by a plurality of gate lines and a plurality of data lines, and a liquid crystal cell connected to the switching element.

The switching element supplies the data voltage from the data line to the liquid crystal cell in response to the scan pulse from the gate line.

The liquid crystal cell includes an equivalent liquid crystal capacitor between a pixel electrode supplied with a data voltage and a common electrode supplied with a common voltage through a switching element, and a storage capacitor for maintaining the data voltage charged in the liquid crystal capacitor until the next data voltage is charged. It is configured to include.

The conventional liquid crystal display device applies a scanning pulse to the gate lines sequentially for one frame, and applies a data voltage to each data line to be synchronized with the scanning pulse, thereby adjusting the light transmittance of the liquid crystal cell according to the data voltage. Is displayed. In this case, the liquid crystal display displays an image of one frame by charging a data voltage in units of horizontal periods according to scanning of the first gate line to the last gate line, and then switches to the next frame.

However, in the conventional liquid crystal display, a difference between the voltage charged in each liquid crystal cell of the first horizontal line and the voltage charged in each liquid crystal cell of the last horizontal line occurs due to leakage current and RC delay of the data line over time. .

In particular, in the conventional liquid crystal display device, the leakage current increases because electrons in the channel portion of the TFT are excited under a high temperature environment, and thus the luminance difference generated between the upper and lower portions of the liquid crystal panel becomes larger.

Accordingly, the conventional liquid crystal display device has a problem in that image quality is deteriorated due to flicker, wave noise, and afterimage caused by the luminance difference between upper and lower portions of the liquid crystal panel generated at room temperature and high temperature.

Accordingly, in order to solve the above problems, the present invention is to provide a driving device and a driving method of an image display device to improve the image quality.

According to an aspect of the present invention, there is provided a driving apparatus of an image display device, the image display unit including a pixel cell formed in a region defined by a plurality of gate lines and a plurality of data lines; A gate driver for sequentially supplying forward scanning pulses to the odd gate line and sequentially supplying reverse scanning pulses to the even gate line; A first data driver for supplying a data voltage to an odd data line in synchronization with the forward scanning pulse; A second data driver for supplying a data voltage to the even data line in synchronization with the reverse scanning pulse; The gate driver and the first and second data drivers are controlled, and source data from the outside is separated into odd data and even data, and the separated odd data is supplied to the first data driver. And a timing controller for supplying the second data driver.

An image display apparatus according to an embodiment of the present invention includes an image display unit having a plurality of data lines, a plurality of gate lines intersecting the data lines, two gate lines, and pixel cells defined by the data lines; The pixel cells adjacent in the longitudinal direction of the gate line are connected to different gate lines and data lines.

A driving method of an image display apparatus according to an exemplary embodiment of the present invention is a driving method of an image display unit having pixel cells formed in a region defined by a plurality of gate lines and a plurality of data lines. And a second step of separating into even data, and a second step of sequentially supplying a forward scanning pulse to the odd gate line and simultaneously supplying a reverse scanning pulse to the even gate line, and converting the odd data into a data voltage. And a third step of supplying an odd data line to be synchronized with the forward scanning pulse, and converting the even data into a data voltage and supplying the even data line to be synchronized with the reverse scanning pulse.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings and embodiments.

1 is a view schematically showing a driving device of an image display device according to a first embodiment of the present invention.

Referring to FIG. 1, a driving apparatus of an image display apparatus according to a first exemplary embodiment of the present invention is defined by a plurality of gate lines GL11 to GL1n and GL21 to GL2n and a plurality of data lines DL1 to DLm. Image scanning unit 10 having liquid crystal cells connected to different gate lines GL11 to GL1n and GL21 to GL2n and data lines DL1 to DLm in the horizontal direction, and forward scanning pulses to odd gate lines GL11 to GL1n. The gate driver 20 for sequentially supplying the reverse scanning pulses to the even gate lines GL21 to GL2n and the first data driver 30 for supplying the data voltage to the odd data lines; Control the second data driver 35 for supplying the data voltage to the even data line, the gate driver 20 and the first and second data drivers 30, 35 A timing controller 40 that separates the source data RGB into the odd data and the even data, supplies the odd data with the first data driver 30, and inverts the even data in reverse order to supply the second data driver 35. It is configured to include.

The image display section 10 includes TFTs formed in regions defined by two adjacent gate lines GL11 to GL1n and GL21 to GL2n and respective data lines DL1 to DLm, and liquid crystal cells connected to the TFTs.

The TFT connected to the odd data line DL2i-1 (i is a natural number) is connected to the odd gate lines GL11 to GL1n, and the TFT connected to the even data line DL2i (where i is a natural number) is an even gate. It is connected to the lines GL2n to GL21. The TFT supplies the data voltage from the data line to the liquid crystal cell in accordance with the scanning pulses supplied to the gate lines GL11 to GL1n and GL21 to GL2n.

Since the liquid crystal cell is composed of a common electrode facing each other with a liquid crystal interposed therebetween and a pixel electrode connected to the TFT, the liquid crystal cell may be equivalently represented as a liquid crystal capacitor Clc. The liquid crystal cell includes a storage capacitor Cst for maintaining the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged.

As illustrated in FIG. 2, the timing controller 40 separates source data RGB from the outside into odd data and even data, supplies odd data to the first data driver 30, and inverts even data in reverse order. The data processor 42 for supplying the second data driver 35 to the second data driver 35 and the data control signal DCS for controlling the first and second data drivers 30 and 35. And a gate control signal generator 46 for generating a gate control signal GCS for controlling the gate driver 20.

The data processor 42 includes a data aligner 110, a data separator 112, a data inverter 114, and a data transmitter 116.

The data arranging unit 110 arranges the source data RGB input from the outside so as to be suitable for driving the image display unit 10 and stores the data in the frame unit, and supplies the stored frame unit data to the data separating unit 112. do.

The data separator 112 separates the sorted data RData supplied from the data sorter 110 in units of frames into odd data OData and even data EData.

The data inversion unit 114 inverts the horizontal period of the even data EData of one frame separated by the data separation unit 112 in reverse order, and supplies the inverted even data EData to the data transmission unit 116. do. That is, the data inversion unit 114 inverts even data EData of the first to nth horizontal periods of one frame into even data EData of the nth to first horizontal periods.

The data transmission unit 116 delays the odd data OData separated by the data separation unit 112 while the even data EData is inverted in the data inversion unit 114. The data transmission unit 116 supplies delayed odd data OData to the first data driver 30 and also supplies inverted even data EData to the second data driver 35.

The data control signal generator 44 may use a source clock pulse SSP and a source shift clock using a dot clock DCLK, a data enable signal DE, and horizontal and vertical synchronization signals Hsync and Vsync. SSC, the source output enable SOE, and the polarity control signal POL are generated and supplied to the first and second data drivers 30 and 35.

The gate control signal generator 46 uses a gate clock pulse GSP and a gate shift using a dot clock DCLK, a data enable signal DE, and horizontal and vertical synchronization signals Hsync and Vsync. A clock GSC and a gate output enable GOE are generated and supplied to the gate driver 20.

The gate driver 20 includes 2n stages 1221 to 1222n for simultaneously generating a forward scanning pulse and a reverse scanning pulse in response to the gate control signal GCS from the timing controller 40 as shown in FIG. 3. It is configured by.

Radix stages 122j1 (j1 is 2k-1 and k is a natural number) of the 2n stages 1221 to 1222n include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output from the timing controller 40. A forward scanning pulse is generated according to the enable GOE and sequentially supplied to the odd gate lines GL11 to GL1n. Accordingly, the odd gate lines GL11 to GL1n are scanned from the top to the bottom of the image display unit 10.

The first radix stage 1221 of the radix stages 122j1 is driven by the gate start pulse GSP to transmit the gate shift clock GSC to the first radix gate line GL11 according to the gate output enable GOE. Output as forward scanning pulse. Each of the other radix stages other than the first radix stage 1221 of the radix stages 122j1 is driven by a scanning pulse output from the previous radix stage, so that the gate shift clock GSC is applied according to the gate output enable GOE. ) Is output to the odd gate lines GL12 to GL1n as forward scanning pulses.

At the same time, the even stages 122j2 (j2 is 2k) of the 2n stages 1221 to 1222n are connected to the gate start pulse GSP, the gate shift clock GSC, and the gate output enable GOE from the timing controller 40. Accordingly, a reverse scanning pulse is generated and sequentially supplied to the even gate lines GL21 to GL2n. As a result, the even gate lines GL21 to GL2n are scanned from the lower end of the image display unit 10 to the upper end.

The second nth even stage 1222n of the even stages 122j2 is driven by the gate start pulse GSP to transfer the gate shift clock GSC to the first even gate line GL21 according to the gate output enable GOE. Output in reverse scanning pulse. Each of the even stages except for the nth even stage 1222n of the even stages 122j2 is driven by a scanning pulse output from the previous even stage, so that the gate shift clock GSC is performed according to the gate output enable GOE. ) Is output as reverse scanning pulses to each even gate line GL22 to GL2n.

In FIG. 1, the first data driver 30 is disposed to correspond to the upper end of the image display unit 10 and is connected to the upper side of the odd data lines DL2i-1. The first data driver 30 converts odd data OData supplied from the timing controller 40 into a data voltage, which is an analog video signal, in response to the data control signal DCS supplied from the timing controller 40. The analog video signal for one horizontal line is supplied to the odd data lines DL2i-1 every horizontal period in which the scanning pulses are supplied to the odd gate lines GL11 to GL1n. At this time, the first data driver 30 inverts the polarities of the data voltages supplied to the odd data lines DL2i-1 in response to the polarity control signal POL.

The second data driver 35 is disposed to correspond to the lower end of the image display unit 10 and is connected to the lower side of the even data lines DL2i. The second data driver 35 converts even data OData supplied from the timing controller 40 into a data voltage, which is an analog video signal, in response to the data control signal DCS supplied from the timing controller 40. The data voltage of one horizontal line is supplied to the even data lines DL2i every one horizontal period in which the scanning pulses are supplied to the even gate lines GL21 to GL2n. At this time, the second data driver 35 inverts the polarities of the data voltages supplied to the even data lines DL2i in response to the polarity control signal POL.

The driving apparatus and driving method of the image display apparatus according to the first embodiment of the present invention as described above separate source data RGB into radix and storm data OData and EData and reverse rain data in reverse order. The inverted data is supplied to the liquid crystal cell according to the forward scanning pulse, and the even data EData is supplied to the liquid crystal cell according to the reverse scanning pulse to display a desired image. That is, the driving apparatus of the image display device according to the first embodiment of the present invention supplies the data voltages in opposite directions to the odd data line DL2i-1 and the even data line DL2i.

Therefore, the driving device and the driving method of the image display device according to the first embodiment of the present invention between the liquid crystal cells adjacent in the horizontal direction to the data voltage charging characteristics due to the change in the leakage current that can occur during one frame and RC delay of the data line By compensating for each other, it is possible to prevent a poor image quality due to the luminance difference between the upper and lower portions of the image display unit 10.

The driving device of the image display device according to the first embodiment of the present invention can provide the same effect even in a high temperature environment.

4 is a diagram schematically illustrating a driving device of an image display device according to a second exemplary embodiment of the present invention.

Referring to FIG. 4, a driving apparatus of an image display device according to a second exemplary embodiment of the present invention is defined by a plurality of gate lines GL11 to GL1n and GL21 to GL2n and a plurality of data lines DL1 to DLm. Image display unit 10 having liquid crystal cells connected to different gate lines GL11 to GL1n and GL21 to GL2n in the horizontal direction, and a first for sequentially supplying forward scanning pulses to odd gate lines GL11 to GL1n. The gate driver 220, the second gate driver 225 for sequentially supplying reverse scanning pulses to the even gate lines GL21 to GL2n, and the first data driver 30 for supplying a data voltage to the odd data line. ), A second data driver 35 for supplying a data voltage to the even data line, first and second gate drivers 220 and 225, and first and second data drivers 30 and 35. And separating the source data RGB from the outside into odd data and even data, supplying odd data with the first data driver 30, and inverting the even data in reverse order to supply the second data driver 35. It is configured to include a controller 40.

Since the driving apparatus of the image display apparatus according to the second exemplary embodiment of the present invention is the same as the first exemplary embodiment of the present invention except for the first and second gate drivers 220 and 225, the description of the same configuration will be omitted. The description will be replaced with the above description.

As illustrated in FIG. 5, the first gate driver 220 generates the forward scanning pulse according to the gate start pulse GSP, the gate shift clock GSC, and the gate output enable GOE from the timing controller 40. And n stages 2221 to 222n for generating and sequentially supplying the odd gate lines GL11 to GL1n. At this time, the forward scanning pulse is sequentially supplied from the first odd gate line GL11 located at the top of the image display unit 10 to the nth odd gate line GL1n located at the bottom of the image display unit 10.

The first stage 2221 of the n stages 2221 to 222n is driven by the gate start pulse GSP to shift the gate shift clock GSC according to the gate output enable GOE to the first odd gate line GL11. Output as a forward scanning pulse. Each of the remaining stages 2222 to 222n except for the first stage 2221 among the n stages 2221 to 222n is driven by a scanning pulse output from the previous stages 2221 to 222n to enable a gate output ( According to GOE, the gate shift clock GSC is outputted to the odd gate lines GL12 to GL1n as forward scanning pulses.

The second gate driver 225 generates the reverse scanning pulse according to the gate start pulse GSP, the gate shift clock GSC, and the gate output enable GOE from the timing controller 40 as shown in FIG. 6. Therefore, n stages 2251 to 225n for sequentially supplying the even gate lines GL21 to GL2n are configured. At this time, the reverse scanning pulse is sequentially supplied from the first even gate line GL21 located at the bottom of the image display unit 10 to the nth even gate line GL2n located at the top of the image display unit 10.

The first even stage 2251 of the n stages 2251 to 225n is driven by a gate start pulse GSP to shift the gate shift clock GSC according to the gate output enable GOE to the first even gate line Output to GL21 as a reverse scanning pulse. Each of the remaining stages 2252 to 225n of the n stages 2251 to 225n except for the first even stage 2251 is driven by a scanning pulse output from the previous stage even stages 2251 to 225n-1. The gate shift clock GSC is output to the even gate lines GL22 to GL2n as reverse scanning pulses according to the gate output enable GOE.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention It will be apparent to those skilled in the art.

The source data according to the embodiment of the present invention as described above is separated into odd and even data, and the inverse order is reversed, and the odd data is supplied to the liquid crystal cell according to the forward scanning pulse and the even data is reversely scanned. Is supplied to the liquid crystal cell to display a desired image.

Accordingly, the present invention compensates each other between the adjacent liquid crystal cells in the horizontal direction for changes in leakage current that may occur during one frame and RC voltage delay of the data line to compensate for image quality defects caused by luminance differences between upper and lower portions of the image display unit. It can prevent.

Claims (21)

An image display unit having pixel cells formed in a region defined by a plurality of gate lines and a plurality of data lines; A gate driver for sequentially supplying forward scanning pulses to the odd gate line and sequentially supplying reverse scanning pulses to the even gate line; A first data driver for supplying an odd data voltage to an odd data line in synchronization with said forward scanning pulse; A second data driver for supplying an even data voltage to an even data line in synchronization with the reverse scanning pulse; Controlling the gate driver and the first and second data drivers, separating source data from the outside into the odd data and the even data, and supplying the separated odd data to the first data driver while simultaneously separating the separated rain A timing controller for supplying data to the second data driver; The timing controller A data processor for separating the source data into the odd data and the even data; A gate control signal generator configured to generate a gate control signal for controlling the gate driver; A data control signal generator for generating data control signals for controlling the first and second data drivers; The data processing unit A data alignment unit to align the source data in units of frames; A data separator which separates frame unit data supplied from the data sorter into the odd data and the even data; A data inversion unit for inverting a horizontal period of the even data supplied from the data separation unit in a reverse order; And a data transmission section for supplying the odd data from the data separation section to the first data driver and supplying even data from the data inversion section to the second data driver. Device. The method of claim 1, The pixel cell is defined by two gate lines and each data line. And the pixel cells adjacent in the longitudinal direction of the gate line are connected to different gate lines and different data lines. The method of claim 2, Each of the pixel cells connected to the odd data line is connected to the odd gate line, And each of the pixel cells connected to the even data line is connected to the even gate line. delete delete The method of claim 1, The first data driver converts the odd data into the data voltage according to the data control signal, and supplies the odd data to an upper side of the odd data line. And the second data driver converts the even data into the data voltage according to the data control signal and supplies the even data to the lower side of the even data line. The method of claim 1, The gate driver is disposed on one side of the image display unit, Odd stages for sequentially supplying a forward scanning pulse to the odd gate line according to the gate control signal; And stormwater stages for sequentially supplying reverse scanning pulses to the storm gate line in response to the gate control signal. The method of claim 1, The gate driver includes: A first gate driver disposed on one side of the image display unit and configured to sequentially supply a forward scanning pulse to the odd gate line according to the gate control signal; And a second gate driver disposed on the other side of the image display unit and sequentially supplying reverse scanning pulses to the even gate line according to the gate control signal. 9. The method according to claim 7 or 8, The odd gate line is scanned from the upper end to the lower end of the image display unit; And the even gate line is scanned from the lower end to the upper end of the image display unit. delete delete delete delete A driving method of an image display unit having pixel cells formed in a region defined by a plurality of gate lines and a plurality of data lines, A first step of separating source data from outside into radix data and storm data, A second step of sequentially supplying the forward scanning pulse to the odd gate line and the reverse scanning pulse to the even gate line sequentially; Converting the odd data into a data voltage and supplying the odd data line to be synchronized with the forward scanning pulse, and converting the even data into a data voltage and supplying it to the even data line to be synchronized with the reverse scanning pulse. and, The first step is Sorting the source data frame by frame; Dividing the data arranged in units of frames into the odd data and the even data; And inverting the horizontal period of the even data in reverse order. 15. The method of claim 14, The pixel cell is defined by two gate lines and each data line. And the pixel cells adjacent in the longitudinal direction of the gate line are driven by different gate lines and different data lines. 16. The method of claim 15, Each of the pixel cells connected to the odd data line receives the data voltage according to the forward scanning pulse supplied to the odd gate line, And each of the pixel cells connected to the even data line is supplied with the data voltage according to the reverse scanning pulse supplied to the even gate line. delete 17. The method of claim 16, The second step, Sequentially supplying the forward scanning pulses to the radix gate lines using radix stages disposed on one side of the image display unit; And sequentially supplying the reverse scanning pulse to the even gate line by using the even stages arranged on one side of the image display unit. 17. The method of claim 16, The second step, Sequentially supplying the forward scanning pulse to the odd gate line using a plurality of stages disposed on one side of the image display unit; And sequentially supplying the reverse scanning pulse to the even gate line using a plurality of stages arranged on the other side of the image display unit. 20. The method according to claim 18 or 19, The odd gate line is scanned from the upper end to the lower end of the image display unit; And the even gate line is scanned from the lower end to the upper end of the image display unit. 17. The method of claim 16, The third step, Converting the odd data into the data voltage, and supplying the odd data to an upper side of the odd data line; And converting the even data into the data voltage and supplying the even data to the lower side of the even data line.

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