KR101182013B1 - Thin film transistor substrate and display device having the thin film transistor substrate - Google Patents

Abstract

The contact resistivity of the transparent conductive film or oxide semiconductor layer which is directly connected to the metal wiring film is suppressed, and the hillock resistance and the electrical resistivity of the metal wiring film are suppressed without lowering the dry etching rate of the metal wiring film or etching residue. Provided is a thin film transistor substrate suppressed and a display device comprising the thin film transistor substrate.
An Al alloy containing a thin film transistor substrate and a metal wiring film containing Ni: 0.05 to 1.0 atomic%, Ge: 0.3 to 1.2 atomic%, La and / or Nd: 0.1 to 0.6 atomic%, formed by patterning by a dry etching method. It is a laminated film which consists of a film and a Ti film, The said Ti film is directly connected with the said oxide semiconductor layer, and the said Al alloy film is directly connected with the said transparent conductive film.

Description

A display device having a thin film transistor substrate and a thin film transistor substrate {THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE HAVING THE THIN FILM TRANSISTOR SUBSTRATE}

The present invention relates to a thin film transistor substrate having an oxide semiconductor layer, a metal wiring film, a transparent conductive film, and a display device (device) provided with the thin film transistor substrate in that order from the substrate side. The thin film transistor substrate of this invention is typically used for flat panel displays, such as a liquid crystal display (liquid crystal display device), an organic electroluminescent display, for example. Hereinafter, although a liquid crystal display device is represented and demonstrated as an example, this invention is not limited to this.

In recent years, displays using oxide semiconductors for semiconductor layers (channel layers) of organic EL displays and liquid crystal displays have been developed. For example, Patent Document 1 discloses a compound or mixture in which a zinc oxide (ZnO); cadmium oxide (CdO); zinc oxide (ZnO) is added an IIB element, an IIA element, or a VIB element as a transparent semiconductor layer in a semiconductor device. Any one of them is used, which is doped with impurities having high resistance without losing the transparency of the 3d transition metal element, the rare earth element, or the transparent semiconductor.

An oxide semiconductor has high carrier mobility compared with amorphous silicon conventionally used as a material of a semiconductor layer. Moreover, since an oxide semiconductor can be formed into a film by sputtering method, compared with formation of the layer which consists of said amorphous silicon, the board | substrate temperature can be reduced in temperature. As a result, since a resin substrate etc. with low heat resistance can be used, a flexible display can be implement | achieved.

As the oxide semiconductor, in addition to the ZnO and the like, in recent years, a high-molecular oxide amorphous semiconductor (amorphous In-Ga-Zn-O, hereinafter referred to as "a-IGZO") made of indium, gallium, zinc, and oxygen is used. What formed the semiconductor layer in FIG. Is applied to the thin film transistor. For example, Patent Document 2 shows an amorphous oxide semiconductor layer having a composition ratio of indium, gallium, and zinc of 1: 1: 1.

Japanese Patent Application Laid-Open No. 2002-76356 Japanese Patent Application Publication No. 2007-73701

However, Al alloys such as pure Al or Al-Nd or the like (hereinafter, These may be collectively referred to as "Al system").

However, for example, an oxide semiconductor is used for a semiconductor layer of a bottom gate type TFT, and an Al-based film is used for a source electrode or a drain electrode (hereinafter, collectively referred to as a "source drain electrode"). When the oxide semiconductor layer and the Al-based film are directly connected, high resistance aluminum oxide is formed at the interface between the oxide semiconductor layer and the Al-based film, whereby the connection resistance (contact resistance, contact electrical resistance) is increased, and the display quality of the screen is lowered. There is a problem such as being. In particular, when a thermal history of 300 ° C. or more is added in the manufacturing process, aluminum oxide is formed at the interface between the oxide semiconductor layer and the Al-based film, which causes the above problem.

In addition, in recent years, while the size of the panel has increased in liquid crystal displays (LCDs), the necessity of high definition has also increased, and the need for high definition of LCDs, that is, the miniaturization of wiring widths of the source electrode and the drain electrode has been required. Instead of the conventional wiring patterning by wet etching, by performing dry etching using plasma, the technique of etching with the wiring width set by the mask becomes essential.

As the halogen gas used for the dry etching of the Al-based film, since the compounds of Al and F (fluorine) are nonvolatile, fluorine cannot be used, and chlorine (Cl ₂ ), boron trichloride (BCl ₃ ) and hydrogen embrittlement (HBr Etchant gas containing at least any one of

However, halogen radicals such as Cl dissociated by the plasma react with Al on the surface of the Al-based film, which is the etching target, to form chlorides such as AlClx. These chlorides, such as AlClx, are evaporated in the gas phase by the ion bombardment assist effect by applying the substrate bias, and are exhausted out of the vacuum vessel in which the substrate is loaded. When the vapor pressure of the produced chloride is low, the etching rate is lowered, resulting in lower throughput. In addition, since chloride remains on the Al-based film surface without evaporation, etching residues (residual etching occurring during dry etching) are generated. In addition, since the selectivity with the resist is small in the dry etching of the Al-based film, the decrease in the etching rate must be coped with by increasing the thickness of the resist. In this case, since the resolution in lithography needs to be lowered, Resolution was difficult. In particular, if an etching residue occurs, short circuits such as Al-based wiring may cause shortening of the yield of the semiconductor device.

As another problem, conventionally, a barrier metal layer made of a high melting point metal such as Mo, Cr, Ti, W, or the like is formed at an interface between an Al-based wiring and a transparent conductive film (pixel electrode such as ITO) so that they do not directly contact each other. Was doing. If the Al-based wiring is directly connected to the transparent conductive film of the TFT without interposing the barrier metal layer, subsequent steps (e.g., a film forming step such as an insulating layer formed on the TFT, heat such as sintering and annealing) This is because the Al history diffuses in the transparent conductive film due to the thermal history in the process and the like, and the TFT characteristics are deteriorated or the electrical resistance of the Al-based wiring is increased. For example, after the formation of the Al-based wiring, the silicon nitride film (protective film) is formed at a temperature of about 100 to 300 ° C. by the CVD method or the like, but since Al is very easily oxidized, without the barrier metal layer, the Al-based wiring Hump-shaped projections called hillocks are formed on the surface, causing problems such as deterioration of the display quality of the screen. In the absence of the barrier metal layer, Al is easily oxidized by oxygen generated during the film forming process of the liquid crystal display, or oxygen added during the film formation, and an insulating layer of Al oxide is formed at the interface between the Al-based wiring and the transparent conductive film. As a result, contact resistance (contact resistance) may increase.

The present invention has been made in view of the above circumstances, and its object is to reduce the dry etching rate and to generate the residue (etching residue) after the dry etching, furthermore, the electrical resistivity after the heat treatment is low, and the oxide is further reduced. A thin film transistor substrate having a metal wiring film having a reduced contact resistivity with a semiconductor layer or a transparent conductive film is provided. Moreover, this invention provides the display apparatus provided with the thin film transistor substrate which has the said characteristic.

MEANS TO SOLVE THE PROBLEM This invention which could solve the said subject is a thin film transistor board | substrate provided with the oxide semiconductor layer of a thin film transistor, the metal wiring film directly connected with the said oxide semiconductor layer, and the transparent conductive film in order from a board | substrate side on a board | substrate. The metal wiring film includes an Al alloy film containing Ti: 0.05 to 1.0 atomic%, Ge: 0.3 to 1.2 atomic%, La and / or Nd: 0.1 to 0.6 atomic%, formed by patterning by a dry etching method, and Ti. It is a laminated film which consists of a film, It has a summary that the said Ti film is directly connected with the said oxide semiconductor layer, and the said Al alloy film is directly connected with the said transparent conductive film.

In this invention, it is also preferable embodiment that the film thickness of the said Ti film is 10-100 nm.

Also includes at least any one kind of phosphorus also are a preferred embodiment, the metal wiring film, chlorine (Cl _2), 3 boron chloride (BCl _3), bromide hydrogen (HBr) to the metal wiring film is formed by sputtering It is also a preferred embodiment formed by a dry etching method using an etchant gas.

Moreover, in this invention, it is also preferable embodiment that the said oxide semiconductor consists of an oxide containing at least 1 sort (s) of element chosen from the group which consists of In, Ga, Zn, and Sn.

Moreover, the display device in which the thin film transistor substrate as described above is provided is also a preferred embodiment.

According to the present invention, the reduction of the dry etching rate and the generation of the etching residue of the metal wiring film used for the thin film transistor substrate can be suppressed, and the electrical resistivity after the heat treatment is also low, and is directly connected to the oxide semiconductor layer or the transparent conductive film. In this case, a thin film transistor substrate having a metal wiring film having a reduced contact resistivity can be provided. Moreover, according to this invention, the display apparatus provided with the thin film transistor substrate which has these characteristics can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS The schematic cross section explanatory drawing which shows one preferable embodiment of the TFT substrate of this invention.
FIG. 2 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 1 in order; FIG.

MEANS TO SOLVE THE PROBLEM As a result of earnestly researching in order to solve the said subject, as a result, the metal wiring film of a thin-film transistor board | substrate is formed by the dry etching method, and Ni: 0.05-1.0 atomic%, Ge: 0.3 as a metal wiring film is carried out. It has been found that the above problems can be solved by using a laminated film composed of an Al alloy film (transparent conductive film side) and a Ti film (oxide semiconductor layer side) containing from 1.2 to 1.2 atomic%, La and / or Nd: 0.1 to 0.6 atomic%. And the present invention.

EMBODIMENT OF THE INVENTION Hereinafter, although preferred embodiment of the TFT substrate of this invention and its manufacturing method is demonstrated, referring drawings, this invention is not limited to this. In addition, although the example which used the metal wiring film of this invention for the source electrode and the drain electrode is shown below, the metal wiring film of this invention is not limited to the various wirings formed from a metal film, but is formed integrally with these wirings. This is also intended to include a source electrode, a drain electrode, and the like.

1 is a schematic cross-sectional view illustrating a preferred embodiment of a TFT substrate according to the present invention. The TFT substrate 9 shown in FIG. 1 has a bottom gate type, and in order from the substrate 1 side, the gate electrode 2, the gate insulating film 3, the oxide semiconductor layer 4, and the source electrode 5. It has the structure which laminated | stacked the drain electrode 6 (Hereinafter, it may be called a source 5-drain 6 electrode), and the protective layer 7 sequentially.

The metal wiring film (source 5-drain 6 electrode) directly connected to the oxide semiconductor layer 4 is a laminated film made of a Ti film and an Al alloy film, and the Ti film is formed of the oxide semiconductor layer 4. At the same time, the Al alloy film is directly connected to the transparent conductive film 10.

In the present invention, by forming the metal wiring film as a laminated structure (laminated film) of the Ti film and the Al alloy film, while reducing the electrical resistivity of the metal wiring, the contact resistivity of the oxide semiconductor layer or the transparent conductive film is reduced and the oxide semiconductor layer And direct connection with the transparent conductive film can be ensured. Hereinafter, the laminated film which consists of Ti film and Al alloy film of this invention is demonstrated.

First, with respect to the composition of the Al alloy film, the present inventors used an Al alloy film in which various elements were added to Al, and the contact resistivity when the Al alloy film and the transparent conductive film were directly connected, the electrical resistivity and the heel resistance of the Al alloy film. As a result of investigating the lockability, it was found that Al alloys (Ni-Ge- (La / Nd) -Al alloys) in which Ni, Ge, and La and / or Nd were added in a specific amount were effective for these properties.

In particular, a Ni-Ge- (La / Nd) -Al alloy film can be directly connected without a transparent conductive film and a barrier metal. This is considered to be because, when the Al alloy film containing Ni is heated, the intermetallic compound of Ni precipitates at grain boundaries and into grains, which becomes a conductive path at the interface between the transparent conductive film and the Al alloy film.

Moreover, it turned out that the hillock resistance improves by addition of La and / or Nd.

In addition, when Ge, La and / or Nd are added, fine crystals of Ge-La and / or Ge-Nd are precipitated by heat treatment, and Ni is dissolved in the crystals, so that a transparent conductive film and a small amount of Ni are added. Contact stability of is obtained. Therefore, compared with the case where Ni is added alone, the contact resistivity at the time of directly connecting a transparent conductive film and an Al alloy film is aimed at the amount of alloying elements in which Ni, Ge, La, and / or Nd was added less. While increasing the wiring resistance, it is possible to suppress the decrease in the dry etching rate.

In order to form the source drain electrode finely, it is necessary to perform patterning by dry etching, but at least one of chlorine (Cl ₂ ), boron trichloride (BCl ₃ ), and hydrogen embrittlement (HBr) is included. When dry etching using an etchant gas, halogen radicals such as Cl dissociated by plasma react with Al on the surface of the Al alloy film as an etching target to form AlClx or Ni, Ge, La and / or Nd chlorides. do. Since these Ni, Ge, La and / or Nd chlorides have lower vapor pressures than AlClx, they cause a decrease in the etching rate and a decrease in throughput, so that the addition of elements (Ni, Ge, La and / or Nd) It is preferable to reduce content.

In view of the above, the Al alloy film used in the present invention contains Ni: 0.05 to 1.0 atomic%, Ge: 0.3 to 1.2 atomic%, and La and / or Nd: 0.1 atomic% to 0.6 atomic% as an alloying element. It was. The addition amount of each additional element is as follows.

Ni: 0.05 to 1.0 atomic%

Ni is an element which contributes to reduction of contact resistance with a transparent conductive film, and Ni content is made into 0.05 atomic% or more in order to fully exhibit such an effect. Preferable Ni content is 0.1 atomic% or more, More preferably, it is 0.2 atomic% or more. On the other hand, when there is too much Ni content, since dry etching rate will fall significantly, the upper limit was made into 1.0 atomic%. Preferable Ni content is 0.6 atomic% or less, More preferably, it is 0.3 atomic% or less.

Ge: 0.3 to 1.2 atomic%

Ge is an element which contributes to reduction of contact resistance with a transparent conductive film, and in order to fully exhibit such an effect, Ge content shall be 0.3 atomic% or more. Preferable Ge content is 0.4 atomic% or more, More preferably, it is 0.45 atomic% or more. On the other hand, when there is too much Ge content, since dry etching rate will fall significantly, the upper limit was made into 1.2 atomic%. Preferable Ge content is 0.8 atomic% or less, More preferably, it is 0.5 atomic% or less.

0.1 to 0.6 atomic percent of La and / or Nd in total

La and Nd are elements which contribute to the reduction of contact resistance with a transparent conductive film and the improvement of the hillock resistance, and may be added independently or may use both together. In order to fully exhibit such an effect, content of the said element (it is individual content when it contains La and Nd independently, and it is a total amount when it contains both) is made into 0.1 atomic% or more. Preferable content of La and / or Nd is 0.15 atomic% or more, More preferably, it is 0.2 atomic% or more. On the other hand, when there is too much content of the said element, since dry etching rate will fall significantly, the upper limit was made into 0.6 atomic%. Content of preferable La and / or Nd is 0.5 atomic% or less, More preferably, it is 0.35 atomic% or less.

The Al alloy film used for this invention contains the said alloy component, and remainder Al and an unavoidable impurity.

Content of each alloying element in the said Al alloy film can be calculated | required, for example by ICP emission analysis (inductively coupled plasma emission analysis) method.

Although the film thickness of the said Al alloy film is not specifically limited, What is necessary is just to set it as desired thickness, For example, it is preferable to set it as about 100-300 nm.

Next, the Ti film used for this invention is demonstrated. In the present invention, the metal wiring film is a laminated film composed of an Al alloy film and a Ti film. When the thermal history in the above-described manufacturing process is received, aluminum oxide is formed to increase the contact resistivity of the oxide semiconductor layer. This is because the formation of aluminum oxide can be suppressed by the Ti film. That is, the increase in the contact resistivity with the oxide semiconductor layer can be suppressed by forming the Ti film on the oxide semiconductor layer side. In addition, the Ti film is excellent in dry etching properties, does not cause a decrease in the etching rate, and also does not generate an etching residue after etching. Moreover, since Ti film can carry out dry etching as it is after dry-etching an Al alloy film, it is also preferable on manufacture.

The composition of the Ti film is pure Ti (substantially meaning Ti and the residual amount unavoidable impurity) which consists essentially of Ti.

The thickness of the Ti film may be appropriately determined in consideration of the wiring resistivity of the metal wiring film and the contact stability of the oxide semiconductor. However, in order to sufficiently exhibit the effect, the film thickness of the Ti film is preferably 10 nm or more, more preferably 15 nm or more. It is done. On the other hand, when the film thickness becomes too thick, the wiring resistance of the metal wiring film itself may increase, so the film thickness of the Ti film is preferably 100 nm or less, more preferably 50 nm or less.

In order to form such a laminated film of the Ti film and the Al alloy film, after forming the oxide semiconductor layer, a Ti film is formed by sputtering or the like, and then the Al alloy film is formed directly on the Ti film by sputtering or the like.

In the above embodiment, an example in which a laminated film of an Al alloy film and a Ti film of the present invention is adopted as the source electrode and / or the drain electrode is shown. However, the drain wiring portion (not shown) in the gate electrode, the scan line (not shown), and the signal line are not shown. ), And various wirings and electrodes may also be comprised by the laminated film of the said Ti film and Al alloy film, In this case, all the metal wiring in a TFT board | substrate can be made into the same component composition.

In addition, the TFT substrate of this invention can be employ | adopted not only in the bottom gate type like the said embodiment but also in the top gate type TFT substrate.

The board | substrate 1 will not be specifically limited if it is used for a liquid crystal display device. Typically, the transparent substrate represented by a glass substrate, a silicone resin substrate, etc. is mentioned. The material of the glass substrate is not particularly limited as long as it is used in a display device, and examples thereof include alkali-free glass, high strain point glass, soda lime glass, and the like. Or heat resistant resin substrates, such as a board | substrate, such as a metal foil, and an imide resin, are mentioned.

Examples of the gate insulating layer 3, the protective layer 7, and the channel protective layer 8 include a dielectric (for example, SiN, SiON, and SiO ₂ ). Preferably, it is because an oxide semiconductor is, so that excellent properties under a reducing atmosphere degradation, the use of SiO ₂ or SiON capable of performing film formation under the oxidizing atmosphere is recommended that as SiO ₂ or SiON.

The oxide semiconductor layer 4 is preferably made of an oxide containing at least one element selected from the group consisting of In, Ga, Zn, and Sn. More preferably, it consists of an oxide containing at least 1 type of element chosen from the group which consists of In, Ga, and Zn. Specifically, for example, transparent oxides such as In oxide, In-Sn oxide, In-Zn oxide, In-Sn-Zn oxide, In-Ga oxide, Zn-Ga oxide, In-Ga-Zn oxide, and Zn oxide Can be mentioned. Preferably it is an oxide of amorphous structure. In particular, an amorphous oxide (a-IGZO) containing In, Ga, and Zn is preferable because a highly mobile oxide semiconductor layer can be formed.

As the transparent conductive film 10 which comprises a pixel electrode, the oxide conductive film normally used for a liquid crystal display device etc. can be mentioned, For example, amorphous ITO, poly-ITO, IZO, ZnO is mentioned.

The manufacturing of the TFT substrate of the present invention is not particularly limited, except that it satisfies the requirements of the present invention and sets the deposition conditions of the laminated film made of the Ti film and the Al alloy film to the recommended conditions described above. What is necessary is just to employ | adopt the general process of an apparatus.

Hereinafter, an example of the manufacturing method of the TFT substrate shown in said FIG. 1 is demonstrated, referring FIG. In Fig. 2, the same reference numerals as those in Fig. 1 are given. In addition, below, it demonstrates as an example of a manufacturing method, and this invention is not limited to this.

First, the Al alloy film of desired film thickness (for example, 100-300 nm) is laminated | stacked on the glass substrate 1 using the sputtering method. By patterning this Al alloy film, the gate electrode 2 is formed (see Fig. 2A). At this time, in FIG. 2B to be described later, the peripheral edge of the Al alloy film constituting the gate electrode 2 is etched into a tapered shape of about 30 ° to 40 ° so that the coverage of the gate insulating film 3 is good. It is good to put.

Next, as the gate insulating film 3, a SiN film having a desired film thickness (for example, 50 to 200 nm) is formed by using the CVD method. As the oxide semiconductor layer 4, an oxide semiconductor layer made of a-IGZO (for example, about 30 to 100 nm in thickness) is used under an oxidizing atmosphere (eg, a mixed gas atmosphere of Ar and O ₂ ). Oxygen content 1 vol%)] and under a condition of substrate temperature: room temperature, a film is formed by reactive sputtering using a target having a composition of, for example, In: Ga: Zn (atomic ratio) = 1: 1: 1 (FIG. 2). See (b) of).

Subsequently, photolithography is performed to etch the a-IGZO film by wet etching (for example, oxalic acid) to form the oxide semiconductor layer 4 (see FIG. 2C).

After the oxide semiconductor layer 4 is formed, a Ti film is formed, for example, by a film thickness of about 10 to 100 nm by the sputtering method. Subsequently, an Al alloy film is formed on the Ti film by a sputtering method, for example, about 100 to 300 nm.

At the time of sputtering, in order to prevent an aluminum oxide film from being formed as mentioned above, it is preferable to set it as non-oxidizing atmosphere (for example, Ar atmosphere). Moreover, it does not specifically limit about sputter power, A normal sputter power may be sufficient.

Further, an Al alloy film may be formed, and then, for example, heat treatment may be performed at 250 ° C. for 30 minutes (see FIG. 2 (d)).

The Ti film and the Al-based alloy thin film are preferably formed by a sputtering method. It is because according to the sputtering method, desired component composition can be easily obtained by adjusting the composition of the target to be used.

The photolithography and dry etching are performed on the laminated film of the Ti film and the Al alloy film to form a source electrode 5 and a drain electrode 6 (see FIG. 2E).

As the halogen gas used for dry etching, compounds of Al and F (fluorine) are nonvolatile and cannot be used. Therefore, at least any one of chlorine (Cl ₂ ), boron trichloride (BCl ₃ ) and hydrogen embrittlement (HBr) is used. An etchant gas containing one species is used. The etching of the Ti film and the Al-based alloy thin film may be performed under the same conditions (atmosphere, sputtering power, etc.) or may be different conditions. For example, even if CF ₄ , CHF ₃ , Cl ₂ , H ₂ , or the like is used for etching of Ti, good etching can be performed.

Moreover, in this invention, the dry etching method is employ | adopted from a viewpoint of forming a fine metal wiring. In the wet etching method, it is difficult to form fine metal wirings, and since the resistance to the wet etching solution is required for the metal wirings, it is necessary to consider the component composition of the metal wirings so as to impart the resistance. This may affect other characteristics such as wiring resistance.

Subsequently laminated film is formed by the protective layer 7 made of SiO ₂ in the CVD method (refer to (f) in Fig. 2). Thereafter, the contact portion with the source and drain electrodes is patterned by photolithography to perform contact hole etching. This etching is, for example, by using the RIE etching apparatus, it can be carried out, a contact hole etched by Ar / CHF ₃ plasma. Then, in an Ar gas atmosphere, a transparent conductive film 10 (for example, 10 mass% of tin oxide is added to indium oxide as an ITO film) is formed to form an Al alloy film and a transparent layer of the laminated film through a contact hole. The TFT substrate 9 of the present invention to which the conductive film is directly connected can be obtained (see FIG. 1).

By using the TFT substrate obtained in this way, for example, a display device can be completed by a method generally performed. The thin film transistor substrate according to the present invention can be used for various electronic devices. For example, it can be used as a thin film transistor substrate of display devices, such as a liquid crystal display and an organic EL disk.

<Examples>

Hereinafter, although an Example is given and this invention is demonstrated further more concretely, this invention is not restrict | limited by the Example from the original, but adds and implements a change suitably in the range which may be suitable for the purpose of the previous and the later. Of course, it is possible, and they are all included in the technical scope of this invention.

(Example 1)

Dry etching evaluation

In the present Example, the dry etching property of Al alloy film was evaluated using the sample produced by the following method.

(Making of sample)

First, a silicon substrate was prepared, and a silicon oxide film (SiO ₂ : 100 nm thick) was formed by thermal oxidation. Next, various Al alloy films shown in Table 1 were formed on the silicon oxide film by a sputtering method (film thickness of 300 nm). Specifically, as a sputtering apparatus using a Shimadzu formate whether or sikki manufactured claim HSR542-type magnetron sputtering apparatus, the film forming conditions: Back pressure = 3 × 10 ^-4 ㎩ or less, atmospheric gas = Ar, the gas pressure = 5mTorr, sputtering power 260W, substrate temperature = Al alloy film was formed into a film by room temperature. In addition, pure Al was used for the sputtering target for formation of the pure Al film.

The composition of the Al alloy film formed as described above was confirmed by quantitative analysis using an ICP emission spectrophotometer (“ICP-8000” manufactured by Shimadzu Corporation), where at% means atomic%. The same applies to Tables 2 and 3).

Next, application of resist, exposure and development (developer: tetramethylammonium hydroxide aqueous solution (TMAH)) are performed by photolithography to perform patterning (line and space: 10 µm / 10 µm), and the resist pattern is used as a mask. Dry etching of the Al alloy film was performed.

For dry etching, an ICP (inductively coupled plasma) type dry etching apparatus described in Japanese Patent Application Laid-Open No. 2004-55842 was used. The plasma generating apparatus used the plasma processing apparatus (etcher) of an induction window of a flat plate type (TCP (Transfer-Coupled Plasma) type]. The device is provided with a one-turn 13.56 MHz RF antenna on a flat quartz induction window through a matching device, and a high density plasma is generated by inductive coupling directly under the quartz induction window. As the substrate susceptor on which the substrate was loaded, a low frequency of 400 Hz substrate bias was used. The etching conditions were gas flow rate: Ar / Cl ₂ / BCl ₃ = 300/200 / 60sccm, gas pressure: 1.9 kPa, power applied to the antenna (source RF): 500 W, substrate temperature (susceptor temperature): 20 ° C. .

After etching, to prevent after-corrosion (hydrochloric acid (HCl) is generated by the reaction of moisture in the air with the reaction product attached to the resist or Al wiring pattern, the Al alloy is corroded), without opening the atmosphere from the chamber without vacuum While maintaining the state, the ashing treatment (ashing) with oxygen plasma was performed to remove the resist (post-treatment).

In addition, the etching rate used the etching time as a factor, and performed the said etching and post-processing, and computed the etching rate (etch amount per unit time).

In the table, the etching rate of each sample represents the ratio with respect to the pure Al film (No. 1).

(Evaluation of Etching)

The etching rate made 0.5 or more pass ((circle)).

The results are shown in Table 1 and Table 2.

From Table 1, 2, it can consider as follows. That is, in Nos. 2 to 22 and Nos. 24 to 50 in which the component composition of the Al alloy film satisfies the requirements of the present invention, the ratio of the etching rate to pure Al (No. 1) was 0.5 or more. On the other hand, in No. 23, since the La amount exceeded the regulation of the present invention, the ratio of the etching rate was low, and in No. 51, the ratio of the etching rate was low because the Nd amount exceeded the regulation of the present invention.

(Example 2)

Evaluation of Etch Residue

A silicon oxide film (SiO ₂ ) was formed on the silicon substrate in the same manner as in Example 1, and then a Ti film and an Al alloy film were sequentially formed by sputtering to form a laminated film by simulating a source drain electrode on the oxide film. .

In the same manner as in Example 1, a pure Ti film and various Al alloy films shown in Table 1 were sequentially formed on the silicon oxide film by sputtering so as to be 300 nm in total (each film thickness is shown in Table 3). And laminated film were obtained.

As a comparative example, the pure Al film and the pure Ti film produced as a comparative example in which the pure Al film (No. 1) and the pure Ti film (No. 2) were formed in the same manner, respectively, were pure Al and pure Ti sputtering targets. Used for.

The composition of the Al alloy film formed as mentioned above was confirmed by quantitative analysis using an ICP emission spectrometer (ICP emission spectrometer "ICP-8000" manufactured by Shimadzu Corporation).

Next, after forming a resist pattern by the method similar to Example 1, dry etching of the metal film was performed. The Al alloy film of the pure Al film (No. 1) and the laminated film of the Al alloy film / Ti film of Nos. 3 to 19 was subjected to dry etching under the same conditions as in Example 1, and then to dry etching of the Ti film under the following conditions. It was done.

The etching conditions of the Ti film were gas flow rate: CF ₄ / O ₂ = 80 / 20sccm, gas pressure: 20 kPa, power (source RF) applied to the antenna: 100 W, substrate temperature (susceptor temperature): 20 ° C. .

After the Ti film was etched, the Ti film was further etched and completely removed (over etching) in order to examine the etching residue.

A plurality of places (any 3 places, field size 20 × 160 μm) exposed by etching were observed using a scanning electron microscope (SEM), and 0.3 μm or more in diameter (the residual shape was the largest in diameter). Table 3 (etching residue) shows the result of having evaluated the presence or absence of the residue of the thing which investigated the long part, and evaluated the pass ((circle)) when the residue was not observed in any of the measurement places.

(Example 3)

Electrical resistivity of wiring

Except for changing the substrate to the glass substrate (Eagle 2000 manufactured by Corning), a Ti film and an Al alloy film were sequentially formed on the glass substrate in the same manner as in Example 2 to obtain a laminated film (composition and film thickness are the same as those in Example 2). .

Next, similarly to Example 2, after forming a resist pattern, the Al film and the Ti film were sequentially dry-etched. In Example 3, it processed into stripe pattern shape of width 100micrometer and length 10mm by dry etching.

As a comparative example, in the same manner as in Example 2, a pure Al film and a pure Ti film were formed and dry-etched.

After the etching, a manufacturing process was simulated and heat treatment (atmosphere: N ₂ ) for 30 minutes was performed at a temperature of 320 ° C. After the heat treatment, the electrical resistivity was measured by the four-terminal method. An electrical resistivity (4.8 µΩcm) of about 1.5 times the electrical resistivity (3.3 µΩcm) of the pure Al thin film was regarded as a good value, and those below the reference value were evaluated as good, and those exceeding the reference value were evaluated as defective. The results are shown in Table 3 (electric resistivity).

(Example 4)

Hillock resistant

A glass substrate (Eagle2000, manufactured by Corning) was prepared, and an oxide semiconductor layer (a-IGZO) was formed by sputtering. Specifically, using the same sputtering apparatus as in Example 1, a target (composition: In: Ga: Zn (atomic ratio) = 1: 1: 1) was prepared, and reactive sputtering (back pressure: 3 × 10 ⁻⁴⁾ 분위기, atmosphere gas: mixed gas atmosphere of Ar and O ₂ (oxygen content: 1 vol%), gas flow rate: 5 mmTorr, sputter power: 200 W, substrate temperature: 25 ° C. (room temperature)]; A layer was formed (film thickness 30 nm).

Subsequently, a Ti film and an Al alloy film were sequentially formed on the oxide semiconductor layer by the same method as in Example 2 to obtain a laminated film (composition and film thickness are the same as those in Example 2).

Next, similarly to Example 2, after forming a resist pattern, the Al film and the Ti film were sequentially dry-etched. In Example 4, it processed into the line-and-space pattern shape of 10 micrometers width by dry etching.

As a comparative example, in the same manner as in Example 2, a pure Al film and a pure Ti film were formed and dry-etched.

After the etching, a manufacturing process was simulated and heat treatment (atmosphere: N ₂ ) for 30 minutes was performed at a temperature of 320 ° C. After the heat treatment, the surface of the Al alloy film was observed with an electron microscope (observation points: three at random, a field of view: 120 x 160 탆), and the number of hillocks having a diameter of 0.1 탆 or more was counted (the diameter is the longest portion of the heellock). Calculated). That of the hillock density, 1 × 10 rated, 1 × 10 ⁹ / ㎡ less than that of ⁹ / ㎡ as good (○) were evaluated as bad (×). The results are shown in Table 3 (Hillock Resistance).

(Example 5)

Contact resistivity with IGZO

The contact resistance between the pure Al film (No. 1), the pure Ti film (No. 2), the Ti film and the laminated films (Nos. 3 to 19) of various Al alloys and the oxide semiconductor layer was produced as follows. It investigated by the TLM method using one TLM element.

In detail, an oxide semiconductor layer (a-IGZO) was first formed on a glass substrate in the same manner as in Example 4 (film thickness of 100 nm). Subsequently, the SiO ₂ film formation 200㎚ by the CVD method, and by performing a photolithography patterning of the contact portions of the source and drain electrodes, in the RIE etching apparatus, was subjected to a contact hole is etched by means of Ar / CHF ₃ plasma.

Next, after ashing and removing the reaction layer on the resist surface, the resist was completely peeled off with a stripping solution (TOK106 manufactured by Tokyo Okagyo Co., Ltd.).

As the metal film for the source drain electrode, a Ti film and a laminated film (Nos. 3 to 19) of various Al alloys were formed thereon. Film-forming conditions at this time were made into atmospheric gas = Ar, pressure = 2mTorr, and substrate temperature = room temperature.

Subsequently, by forming a pattern of the TLM element by photolithography, dry etching the metal film using the resist as a mask, and peeling the resist, a plurality of electrodes are formed, and the distance between adjacent electrodes is various. Got. The pattern of the said TLM element was made into the pattern of 10 micrometers, 20 micrometers, 30 micrometers, 40 micrometers, 50 micrometers pitch, 150 micrometers width x 300 micrometers in length. Then, heat processing for 30 minutes was performed at 320 degreeC.

For comparison, samples using the pure Al film (No. 1) and pure Ti film (No. 2) were similarly prepared.

Using the TLM element thus obtained, the current-voltage characteristic between the plurality of electrodes was measured, and the resistance value between each electrode was obtained. The contact resistivity was calculated | required from the relationship between the resistance value between each electrode and distance between electrodes obtained in this way (TLM method).

The said measurement produced 100 or more TLM elements about each metal film, measured three of them, measured the said contact resistivity, and calculated | required the average value. The results are shown in Table 3 (contact resistance with IGZO). The thing (1) of 1x10 <^-3> ohm ^- cm < ² > or less was evaluated as good ((circle)), and the thing exceeding 1x10 < ^-3 > (ohm) cm <2> was evaluated as defective (x).

(Example 6)

Contact resistivity with ITO

Contact resistance of a pure Al film (No. 1), a pure Ti film (No. 2), a laminated film (No. 3 to 19) of a Ti film and various Al alloy films, and a transparent conductive film formed so as to directly connect with these metal films Was investigated by the following method.

Specifically, first, a Ti film shown in Table 3 and an Al alloy film (Nos. 3 to 19) having various compositions were sequentially formed on the glass substrate under the sputtering conditions described in Example 2.

Continuously subjected to the patterning of the contact portions of the source and drain electrodes by 200㎚ film deposition, photolithography, and the SiO ₂ by a CVD method, in the RIE etching apparatus, was subjected to a contact hole is etched by means of Ar / CHF ₃ plasma.

Samples in which an ITO film was formed on various Al-based alloy electrodes shown in Table 3 were formed under an Ar gas atmosphere under a pressure of 0.4 kPa and a temperature of 200 ° C. As the ITO film, one obtained by adding 10% by mass of tin oxide to indium oxide was used.

For comparison, samples using the pure Al film (No. 1) and pure Ti film (No. 2) were similarly prepared.

The contact resistivity produced the Kelvin pattern which has a contact hole of 10 micrometers x 10 micrometers, and measured it by the 4-terminal method. This result is shown in the column of contact resistivity with ITO of Table 3. The thing (1) of 1x10 < ^-3 > (ohm) cm < ² > or less was good ((circle)) and the thing exceeding 1x10 < ^-3 > (ohm) cm < ² > was made into defect (x).

 From Table 3, it can consider as follows. First, about the etching residue (Example 2), even if it contained the alloy element of the predetermined amount prescribed | regulated by this invention, an etching residue did not generate | occur | produce (No. 3-19).

Regarding the electrical resistivity of the metal wiring film (Example 3), the electrical resistivity of the laminated films (Nos. 3 to 19) consisting of an Al alloy film and a Ti film containing a predetermined amount of alloying elements specified in the present invention is pure Al. It was within 1.5 times the electrical resistivity of the film No. 1, and showed favorable electrical resistivity. On the other hand, the pure Ti film No. 2 had a high electrical resistivity, which resulted in a poor electrical resistivity.

Regarding the hillock resistance (Example 4) of the metal wiring film, the hillock resistance of the laminated films (Nos. 3 to 19) consisting of an Al alloy film and a Ti film containing a predetermined amount of the alloying element specified in the present invention is a good result. Indicated. On the other hand, the pure Al film (No. 1) showed a result of poor hillock resistance.

About the contact resistivity (Example 5) of a metal wiring film and oxide semiconductor layer (IGZO), the laminated film which consists of an Al alloy film and Ti film containing a predetermined amount of alloying elements prescribed | regulated by this invention (No.3-19). ) And the oxide semiconductor layer (IGZO) exhibited good contact resistivity. On the other hand, the pure Al film No. 1 had a high contact resistivity of the oxide semiconductor layer IGZO, which resulted in a poor contact resistance with IGZO.

About the contact resistivity (Example 6) of a metal wiring film and a transparent conductive film (ITO), the laminated film which consists of an Al alloy film and Ti film containing a predetermined amount of alloying elements prescribed | regulated by this invention (No.3-19). ) And the transparent conductive film (ITO) both exhibited good contact resistivity. On the other hand, the pure Al film No. 1 had a high contact resistivity with the transparent conductive film ITO and a poor contact resistance with ITO.

According to the results of the above Examples 1 to 6, the laminated film made of the Ti film and the Al alloy film that satisfies the requirements of the present invention does not cause a decrease in the dry etching rate or the etching residue, and furthermore, in Examples 2 to 6 described above. As shown, the various characteristics were excellent. On the other hand, in the laminated film (No. 23, 51 of Example 1), the pure Al film (No. 1 of Example 2), and the pure Ti film (No. 2 of Example 2) deviating from the requirements of the present invention, etching Various characteristics shown in the above Examples 2 to 6, such as a decrease in the rate (Nos. 23 and 51 of Example 1) and an increase in electrical resistivity, are not good (Nos. 1 and 2 of Example 2), and are required as wiring films. The above characteristics of the present invention could not be satisfied.

1: substrate
2: gate electrode
3: gate insulating film
4: oxide semiconductor layer
5: source electrode
6: drain electrode
7: protective layer
8: channel protective layer
9: TFT substrate
10: transparent conductive film

Claims (6)

On a substrate, it is a thin-film transistor board | substrate provided with the oxide semiconductor layer of a thin film transistor, the metal wiring film directly connected with the said oxide semiconductor layer, and the transparent conductive film in order from a board | substrate side, The said metal wiring film is a dry etching method. It is a laminated film which consists of an Al alloy film and Ti film which contain Ni: 0.05-1.0 atomic%, Ge: 0.3-1.2 atomic%, and at least one of La and Nd: 0.1-0.6 atomic% formed by patterning by A film is directly connected to the oxide semiconductor layer, and the Al alloy film is directly connected to the transparent conductive film. The method of claim 1,
A thin film transistor substrate, wherein the Ti film has a film thickness of 10 to 100 nm. The method according to claim 1 or 2,
The thin film transistor substrate in which the said metal wiring film is formed by the sputtering method. The method according to claim 1 or 2,
The metal wiring film is formed by a dry etching method using an etchant gas containing at least one of chlorine (Cl ₂ ), boron trichloride (BCl ₃ ), and hydrogen embrittlement (HBr). The method according to claim 1 or 2,
The oxide semiconductor is a thin film transistor substrate comprising an oxide containing at least one element selected from the group consisting of In, Ga, Zn and Sn. The thin film transistor substrate of Claim 1 or 2 is provided, The display device characterized by the above-mentioned.

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