KR101171855B1 - Supporting substrates for semiconductor light emitting device and high-performance vertical structured semiconductor light emitting devices using supporting substrates - Google Patents
Supporting substrates for semiconductor light emitting device and high-performance vertical structured semiconductor light emitting devices using supporting substrates Download PDFInfo
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- KR101171855B1 KR101171855B1 KR20080068521A KR20080068521A KR101171855B1 KR 101171855 B1 KR101171855 B1 KR 101171855B1 KR 20080068521 A KR20080068521 A KR 20080068521A KR 20080068521 A KR20080068521 A KR 20080068521A KR 101171855 B1 KR101171855 B1 KR 101171855B1
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Abstract
The present invention relates to a support substrate prepared for high-brightness light emitting devices using a group 3-5 compound semiconductor having a vertical structure, and a method of manufacturing a high brightness light emitting device using the support substrate. The prepared supporting substrate (PSS) includes a sacrificial layer, a heat sink layer, and a bonding layer, which are sequentially stacked on the selected support substrate (SSS), and the SSS is formed of an electrical conductor or an electrical insulator. The sacrificial layer is made of a material dissolved in a wet solution. The method of manufacturing a high brightness light emitting device using the PSS may include preparing a first wafer on which a semiconductor multilayer light emitting structure is grown on an initial growth substrate, preparing a PSS, and wafer bonding the first wafer and the PSS. And separating and removing the first growth substrate of the first wafer from the bonded result, proceeding to subsequent processes such as forming an ohmic contact electrode and heat treatment on the resultant, and cutting into a single chip.
According to the present invention, a group III-nitride-based semiconductor light emitting device having a vertical structure having improved overall performance by reducing damage of a semiconductor single crystal multilayer structure separated from an initial growth substrate by using a PSS having an electrical conductor or an electrical insulator SSS. Can be provided.
40, 50, 780, 980, 1180: PSS, 400, 500, 782, 982, 1182: SSS, 410, 510, 784, 984, 1184: Sacrificial layer, 420, 422, 520, 522, 786, 986, 1186 : Heat sink layer, 430, 530, 788, 988, 1188: PSS bonding layer, 60, 80, 10: Semiconductor light emitting device, 600, 800, 1000: First growth substrate, 680, 880, 1080: First ohmic contact Electrode, 610, 810, 1010: buffer layer, 620, 820, 1020: n-type semiconductor cladding layer, 630, 830, 1030: light emitting active layer, 640, 840, 1040: p-type semiconductor cladding layer, 650, 850, 1050: first 2 ohmic contact electrode, 660, 860, 1060: first bonding layer, 910, 1110: temporary support substrate (TSS)
Description
The present invention is a "prepared supporting substrate (hereinafter referred to as" PSS ") used in the manufacture of a high-performance vertical light emitting device using a multi-layer light-emitting structure thin film composed of a group 3-5 nitride-based semiconductor and the The present invention relates to a light emitting device having a high performance vertical structure manufactured using PSS and a method of manufacturing the same.
More specifically, in the Group 3-5 nitride-based semiconductor light emitting device having an vertical ohmic contact electrode structure in the vertical direction, the first growth substrate used for growing the Group 3-5 nitride-based semiconductor ( That is, the multilayer light emitting thin film from Al2O3, SiC, Si, GaAs, GaP is subjected to laser lift-off, chemo-mechanical polishing, or wet-etching process. Prior to lift-off, the semiconductor is separated from the sapphire, which is a growth substrate by using a wafer bonded process and a support substrate (PSS) prepared for use as a support substrate (PSS) by bonding to the resultant. The present invention relates to a semiconductor light emitting device having a high performance vertical structure and minimizing damage of a single crystal multilayer light emitting structure thin film, and as a result, to improve overall performance.
In general, semiconductor light emitting devices include a light-emitting diode (LED) and a laser diode (LD) that generate light when a forward current flows. In particular, the LED and the LD have a p-n junction in common, and when a current is applied to the light emitting elements, the current is converted into a photon so that light is emitted from the device. Light emitted from LEDs and LDs varies from long-wavelength light to short-wavelength light range depending on the type of semiconductor material. Above all, visible light using LEDs made of semiconductors with wide band-gap semiconductors. It is possible to realize red, green, and blue areas, which are widely applied to display parts of various electronic devices, traffic signals, and various display light source devices. Recently, due to the development of white light sources, it is widely used in next-generation general lighting light source devices. It is sure to be possible.
In general, group III-nitride-based semiconductors are the first growth substrates of sapphire, silicon carbide (SiC), which have significantly different lattice constants and thermal expansion coefficients in order to obtain high quality semiconductor thin films. It is growing hetero-epitaxially on top of silicon (Si). However, Sapphire's first growth substrate has the disadvantage of not being able to apply a large current to the LED due to poor thermal conductivity, and since Sapphire's first growth substrate is an electrical insulator, it is difficult to cope with static electricity flowing from the outside. There is a big problem that is likely to cause failure. These problems not only lower the reliability of the device but also cause a lot of process constraints in the packaging process.
In addition, the first growth substrate of sapphire, which is an electrical insulator, has a multi-layered n-type ohmic contact electrode (hereinafter referred to as 'first ohmic contact electrode') and a p-type ohmic contact electrode (hereinafter referred to as 'second ohmic contact electrode'). In addition to having a mesa structure that is formed in the same direction as the growth direction of the light emitting structure, the LED chip area must also be larger than a certain size, so there is a limit to reducing the LED chip area. It is an obstacle to the improvement of the LED chip output which is a light emitting element.
As described above, in addition to the shortcomings of the mesa structure LED fabricated on the sapphire, which is the first growth substrate, it is difficult to dissipate a large amount of heat inevitably generated when driving the light emitting device to the outside due to the poor thermal conductivity of the sapphire growth substrate. have. For this reason, there is a limit to the application of a mesa structure in which sapphire is attached to a light emitting device used in a large area and a large capacity (that is, a large current), such as a large display and a general light source. That is, when a large current is injected into the light emitting device for a long time, the internal temperature of the light emitting active layer is gradually increased due to a large amount of heat generated, thereby causing a problem that the LED luminous efficiency gradually decreases.
Unlike sapphire, silicon carbide (SiC) growth substrates have excellent thermal and electrical conductivity, and at the same time, lattice constant and thermal expansion coefficient (TEC), which are important variables in growing high-quality semiconductor single crystal thin films, Similar to the Group 3-5 nitride-based semiconductors, a good multilayer light emitting structure thin film has been successfully stacked / grown, and various types of vertical light emitting devices have been manufactured. However, since it is not easy to manufacture a good quality SiC growth substrate, it is considerably higher cost than other single crystal growth substrates, and as a result, there are many limitations in applying to mass production.
However, in view of current technology, economy, and performance, it is most desirable to manufacture a high-performance light emitting device using a multilayer light emitting structure laminated / grown on a sapphire growth substrate. As described above, in order to solve the LED problems of the mesa structure fabricated using a thin film, which is a group III-nitride-based semiconductor multilayer light emitting structure stacked / grown on the sapphire, which is the first growth substrate, the first growth of sapphire recently. After growing a high quality multilayer light emitting structure thin film on the substrate, the group 3-5 nitride-based semiconductor multilayer light emitting structure thin film is lifted off safely from sapphire, and a high performance vertical light emitting diode using the same Many efforts have been made to fabricate vertical structured LEDs.
1 is a cross-sectional view illustrating a process of separating the first growth substrate sapphire using a laser lift off (LLO) technique according to the prior art. As shown in FIG. 1, when the laser beam, which is a strong energy source, is irradiated to the backside of the
As a result, various methods have been proposed for minimizing damage and breakage of the Group 3-5 nitride-based semiconductor multilayer light emitting structure thin film when the sapphire, which is the first growth substrate, is separated using the LLO process. Figure 2 is a growth direction by introducing wafer bonding and electroplating (electroplating or electroless plating) process before performing the LLO process, according to a conventional technique for preventing damage and breakage of the semiconductor multilayer light emitting structure thin film ([0001]) is a cross-sectional view showing a process of forming a stiffening supporting substrate (stiffening supporting substrate) is in close contact. Referring to FIG. 2A, a semiconductor single crystal multilayer light emitting structure is formed from the
FIG. 3 is a cross-sectional view of a group 3-5 nitride-based semiconductor light emitting device having a vertical structure manufactured by grafting a support substrate that is structurally stable and strongly adhered to the LLO process according to the conventional technique using the method of FIG. 2. admit.
3A is a cross-sectional view illustrating a semiconductor light emitting device manufactured by using the method of forming the supporting substrate of FIG. 2A. Referring to (a) of FIG. 3, which shows a cross-section of the LED bonded to the wafer bonding, the
However, the
Meanwhile, FIG. 3B is a cross-sectional view of a semiconductor light emitting device manufactured by using the method of forming the supporting substrate of FIG. 2B. Referring to Figure 3 (b) showing a cross-sectional view of the LED grafted with electroplating, a vertical light emitting device (LED) produced by the LLO and electroplating process graft is a
The
Therefore, when fabricating vertical group III-nitride semiconductor light emitting devices using the LLO process, many subsequent processes including wafer bending and cracking, micro crack generation, annealing and single chip processes ( Considering post-processing constraints and low product yield, an efficient support substrate and a high-performance vertical light emitting device manufacturing process using the same must be developed.
An object of the present invention for solving the above problems is a wafer warpage when wafer bonding a sapphire and a support substrate, which is the first growth substrate on which a group 3-5 nitride-based semiconductor multilayer light emitting structure thin film is laminated / grown, with a bonding material. Is not prepared at all, and after the LLO process, a "prepared ready substrate" for obtaining a nitride-based semiconductor single crystal multilayer thin film having no cracking and no micro-crack in the semiconductor multilayer light emitting structure is obtained. supporting substrate "(PSS)".
Another object of the present invention is to use a PSS as described above, after laminating / growing a multi-layered light emitting structure thin film composed of group III-nitride-based semiconductor single crystal on the sapphire, which is the first growth substrate, including efficient support substrate manufacturing and LLO. By providing a variety of thin film separation process to provide a high-performance vertical structure of group 3-5 nitride-based semiconductor light emitting device that can minimize the damage (damage) and breaking (breaking) of the semiconductor single crystal thin film.
Still another object of the present invention is to provide a method of manufacturing a group 3-5 nitride-based semiconductor light emitting device having the high performance vertical structure described above.
A prepared supporting substrate (hereinafter referred to as 'PSS') according to a feature of the present invention for achieving the above object is Mo, Cu, Ni, Nb, Ta, Ti, Au, Ag as an electrical conductor. A selected supporting substrate made of a metal selected from Cr, NiCr, CuW, CuMo, or NiW (hereinafter, referred to as 'SSS'); A sacrificial layer formed on the SSS; A heat-sink layer formed on the sacrificial layer and made of a thermal and electrical conductor; And a bonding layer formed on the heat sink layer.
According to another aspect of the present invention, a prepared support substrate for a semiconductor light emitting device may include a selected supporting substrate formed of an electrical conductor or an electrical insulator (hereinafter, referred to as 'SSS'); A sacrificial layer formed on the SSS and made of a material soluble by a wet etching solution; A heat-sink layer formed on the sacrificial layer and being a thermal and electrical conductor; And a bonding layer formed on the heat sink layer and formed of an alloy of soldering or brazing including at least one of Ga or Sn.
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According to another aspect of the present invention, a semiconductor light emitting device having a vertical structure includes a semiconductor multilayer light emitting structure including an n-type semiconductor cladding layer, a light emitting active layer, and a p-type semiconductor cladding layer; And a support substrate disposed under the semiconductor multilayer light emitting structure, wherein a second bonding layer, a heat sink layer, a sacrificial layer, and a selective support substrate (SSS) are sequentially stacked, and the semiconductor multilayer light emitting structure includes: the semiconductor The second bonding layer is bonded to the second bonding layer by a first bonding layer interposed between the multilayered light emitting structure and the support substrate.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor light emitting device having a vertical structure. Preparing a first wafer on which contact electrodes and a first bonding layer are stacked; (b) preparing a second wafer (PSS) in which a sacrificial layer, a heat sink layer, and a second bonding layer are sequentially stacked on the selection support substrate SSS, which is an electrical conductor; (c) bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer; (d) separating the first growth substrate of the first wafer from the result of step (c); (e) forming a first ohmic contact electrode on the n-type semiconductor clad layer and passivating a side surface of the semiconductor multilayer light emitting structure; And (f) cutting the resultant of step (e) into a single chip when the thickness of the heat sink layer of the second wafer is greater than or equal to 0.1 micrometers and less than or equal to 30 micrometers.
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In addition, the method for manufacturing a semiconductor light emitting device having a vertical structure according to another aspect of the present invention (a) a semiconductor multilayer light emitting structure including an n-type semiconductor cladding layer, a light emitting active layer and a p-type semiconductor cladding layer on the first growth substrate, Preparing a first wafer on which a second ohmic contact electrode and a first bonding layer are stacked; (b) preparing a second wafer (PSS) in which a sacrificial layer, a heat sink layer, and a second bonding layer are sequentially stacked on the selection support substrate SSS, which is an electrical insulator; (c) bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer; (d) separating the first growth substrate of the first wafer from the result of step (c); (e) forming a first ohmic contact electrode on the n-type semiconductor clad layer and passivating a side surface of the semiconductor multilayer light emitting structure; And (f) cutting the resultant of step (e) into a single chip.
In the step (f), when the thickness of the heat sink layer of the second wafer is greater than 80 micrometers or less than 500 micrometers, the sacrificial layer is wet etched with a wet etching solution to separate and remove the selected supporting substrate, and then a single chip. Cut into,
In the step (f), if the thickness of the heat sink layer of the second wafer is greater than 30 micrometers or less than 80 micrometers, the sacrificial layer is wet etched with a wet etching solution to separate and remove the selected supporting substrate, and A third support substrate is bonded to the heat sink layer by using a three bonding layer, and then cut into a single chip.
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As described above, according to the present invention, the first and second ohmic contact electrodes are positioned on the upper and lower surfaces of the group 3-5 nitride semiconductor single crystal multilayer light emitting structure, respectively, to improve the yield of LED chips, which are light emitting devices per wafer, and the first growth substrate. Separation of the sapphire has the advantage that it is easy to manufacture a LED, a light emitting device of a vertical structure in which heat dissipation and antistatic effectively. In addition, according to the present invention, before the separation of the sapphire growth substrate using the laser lift-off process, the sapphire growth substrate is grouped using the laser lift-off process by performing wafer bonding of the prepared support substrate with no wafer warpage. Micro cracks or cracks in group III-nitride semiconductors, which reduce the stress that group III-nitride semiconductor layers will receive when separated from the group 5 nitride semiconductor multilayer light emitting structure, and group III-nitride semiconductors The loss of separation of the thin film into the wafer bonding material is minimized.
In addition, when fabricating a light emitting device as a group 3-5 nitride-based semiconductor multilayer light emitting structure on the prepared support substrate, it is possible to freely follow-up processes such as heat treatment and passivation, and as a result, high reliability light emission without any thermal and mechanical damage A device can be obtained. In addition, when a highly reliable light emitting device fabricated on the prepared support substrate is subjected to a unified chip process, a wet etching process may be used rather than a conventional machine and laser processing, and thus it may be achieved in a wafer bonding technique using a conventional support substrate. It has the advantage of greatly improving chip yield and productivity which were not available.
In addition, in the present invention, many unified light emitting devices (LEDs) fabricated on top of a "prepared support substrate (PSS)" wafer, which are invented, are not mechanically polished without some mechanical processing such as sawing or laser scribing. In addition, a light emitting device having a high performance vertical structure having a single chip shape may be manufactured by using a sacrificial layer formed on the prepared support substrate PSS.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a prepared support substrate (PSS) according to a preferred embodiment of the present invention, a group 3-5 nitride-based semiconductor light emitting device having a vertical structure using the same, and a method of manufacturing the same will be described in detail.
Prepared support substrate ( PSS First preferred Example
Hereinafter, the structure and manufacturing process of the PSS according to the preferred embodiment of the present invention will be described with reference to FIG. 4.
Figure 4 (a) is a cross-sectional view showing a PSS according to a preferred embodiment of the present invention.
Referring to FIG. 4A, the PSS 40 is referred to as a selected supporting substrate (hereinafter referred to as 'SSS') 400, a
Hereinafter, the structure and manufacturing process of the above-described PSS will be described in detail.
The selected supporting substrate (hereinafter referred to as 'SSS') 400 is characterized by having excellent thermal and electrical conductivity. The
The selective supporting
The
The heat-
The
The
In addition, the PSSs 40 and 42 shown in FIGS. 4A and 4B have a heat sink layer having a thin thickness of 80 micrometers or less on top of the
On the other hand, the
Prepared support substrate ( PSS 2nd of) Example
Hereinafter, a PSS according to another embodiment of the present invention will be described.
5 is a cross-sectional view illustrating the PSSs according to another embodiment of the present invention. The
The
The
In more detail, the
The heat sink layer 520 is composed of a metal, an alloy, or a solid solution having excellent thermal and electrical conductivity, so that a large amount of heat generated when driving a light emitting device can be smoothly dissipated to the outside, and a strong bonding and support of upper and lower layers is provided. (support) role.
Therefore, the heat sink layer 520 is preferably composed of a metal, an alloy, or a solid solution having excellent thermal and electrical conductivity. For example, Cu, Ni, Ag, Mo, Al, Au, Nb, W, Ti, It is preferably made of a metal selected from Cr, Ta, Al, Pd, Pt, Si or an alloy containing at least one of them, and having a thickness of 0.1 to 500 micrometers.
The heat sink layer 520 may be formed by physical vapor deposition (PVD) or chemical vapor deposition (CVD). However, the heat sink layer 520 may be formed by electroplating or electroless plating.
The
In addition, as shown in (a) to (e) of Figure 5, the PSS according to the present embodiment is correlated with the thickness of the heat sink layer 520 stacked on top of the
PSS First of the semiconductor light emitting device using Example
Hereinafter, the structure and manufacturing process of the first embodiment of the semiconductor light emitting device using the PSS according to the present invention will be described in detail with reference to FIGS. 6 and 7.
6 is a cross-sectional view of a semiconductor
More preferably, the first
The
Hereinafter, referring to FIGS. 7A to 7F, the manufacturing process of the high performance vertical semiconductor
Referring to FIG. 7, the manufacturing process of the high performance vertical semiconductor
Hereinafter, each process step described above will be described in detail.
Referring to FIG. 7A, the first wafer preparation step, which is a step a process, lifts off a multi-layered light emitting structure thin film composed of a group 3-5 nitride-based semiconductor from a growth substrate by applying an LLO process. In order to do this, a high quality semiconductor single crystal multilayer thin film is necessarily laminated / grown on a transparent sapphire growth substrate. Low and high temperature buffer layer (low and high temperature buffer layer), which is a basic multilayer light emitting structure thin film of a light emitting device, is formed on top of the
Next, a high reflective second
In addition, before performing wafer bonding with the second wafer, which is the
In the a-stage process, the first organic substrate, the transparent
The high
In addition, it is preferable to perform at least one heat treatment step before the wafer bonding in order to further improve the interfacial bonding force between the layers, including forming the highly reflective second ohmic contact electrode.
Referring to FIG. 7B, a step of preparing a second wafer including the
The
In more detail, the
The
The
The
Referring to FIG. 7C, the next c step process, wafer bonding, bonds the first wafer and the second wafer by a thermocompressive method. Heat-compression bonding in the step c process is preferably carried out at a pressure of 1Mpa to 200Mpa at a temperature of 100 ℃ or more.
Next, referring to FIG. 7 (d), the step d process is a step of separating the sapphire substrate, which is the first growth substrate, by using LLO technology. In order to separate the first growth substrate, the laser beam, a strong energy source, is irradiated through the transparent sapphire back-side, resulting in a strong laser absorption at the interface between the semiconductor single crystal multilayer light emitting structure and the sapphire. The first growth substrate sapphire is lifted off by thermo-chemical dissolution reaction of gallium nitride (GaN) at the interface. At this time, it is preferable to include the step of treating the surface of the group 3-5 nitride-based semiconductor thin film exposed to air with at least one of H 2 SO 4 , HCl, KOH, BOE at 30 ℃ to 200 ℃ temperature. In addition to the LLO method, the
Next, referring to FIG. 7E, the e-step process includes passivation, dry-etching, and first ohmic contact of the light emitting device, including wafer cleaning, which is a postannealing process. Electrode material deposition and heat treatment are performed. The step e is performed to form a thermally stable first
In addition, the first
Next, referring to FIG. 7F, the step f process is a step of finally manufacturing a single chip. The final single chip fabrication process uses a
PSS Second of the semiconductor light emitting device using Example
Hereinafter, the structure and manufacturing process of the second embodiment of the semiconductor light emitting device using the PSS according to the present invention will be described in detail with reference to FIGS. 8 and 9.
8 is a cross-sectional view of a semiconductor
More preferably, the first
The
Accordingly, in the semiconductor light emitting device according to the present embodiment, the
Hereinafter, referring to FIGS. 9A to 9H, a manufacturing process of a high-performance vertical semiconductor
First, referring to FIG. 9A, the step a is a step of preparing a first wafer by forming a semiconductor multilayer light emitting structure on the
Next, a high reflective second
In addition, before performing wafer bonding with the second wafer, which is the
The highly reflective second
Next, referring to FIG. 9B, the step b process is a step of preparing the
The
Referring to FIG. 9C, wafer bonding, which is the next step c, bonds the first wafer and the second wafer by a thermocompressive method. Heat-compression bonding in the step c process is preferably carried out at a pressure of 1Mpa to 200Mpa at a temperature of 100 ℃ or more.
Next, referring to FIG. 9 (d), the d step process is to lift off the transparent sapphire substrate, which is the
Next, referring to FIG. 9E, the step e process is a subsequent process step. The subsequent process may form a thermally stable first ohmic contact electrode 880 through the first ohmic contact electrode material deposition and heat treatment process on the
In addition, the first ohmic contact electrode 880 may include Al, Ti, Cr, Ta, Ag, Al, Rh, Pt, Au, Cu, Ni, Pd, In, La, Sn, Si, Ge, Zn, Mg, NiCr, PdCr, CrPt, NiTi, TiN, CrN, SiC, SiCN, InN, AlGaN, InGaN, rare earth metals and alloys, metallic silicides, semiconducting silicides, CNTNs (carbonnanotube networks), transparent conductive It is preferable to form a material including at least one of a transparent conducting oxide (TCO) and a transparent conducting nitride (TCN).
Next, referring to FIGS. 9F and 9G, the step f process is completed in two steps. First, a temporary supporting substrate (TSS) 910 is attached to the prepared opposite direction of the PSS with an organic or inorganic bonding material, and then HF, BOE, or H, depending on the material used as the
Next, referring to FIG. 9 (h), it is a step of finally completing a single chip. First, the
PSS Third of the semiconductor light emitting device using Example
Hereinafter, the structure and manufacturing process of the third embodiment of the semiconductor light emitting device using the PSS according to the present invention will be described in detail with reference to FIGS. 10 and 11.
10 is a cross-sectional view of a semiconductor
More preferably, the first
The
Therefore, in the light emitting device according to the present embodiment, the thick heat sink layer 1186 emits light without the support of the third supporting substrate after the
Hereinafter, referring to FIGS. 11A to 11H, a manufacturing process of a semiconductor
First, referring to FIG. 11A, in the step a, a semiconductor multilayer light emitting structure is formed on a transparent sapphire growth substrate, which is the
Next, referring to FIG. 11B, the step b process is a step of preparing the
Referring to FIG. 11C, wafer bonding, which is the next step c, bonds the first wafer and the second wafer by a thermocompressive method. Heat-compression bonding in the step c process is preferably carried out at a pressure of 1Mpa to 200Mpa at a temperature of 100 ℃ or more.
Next, referring to FIG. 11D, the transparent sapphire substrate, which is the
Next, referring to FIG. 11E, a subsequent process is performed in the step e. The subsequent process forms a thermally stable first
In addition, the first
Next, referring to FIGS. 11F and 11G, a temporary supporting substrate (TSS) 1110 is attached with an organic or inorganic bonding material in the opposite direction of the PSS, and the
Although the present invention has been described with reference to the embodiments illustrated in the accompanying drawings, it is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Could be. Particularly, homoepitaxial group III-nitride-based semiconductor growth substrates and group III-nitride-based semiconductor multilayer thin films formed by growing group III-nitride-based semiconductors on the sapphire growth substrate are vertically structured lasers. It will be appreciated that various optoelectronic devices, including diodes and transistors, are also applicable. Accordingly, the true scope of protection of the present invention should be determined only by the appended claims.
1 is a cross-sectional view illustrating a laser lift-off (LLO) process that is generally performed in manufacturing a semiconductor light emitting device having a vertical structure according to the related art.
FIG. 2 illustrates a structure in which a support substrate is structurally stable and tightly adhered to a group 3-5 nitride-based semiconductor single crystal thin film growth direction before performing a laser lift off (LLO) process according to the related art. Cross-sectional views.
3 is a cross-sectional view of a group 3-5 nitride-based semiconductor light emitting device having a vertical structure manufactured by incorporating a support substrate that is structurally stable and strongly adhered to the LLO process according to the related art.
4A to 4E are stack sectional views illustrating various embodiments of a prepared support substrate (hereinafter, referred to as a 'PSS') according to a first embodiment of the present invention.
5 (a) to 5 (e) are stacked cross-sectional views illustrating various embodiments of the PSS according to the second embodiment of the present invention.
FIG. 6 is a cross-sectional view illustrating a first embodiment of a semiconductor device having a vertical single chip structure manufactured using a PSS according to the present invention, and FIG. 7 is a semiconductor light emitting device according to the first embodiment of FIG. Cross-sectional views sequentially illustrating a manufacturing process of the device.
FIG. 8 is a cross-sectional view illustrating a second embodiment of a semiconductor device having a vertical single-chip vertical structure manufactured using the PSS according to the present invention, and FIG. 9 is a semiconductor light emitting device according to the second embodiment of FIG. 8. Cross-sectional views sequentially illustrating a manufacturing process of the device.
FIG. 10 is a cross-sectional view illustrating a third embodiment of a semiconductor device having a vertical vertical structure having a single chip shape manufactured using the PSS according to the present invention, and FIG. 11 is a semiconductor light emitting device according to the third embodiment of FIG. 10. Cross-sectional views sequentially illustrating a manufacturing process of the device.
Claims (25)
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
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PCT/KR2009/002938 WO2009148253A2 (en) | 2008-06-02 | 2009-06-02 | Supporting substrate for fabrication of semiconductor light emitting device and semiconductor light emitting device using the same |
CN201410682299.3A CN104538507B (en) | 2008-06-02 | 2009-06-02 | Method for preparing semiconductor light-emitting apparatus |
JP2011512377A JP5189681B2 (en) | 2008-06-02 | 2009-06-02 | Support substrate for manufacturing semiconductor light emitting device and semiconductor light emitting device using this support substrate |
US12/995,998 US20110127567A1 (en) | 2008-06-02 | 2009-06-02 | Supporting substrate for preparing semiconductor light-emitting device and semiconductor light-emitting device using supporting substrates |
CN200980130052.8A CN102106006B (en) | 2008-06-02 | 2009-06-02 | Supporting substrate for fabrication of semiconductor light emitting device and semiconductor light emitting device using the same |
EP09758506.1A EP2302705B1 (en) | 2008-06-02 | 2009-06-02 | Supporting substrate for fabrication of semiconductor light emitting device and semiconductor light emitting device using the same |
JP2013011303A JP2013070111A (en) | 2008-06-02 | 2013-01-24 | Semiconductor light-emitting device |
US14/024,129 US8877530B2 (en) | 2008-06-02 | 2013-09-11 | Supporting substrate for preparing semiconductor light-emitting device and semiconductor light-emitting device using supporting substrates |
US14/481,993 US9224910B2 (en) | 2008-06-02 | 2014-09-10 | Supporting substrate for preparing semiconductor light-emitting device and semiconductor light-emitting device using supporting substrates |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100886110B1 (en) | 2006-12-08 | 2009-02-27 | 고려대학교 산학협력단 | Supporting substrates for semiconductor light emitting device and method of manufacturing vertical structured semiconductor light emitting device using the supporting substrates |
KR100916366B1 (en) * | 2006-12-08 | 2009-09-11 | 고려대학교 산학협력단 | Supporting substrates for semiconductor light emitting device and method of manufacturing vertical structured semiconductor light emitting device using the supporting substrates |
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KR100886110B1 (en) | 2006-12-08 | 2009-02-27 | 고려대학교 산학협력단 | Supporting substrates for semiconductor light emitting device and method of manufacturing vertical structured semiconductor light emitting device using the supporting substrates |
KR100916366B1 (en) * | 2006-12-08 | 2009-09-11 | 고려대학교 산학협력단 | Supporting substrates for semiconductor light emitting device and method of manufacturing vertical structured semiconductor light emitting device using the supporting substrates |
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