KR101158071B1 - Luminous element having arrayed cells and method of manufacturing the same - Google Patents

Luminous element having arrayed cells and method of manufacturing the same Download PDF

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KR101158071B1
KR101158071B1 KR1020050090498A KR20050090498A KR101158071B1 KR 101158071 B1 KR101158071 B1 KR 101158071B1 KR 1020050090498 A KR1020050090498 A KR 1020050090498A KR 20050090498 A KR20050090498 A KR 20050090498A KR 101158071 B1 KR101158071 B1 KR 101158071B1
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South Korea
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type semiconductor
light emitting
semiconductor layer
layer
opening
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KR1020050090498A
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Korean (ko)
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KR20070035745A (en
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이재호
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서울옵토디바이스주식회사
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Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device in which a plurality of cells are arrayed, and a method of manufacturing the same, comprising a substrate, an N-type semiconductor layer formed on the substrate, a light-emitting layer formed on a portion of the N-type semiconductor layer, and A plurality of light emitting cells including a formed P-type semiconductor layer, a transparent electrode layer formed on the P-type semiconductor layer to expose at least a portion of the P-type semiconductor layer, and the N-type semiconductor layer of one light-emitting cell; Provided is a light emitting device including a metal wiring connecting the P-type semiconductor layer exposed by the opening of another light emitting cell adjacent thereto. The present invention can improve the adhesiveness of the metal wiring by opening a portion of the transparent electrode layer to directly contact the metal wiring with the P-type semiconductor layer.

Light emitting element, many light emitting cell, metal wiring, transparent electrode layer, opening part, adhesiveness

Description

Luminous element having arrayed cells and method of manufacturing the same

1 is a cross-sectional view of a light emitting device according to the prior art.

2 is a plan view of a light emitting device according to the prior art;

3 is a cross-sectional view of a light emitting device according to an embodiment of the present invention.

4 is a plan view of a light emitting device according to one embodiment;

5A to 5C are views for explaining a modification of the opening formed on the transparent electrode layer according to the present embodiment.

6A to 6D are diagrams for explaining the connection relationship of the light emitting device according to this embodiment.

7A to 7D are views for explaining the manufacturing method of the light emitting device according to the present embodiment.

8 and 9 are cross-sectional views of a light emitting device according to another embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10, 110: substrate 20, 120: N-type semiconductor layer

30, 130: light emitting layer 40, 140: P-type semiconductor layer

50, 150: transparent electrode layer 60, 200: metal wiring

155: opening

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device in which a plurality of cells are combined and a manufacturing method thereof, and more particularly, to a method of connecting a plurality of cells.

A light emitting diode refers to a device that generates a small number of carriers (electrons or holes) injected using a p-n junction structure of a semiconductor, and emits predetermined light by recombination thereof. Such light emitting diodes are used as display elements and backlights. In recent years, power consumption of general light emitting diodes is only several to several tens of those of conventional lighting devices, and their lifetime is several to several tens of times. Superior in terms of durability

In general, in order to use a light emitting diode for lighting, a plurality of light emitting chips may be mounted on a printed circuit board, and then the light emitting chips may be connected in series using wires, and then molded to manufacture light emitting devices, or a plurality of light emitting devices may be used. The device was connected in series to produce a light emitting device for illumination.

Such a conventional light emitting device for lighting not only has a large size but also has a big limitation in the available power source. That is, in order to use such a light emitting device in an AC power source used in a home, a separate AC / DC conversion circuit and a protection circuit must be added. The addition of this circuit not only increases the size of the device, but also increases the manufacturing cost of the device.

In addition, when connecting adjacent light emitting chips or light emitting devices by wire bonding using thermocompression, a problem occurs in that the light emitting chips or light emitting devices are damaged. In addition, there is a problem that the device does not operate because the wire connecting the light emitting chip or the light emitting device is separated.

In order to solve the above-mentioned problems, a light emitting device that can be used for lighting by connecting a light emitting chip at a wafer level has been manufactured.

1 is a cross-sectional view of a light emitting device according to the prior art, and FIG. 2 is a plan view of the light emitting device according to the prior art.

1 and 2, the conventional light emitting device is formed by forming an N-type semiconductor layer 20 on a sapphire substrate 10, forming a light-emitting layer 30, and forming a P-type semiconductor layer 40. Next, the light emitting cells of a predetermined size are etched to be isolated from each other on the substrate 10 by a photolithography process. Thereafter, a portion of the P-type semiconductor layer 40 and the light emitting layer 30 are etched through a photolithography process to expose the N-type semiconductor layer 20. The transparent electrode layer 50 is formed on the P-type semiconductor layer 40, and the transparent electrode layer 50 on the P-type semiconductor layer 40 of one light emitting cell and the N-type semiconductor layer of the light emitting cell adjacent thereto are formed through an air bridge process. A metal wiring 60 connecting the 20 is formed. Through this, a plurality of light emitting chips are connected in series on the sapphire substrate to produce a light emitting device that can operate in a home AC power supply.

However, the light emitting device manufactured as described above has a problem in that a metal wire connecting adjacent cells is easily shorted by pressure such as a collet during an assembly process using the device. In addition, since the adhesion between the transparent electrode layer and the metal wiring is poor, there is a problem that the metal wiring easily falls even in a small impact.

The present invention provides a light emitting device and a method of manufacturing a plurality of cells arrayed to improve the adhesion of the metal wiring by opening a portion of the transparent electrode to directly contact the metal wiring to the P-type semiconductor layer in order to solve the above problems. Its purpose is to provide.

A plurality of light emitting cells comprising an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer formed on a substrate according to the invention, and formed on the P-type semiconductor layer of each of the plurality of light-emitting cells, the P-type semiconductor layer A light emitting electrode comprising a transparent electrode layer having an opening exposing at least a portion of the light emitting layer and a metal wiring connecting the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer exposed by the opening of another light emitting cell adjacent thereto; Provided is an element.

Here, the opening has at least one opening area. In this case, the opening region has at least one of a circle shape, an ellipse shape, and a figure shape including a triangle, a rectangle, a pentagon, and the like.

In the above, the opening is formed in the region adjacent to the N-type semiconductor layer of the adjacent light emitting cell.

The transparent electrode layer uses ITO. The metal wiring overlaps at least part of the opening.

Sequentially forming an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer on the substrate according to the present invention, and etching a portion of the P-type semiconductor layer, the light-emitting layer, and the N-type semiconductor layer to form a plurality of light emitting cells. Separating the P-type semiconductor layer and a portion of the light emitting layer of each light emitting cell to expose a portion of the N-type semiconductor layer, forming a transparent electrode layer on the P-type semiconductor layer, and Etching a portion of the transparent electrode layer to form an opening that exposes a portion of the P-type semiconductor layer; and the P-type semiconductor layer exposed by the N-type semiconductor layer of one light emitting cell and the opening of another light emitting cell adjacent thereto. It provides a method of manufacturing a light emitting device comprising the step of connecting to a metal wiring.

Here, the metal wiring is formed through an air bridge process.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you. Wherein like reference numerals refer to like elements throughout.

3 is a cross-sectional view of a light emitting device according to an embodiment of the present invention, Figure 4 is a plan view of a light emitting device according to an embodiment.

3 and 4, the light emitting device according to the present embodiment includes an N-type semiconductor layer 120 formed on the substrate 110, a light-emitting layer 130 partially formed on the N-type semiconductor layer 120, and a light emitting layer. The transparent electrode layer 150 having a P-type semiconductor layer 140 formed on the 130 and an opening 155 formed on the P-type semiconductor layer 140 to expose a portion of the P-type semiconductor layer 140. P exposed by the plurality of light emitting cells 100a, 100b; 100, the N-type semiconductor layer 120 of one light emitting cell 100a, and the opening 155 of another light emitting cell 100b adjacent thereto. And a metal wire 200 connecting the type semiconductor layer 140.

Here, the substrate 110 may be a single crystal substrate such as sapphire, silicon, silicon carbide (SiC), aluminum nitride (AlN) or zinc oxide (ZnO), and in this embodiment, the sapphire substrate 110 may be used. use.

The light emitting cell 100 forms an N-type semiconductor layer 120, a light emitting layer 130, a P-type semiconductor layer 140, and a transparent electrode layer 150 on the sapphire substrate 110, and the sapphire substrate 110. ) And the buffer layer 115 may be further formed to remove defects due to lattice mismatch between the N-type semiconductor layer 120.

The N-type semiconductor layer 120 preferably uses a gallium nitride (GaN) film into which N-type impurities are implanted, but is not limited thereto. A material layer having various semiconductor properties may be used. In this embodiment, an N-type semiconductor layer 120 including an N-type AlGaN film or an InGaN film is formed.

In addition, the P-type semiconductor layer 140 preferably uses a gallium nitride film implanted with P-type impurities, but is not limited thereto. A material layer having various semiconductor properties may be used. In this embodiment, a P-type semiconductor layer 140 including a P-type AlGaN film or an InGaN film is formed.

The N-type semiconductor layer 120 and the P-type semiconductor layer 140 may be formed of a multilayer film. Si is used as the N-type impurity and Mg is used as the P-type impurity.

As the light emitting layer 130, a film having a quantum well structure in which a quantum well layer and a barrier layer are repeatedly formed on an N-type AlGaN film or an InGaN film is used. As the barrier layer and the well layer, binary compounds such as GaN, InN, and AlN may be used, and ternary compounds In x Ga 1-x N (0 ≦ x1 ) and Al x Ga 1-x N (0 ≤ x ≤ 1) may be used, and the quaternary compound Al x In y Ga 1-xy N (0 ≦ x + y ≦ 1) may be used. Of course, the N-type semiconductor layer 120 and the P-type semiconductor layer 140 may be formed by implanting predetermined impurities into the two- to four-membered compound. Of course, a structure for forming various light emitting layers other than the quantum well structure can be used.

Although not shown in the drawing, various material layers for improving the characteristics, purpose of use, and light emitting efficiency of the light emitting cell 100 may be further added.

The transparent electrode layer 150 is a film formed to reduce the resistance of the P-type semiconductor layer 140 and uses ITO in this embodiment. As shown in FIG. 4, a portion of the transparent electrode layer 150 is opened to form an opening 155 exposing a portion of the lower P-type semiconductor layer 140. The opening 155 may be variously modified as long as it has a rectangular shape. At this time, the bonding force of the metal wiring 200 connecting the light emitting cells 100 by coupling between the P-type semiconductor layer 140 exposed by the opening 155 and the metal wiring 200 formed through a subsequent process is combined. Can be improved. This is because the metal wire 200 has better adhesion with the P-type semiconductor layer 140 than the transparent electrode layer 150.

The opening 155 is formed within a range that does not interfere with the role of the ohmic electrode of the transparent electrode layer 150, and is formed in a region close to the N-type semiconductor layer 120 of the adjacent light emitting cell 100 to be subsequently air bridged. It is preferable to make the connection distance of the metal wiring 200 small. This is because the metal wire 200 absorbs light or does not transmit light, thereby absorbing a part of the light emitted from the light emitting layer 130 to reduce the light emission efficiency. Therefore, the luminous efficiency may be improved by reducing the connection distance of the metal wiring 200.

5A to 5C are views for explaining a modification of the opening formed on the transparent electrode layer according to the present embodiment.

The opening 155 for removing a portion of the transparent electrode layer 150 to open the P-type semiconductor layer 140 may be formed in an ellipse shape as shown in FIG. 5A, and a plurality of circular shapes as shown in FIG. 5B. 5C may be formed in a shape in which two rectangles are arranged to the left and right. As described above, the opening 155 may be composed of one opening area or a plurality of opening areas. In addition, the shape of the opening region may be formed into a shape including a circle, an ellipse, a triangle, a rectangle, a pentagon, and the like.

The metallization 200 is formed of the P-type semiconductor layer 140 of the one light emitting cell 100b exposed by the opening 155 through an air bridge process or a step cover process, and the other adjacent thereto. The N-type semiconductor layers 120 of the light emitting cells 100a are electrically connected to each other. The metal wire 200 is formed using a conductive material, but is formed using metal. Of course, it is also possible to use a silicon compound doped with an impurity. A detailed description of the above process for forming the metal wiring 200 will be described later.

Hereinafter, the connection relationship between the plurality of light emitting cells 100 constituting the light emitting device of the present invention will be described.

6A to 6D are diagrams for describing a connection relationship between light emitting devices according to the present embodiment.

As shown in FIG. 6A, in the light emitting device of the present invention, a plurality of light emitting cells 100 are connected in series on a single wafer through a metal wire 200 between the first and second pads 210 and 220. In addition, as shown in FIG. 6B, a plurality of light emitting cells 100 connected in series on a single wafer are formed as one block 101 and 102, and these blocks 101 and 102 are formed through the metal wire 200. In reverse parallel connection between the first and second pads 210, 220. In addition, as illustrated in FIG. 6C, a plurality of light emitting cells 100 connected in series on a single wafer is connected to the bridge circuit unit 230 through the metal wire 200. In addition, as illustrated in FIG. 6D, a plurality of light emitting cells 100 connected in series in the bridge circuit 230 formed on the DAIL wafer are connected through the metal wire 200.

Hereinafter, the manufacturing method of the light emitting element which has the above-mentioned structure is demonstrated.

7A to 7D are views for explaining a method of manufacturing a light emitting device according to the present embodiment.

Referring to FIG. 7A, the buffer layer 115, the N-type semiconductor layer 120, the light emitting layer 130, and the P-type semiconductor layer 140 are sequentially formed on the sapphire substrate 110.

Referring to FIG. 7B, a portion of the P-type semiconductor layer 140, the light emitting layer 130, the N-type semiconductor layer 120, and the buffer layer 115 is removed by an etching process using a photosensitive film to form a light emitting cell as a substrate ( Each isolated on 110). Thereafter, the P-type semiconductor layer 140 and the light emitting layer 130 are etched to expose a portion of the N-type semiconductor layer 120 of each cell. In this case, a portion of the N-type semiconductor layer 120 may also be removed through transient etching as shown in the drawing.

Referring to FIG. 7C, the transparent electrode layer 150 is formed by growing ITO on the P-type semiconductor layer 140. Thereafter, a photoresist pattern (not shown) for opening a portion of the transparent electrode layer 150 is formed through a photolithography process. In this case, the shape of the region opened by the photosensitive film pattern is formed in the same shape as the opening 155 described above. The transparent electrode layer 150 in the region exposed by the photoresist pattern is etched to form an opening 155 exposing a portion of the lower P-type semiconductor layer 140.

Referring to FIG. 7D, the photoresist is coated on the entire structure, and then a portion of the N-type semiconductor layer 120 of the adjacent one light emitting cell 100a and the opening 155 of the other light emitting cell 100b are applied through a photolithography process. The first photosensitive film pattern which exposes a part of the P-type semiconductor layer exposed by this is formed. A first metal film is formed on the entire structure to electrically connect the exposed N-type semiconductor layer 120 and the P-type semiconductor layer 140. Thereafter, a second photoresist film pattern having the same pattern shape as that of the metal wiring 200 is formed on the entire structure, and a second metal film is formed thereon. When the first and second photoresist layer patterns are removed, the metal layers except for the metal wiring region are removed to form the metal wiring 200 connecting the N-type semiconductor layer 120 and the P-type semiconductor layer 140. .

In the above description, the P-type semiconductor layer 140 exposed by the opening 155 is formed by forming a wide opening 155 exposing the lower P-type semiconductor layer 140 on the transparent electrode layer 150 through a predetermined pattern process. ) And the N-type semiconductor layer 120 are connected to the metal wiring 200. However, the present invention is not limited thereto, and as illustrated in FIG. 8, the width of the opening 155 may be reduced, and the metal wiring 200 may be formed to cover the opening 155 to form the P-type semiconductor layer 140 under the opening 155. Of course, a portion of the transparent electrode layer 150 and the metal wire 200 may be connected. In addition, as shown in FIG. 9, a conductive N-type pad 160 is formed on the exposed N-type semiconductor layer 120, and then a metal is formed between the N-type pad 160 and the P-type semiconductor layer 140. It may be electrically connected through the wiring 200.

As described above, the present invention can improve the adhesiveness of the metal wiring by opening a portion of the transparent electrode to directly contact the metal wiring with the P-type semiconductor layer.

 Although the invention has been described with reference to the accompanying drawings and the preferred embodiments described above, the invention is not limited thereto, but is defined by the claims that follow. Accordingly, those skilled in the art will appreciate that various modifications and changes may be made thereto without departing from the spirit of the following claims.

Claims (8)

A plurality of light emitting cells including an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer formed on a substrate; A transparent electrode layer formed on the P-type semiconductor layer of each of the plurality of light emitting cells and having an opening exposing at least a portion of the P-type semiconductor layer; And And a metal wiring connecting the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer exposed by the opening of another light emitting cell adjacent thereto. The method according to claim 1, And the opening has at least one opening area. The method according to claim 2, The opening region has a shape of at least one of a circle shape, an ellipse shape, and a figure shape including a triangle, a rectangle, and a pentagon. The method according to any one of claims 1 to 3, And the opening is formed in a region adjacent to the N-type semiconductor layer of the one light emitting cell in the transparent electrode layer on the P-type semiconductor layer of the other light emitting cell. The method according to claim 1, The transparent electrode layer is a light emitting device using ITO. The method according to claim 1, The metal wire overlaps with at least a portion of the opening. Sequentially forming an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer on the substrate; Etching a portion of the P-type semiconductor layer, the light emitting layer, and the N-type semiconductor layer to separate a plurality of light emitting cells; Exposing a portion of the N-type semiconductor layer by removing the P-type semiconductor layer and a portion of the light emitting layer of each light emitting cell; Forming a transparent electrode layer on the P-type semiconductor layer; Etching a portion of the transparent electrode layer to form an opening exposing a portion of the P-type semiconductor layer; And Connecting the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer exposed by the opening of another light emitting cell adjacent thereto with a metal wiring. The method of claim 7, The metal wiring is a method of manufacturing a light emitting device formed through an air bridge process.
KR1020050090498A 2005-09-28 2005-09-28 Luminous element having arrayed cells and method of manufacturing the same KR101158071B1 (en)

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WO2014038794A1 (en) 2012-09-07 2014-03-13 서울바이오시스 주식회사 Wafer level light-emitting diode array
DE202013012471U1 (en) 2012-08-07 2017-02-17 Seoul Viosys Co., Ltd. Light-emitting diode array on wafer level
KR101949505B1 (en) 2012-08-28 2019-02-18 서울바이오시스 주식회사 Light emitting diode array on wafer level and method of forming the same
US9318529B2 (en) 2012-09-07 2016-04-19 Seoul Viosys Co., Ltd. Wafer level light-emitting diode array
KR101893579B1 (en) 2012-09-07 2018-08-30 서울바이오시스 주식회사 Light emitting diode array on wafer level
KR101892213B1 (en) 2012-08-07 2018-08-28 서울바이오시스 주식회사 Light emitting diode array on wafer level and method of forming the same
US10388690B2 (en) 2012-08-07 2019-08-20 Seoul Viosys Co., Ltd. Wafer level light-emitting diode array
US10804316B2 (en) 2012-08-07 2020-10-13 Seoul Viosys Co., Ltd. Wafer level light-emitting diode array
KR101798134B1 (en) 2016-10-14 2017-11-16 서울바이오시스 주식회사 Light emitting diode array on wafer level and method of forming the same
CN111933654A (en) * 2020-08-19 2020-11-13 惠科股份有限公司 Display device and method for manufacturing the same

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