KR101102690B1 - 실리콘 산화막의 형성 방법, 플라즈마 처리 장치 및 기억 매체 - Google Patents

실리콘 산화막의 형성 방법, 플라즈마 처리 장치 및 기억 매체 Download PDF

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KR101102690B1
KR101102690B1 KR1020097006183A KR20097006183A KR101102690B1 KR 101102690 B1 KR101102690 B1 KR 101102690B1 KR 1020097006183 A KR1020097006183 A KR 1020097006183A KR 20097006183 A KR20097006183 A KR 20097006183A KR 101102690 B1 KR101102690 B1 KR 101102690B1
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oxide film
silicon oxide
plasma
gas
processing
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KR20090043598A (ko
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요시로 가베
다카시 고바야시
도시히코 시오자와
준이치 기타가와
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도쿄엘렉트론가부시키가이샤
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    • HELECTRICITY
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
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    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
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    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
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    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
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    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates

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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)
  • Semiconductor Memories (AREA)
KR1020097006183A 2006-09-29 2007-09-28 실리콘 산화막의 형성 방법, 플라즈마 처리 장치 및 기억 매체 Expired - Fee Related KR101102690B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006267742A JP5089121B2 (ja) 2006-09-29 2006-09-29 シリコン酸化膜の形成方法およびプラズマ処理装置
JPJP-P-2006-267742 2006-09-29
PCT/JP2007/069041 WO2008038787A1 (en) 2006-09-29 2007-09-28 Method for forming silicon oxide film, plasma processing apparatus and storage medium

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KR20090043598A KR20090043598A (ko) 2009-05-06
KR101102690B1 true KR101102690B1 (ko) 2012-01-05

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US (1) US8003484B2 (enExample)
JP (1) JP5089121B2 (enExample)
KR (1) KR101102690B1 (enExample)
CN (1) CN101517716B (enExample)
TW (1) TW200834729A (enExample)
WO (1) WO2008038787A1 (enExample)

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JP2006261217A (ja) * 2005-03-15 2006-09-28 Canon Anelva Corp 薄膜形成方法
JP5357487B2 (ja) 2008-09-30 2013-12-04 東京エレクトロン株式会社 シリコン酸化膜の形成方法、コンピュータ読み取り可能な記憶媒体およびプラズマ酸化処理装置
KR101120133B1 (ko) * 2009-05-13 2012-03-23 가천대학교 산학협력단 탄성기질의 표면 상에서의 나노구조의 조절성 제조
JP2011071353A (ja) * 2009-09-25 2011-04-07 Hitachi Kokusai Electric Inc 半導体装置の製造方法
CN108666206B (zh) * 2018-05-25 2019-08-16 中国科学院微电子研究所 基于两步微波等离子体氧化的碳化硅氧化方法
CN108766887B (zh) * 2018-05-25 2019-07-30 中国科学院微电子研究所 基于两步微波等离子体氧化的凹槽mosfet器件的制造方法
CN112740376B (zh) 2018-09-13 2024-01-30 株式会社国际电气 半导体装置的制造方法、基板处理装置和记录介质
US11049731B2 (en) * 2018-09-27 2021-06-29 Applied Materials, Inc. Methods for film modification
JP7500450B2 (ja) * 2021-01-21 2024-06-17 東京エレクトロン株式会社 プラズマ処理装置
CN113410126B (zh) * 2021-06-18 2024-03-08 上海华虹宏力半导体制造有限公司 热氧化工艺中自动调控硅氧化膜厚度的方法和系统
JP7530878B2 (ja) * 2021-09-30 2024-08-08 株式会社Kokusai Electric 半導体装置の製造方法、基板処理方法、基板処理装置、およびプログラム

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US20040152340A1 (en) 1999-06-04 2004-08-05 Naoki Yamamoto Semiconductor integrated circuit device and method for manufacturing the same
JP2006019413A (ja) * 2004-06-30 2006-01-19 Canon Inc 処理方法及び装置

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JP2768685B2 (ja) * 1988-03-28 1998-06-25 株式会社東芝 半導体装置の製造方法及びその装置
US5225036A (en) * 1988-03-28 1993-07-06 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5756402A (en) * 1992-12-28 1998-05-26 Kabushiki Kaisha Toshiba Method of etching silicon nitride film
US6214736B1 (en) * 1998-10-15 2001-04-10 Texas Instruments Incorporated Silicon processing method
KR100945770B1 (ko) * 2004-08-31 2010-03-08 도쿄엘렉트론가부시키가이샤 실리콘 산화막의 형성 방법, 반도체 장치의 제조 방법 및컴퓨터 기억 매체
JP5032056B2 (ja) * 2005-07-25 2012-09-26 株式会社東芝 不揮発性半導体メモリ装置の製造方法

Patent Citations (3)

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US20040152340A1 (en) 1999-06-04 2004-08-05 Naoki Yamamoto Semiconductor integrated circuit device and method for manufacturing the same
WO2004008519A1 (ja) * 2002-07-17 2004-01-22 Tokyo Electron Limited 酸化膜形成方法および電子デバイス材料
JP2006019413A (ja) * 2004-06-30 2006-01-19 Canon Inc 処理方法及び装置

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WO2008038787A1 (en) 2008-04-03
JP2008091409A (ja) 2008-04-17
TW200834729A (en) 2008-08-16
CN101517716A (zh) 2009-08-26
US8003484B2 (en) 2011-08-23
KR20090043598A (ko) 2009-05-06
US20100093185A1 (en) 2010-04-15
CN101517716B (zh) 2011-08-17
JP5089121B2 (ja) 2012-12-05

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